公开(公告)号：US20180337148A1

公开(公告)日：2018-11-22

申请号：US15941334

申请日：2018-03-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Doo Il KIM ,  Young Sik HUR ,  Jung Hyun CHO ,  Won Wook SO

IPC: H01L23/66 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/66 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A composite antenna substrate and semiconductor package module includes: a fan-out semiconductor package including a semiconductor chip, an encapsulant encapsulating at least portions of the semiconductor chip, and a connection member including a redistribution layer electrically connected to connection pads; and an antenna substrate including an antenna member including antenna patterns, ground patterns, and feed lines, and a wiring member disposed below the antenna member and including wiring layers including feeding patterns electrically connected to the feed lines.

公开(公告)号：US20180324952A1

公开(公告)日：2018-11-08

申请号：US16033427

申请日：2018-07-12

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Jung Hyun PARK ,  Yong Ho BAEK ,  Jae Hoon CHOI

IPC: H05K1/18

Abstract: There is provided a printed circuit board including: a first insulating layer; a first circuit pattern formed on a first surface of the first insulating layer; an adhesive layer provided on a second surface of the first insulating layer; and an electronic component disposed on the adhesive layer and enclosed by the first insulating layer and a second insulating layer formed on the first insulating layer.

公开(公告)号：US20180269156A1

公开(公告)日：2018-09-20

申请号：US15982839

申请日：2018-05-17

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Sang Kun KIM ,  Ye Jeong KIM ,  Jae Ean LEE ,  Jae Hoon CHOI

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L21/66 ,  H05K1/18 ,  H01L23/31 ,  H01L23/00 ,  H01L23/13

CPC classification number: H01L23/5389 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L22/14 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/215 ,  H01L2224/24265 ,  H01L2224/82005 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19102 ,  H05K1/186

Abstract: An electronic component package includes first and second wiring parts including insulating layers, conductive patterns formed in the insulating layers, and conductive vias penetrating through the insulating layers, to be connected to the conductive patterns, respectively; a frame disposed between the first and second wiring parts and having conductive connection parts electrically connecting one or more through-holes with the first and second wiring parts and an electronic component disposed to be surrounded by the through-hole, to thereby be connected to the first wiring part, wherein the conductive patterns formed to be adjacent to the electronic component among the conductive patterns of the first wiring part are embedded in the insulating layer of the first wiring part.

公开(公告)号：US20180232556A1

公开(公告)日：2018-08-16

申请号：US15951677

申请日：2018-04-12

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Jung Hyun CHO ,  Byoung Chan KIM

IPC: G06K9/00 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/768

CPC classification number: G06K9/00053 ,  G06K9/0002 ,  H01L21/561 ,  H01L21/568 ,  H01L21/768 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/13 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/26 ,  H01L2224/0235 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/12105 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/16238 ,  H01L2224/18 ,  H01L2224/20 ,  H01L2224/221 ,  H01L2224/24155 ,  H01L2224/244 ,  H01L2224/25171 ,  H01L2224/25175 ,  H01L2924/15153

Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface with connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member respectively include first redistribution layers and second redistribution layers electrically connected to the connection pads and formed of one or more layers, at least one of the first redistribution layers is disposed between a plurality of insulating layers of the first connection member, and at least one of the second redistribution layers includes sensor patterns recognizing a fingerprint.

公开(公告)号：US20180053036A1

公开(公告)日：2018-02-22

申请号：US15663304

申请日：2017-07-28

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Jung Hyun CHO ,  Byoung Chan KIM

IPC: G06K9/00 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00 ,  H01L23/31

CPC classification number: G06K9/00053 ,  G06K9/0002 ,  H01L21/561 ,  H01L21/568 ,  H01L21/768 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/13 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/26 ,  H01L2224/0235 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/12105 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/16238 ,  H01L2224/18 ,  H01L2224/20 ,  H01L2224/221 ,  H01L2224/24155 ,  H01L2224/244 ,  H01L2224/25171 ,  H01L2224/25175 ,  H01L2924/15153

Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface with connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member respectively include first redistribution layers and second redistribution layers electrically connected to the connection pads and formed of one or more layers, at least one of the first redistribution layers is disposed between a plurality of insulating layers of the first connection member, and at least one of the second redistribution layers includes sensor patterns recognizing a fingerprint.

公开(公告)号：US20170213794A1

公开(公告)日：2017-07-27

申请号：US15385414

申请日：2016-12-20

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Sang Kun KIM ,  Ye Jeong KIM ,  Jae Ean LEE ,  Jae Hoon CHOI

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/66 ,  H01L21/48 ,  H01L21/56 ,  H05K1/18 ,  H01L23/31

CPC classification number: H01L23/5389 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L22/14 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/215 ,  H01L2224/24265 ,  H01L2224/82005 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19102 ,  H05K1/186

Abstract: An electronic component package includes first and second wiring parts including insulating layers, conductive patterns formed in the insulating layers, and conductive vias penetrating through the insulating layers, to be connected to the conductive patterns, respectively; a frame disposed between the first and second wiring parts and having conductive connection parts electrically connecting one or more through-holes with the first and second wiring parts and an electronic component disposed to be surrounded by the through-hole, to thereby be connected to the first wiring part, wherein the conductive patterns formed to be adjacent to the electronic component among the conductive patterns of the first wiring part are embedded in the insulating layer of the first wiring part.

公开(公告)号：US20170133288A1

公开(公告)日：2017-05-11

申请号：US15200838

申请日：2016-07-01

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Jung Hyun CHO ,  Jae Hoon CHOI

IPC: H01L21/66 ,  H01L21/56 ,  H01L23/00 ,  H01L23/522 ,  H01L23/31

CPC classification number: H01L22/34 ,  H01L21/565 ,  H01L23/31 ,  H01L23/5226 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/81005 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2224/05599 ,  H01L2224/45099

Abstract: A board for an electronic component package includes a wiring part on which an electronic component is disposed, wherein the wiring part includes an insulating layer, a signal transferring wiring electrically connected to the electronic component, and an electrical testing wiring electrically disconnected from the electronic component, and the electrical testing wiring includes conductive patterns formed on both surfaces of the wiring part, and conductive vias electrically connecting the conductive patterns to each other.

公开(公告)号：US20160128186A1

公开(公告)日：2016-05-05

申请号：US14857817

申请日：2015-09-17

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Suk Hyeon CHO ,  Yong Ho BAEK ,  Young Gwan KO ,  Yoong OH ,  Young Kuk KO

IPC: H05K1/03 ,  H05K3/10 ,  H05K3/00 ,  H05K1/11

CPC classification number: H05K1/0271 ,  H01L2224/16227 ,  H01L2224/81192 ,  H01L2924/15323 ,  H01L2924/15788 ,  H05K3/0052 ,  H05K3/386 ,  H05K3/429 ,  H05K3/4605 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/068 ,  H05K2201/09536 ,  H05K2201/09581 ,  H05K2201/09827 ,  H05K2201/09854

Abstract: A printed circuit board includes a core part including a glass plate and resin layers disposed on an upper surface and a lower surface of the glass plate, and a wiring layer disposed on at least one of an upper portion and a lower portion of the core part. The core part includes a groove part penetrating from the upper surface to the lower surface of the glass plate while being spaced apart from a side surface of the core part by a predetermined distance.

Abstract translation: 印刷电路板包括：芯部，其包括玻璃板和设置在玻璃板的上表面和下表面上的树脂层;以及布线层，设置在芯部的上部和下部中的至少一个上 。 芯部包括从玻璃板的上表面穿透到下表面的槽部，同时与芯部的侧表面间隔预定距离。

公开(公告)号：US20160088742A1

公开(公告)日：2016-03-24

申请号：US14848907

申请日：2015-09-09

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Suk Hyeon CHO ,  Yong Ho BAEK ,  Young Gwan KO ,  Yoong OH ,  Young Kuk KO

IPC: H05K3/46 ,  H05K1/02 ,  H05K3/00 ,  H05K1/03 ,  H05K3/18 ,  H05K1/11 ,  H05K3/40

CPC classification number: H05K1/115 ,  H05K1/0271 ,  H05K3/007 ,  H05K3/422 ,  H05K3/4605 ,  H05K3/4608 ,  H05K3/4682 ,  H05K2201/09827

Abstract: A printed circuit board may include: a first circuit layer; a first insulating layer disposed on the first circuit layer; a high-rigidity layer disposed on the first insulating layer; and a second circuit layer disposed on the high-rigidity layer and connected to the first circuit layer by a first via extending through the first insulating layer and the high-rigidity layer, wherein a rigidity of the high-rigidity layer is greater than a rigidity of the first insulating layer.

Abstract translation: 印刷电路板可以包括：第一电路层; 布置在所述第一电路层上的第一绝缘层; 设置在所述第一绝缘层上的高刚性层; 以及第二电路层，其设置在所述高刚性层上并且通过延伸穿过所述第一绝缘层和所述高刚性层的第一通孔连接到所述第一电路层，其中所述高刚性层的刚性大于刚性 的第一绝缘层。

公开(公告)号：US20160037645A1

公开(公告)日：2016-02-04

申请号：US14807598

申请日：2015-07-23

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Jae Ean LEE ,  Jee Soo MOK ,  Young Gwan KO ,  Kyung Hwan KO ,  Yong Ho BAEK

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/46 ,  H05K3/30 ,  H05K3/40 ,  H05K1/11 ,  H05K3/24

CPC classification number: H05K3/4697 ,  H01L2224/16225 ,  H05K1/185 ,  H05K1/186 ,  H05K3/24 ,  H05K3/4602 ,  H05K3/4617 ,  H05K2201/096 ,  H05K2201/10

Abstract: An embedded board and a method of manufacturing the same are provided. The embedded board includes a core substrate below which a mounting pad is formed, a first substrate formed below the core substrate and having a first cavity formed therein, and a second substrate formed below the first substrate and having a second cavity formed therein. The first cavity and the second cavity are connected to each other and externally expose the mounting pad.

Abstract translation: 提供嵌入式电路板及其制造方法。 嵌入式基板包括芯基板，在其下方形成有安装焊盘，第一基板形成在芯基板下方并且具有形成在其中的第一腔体，第二基板形成在第一基板下方并且在其中形成有第二腔。 第一腔体和第二腔体彼此连接并从外部暴露安装垫。