Apparatus to minimize thermal impedance using copper on die backside
    41.
    发明授权
    Apparatus to minimize thermal impedance using copper on die backside 有权
    用于在模具背面使用铜来最小化热阻抗的装置

    公开(公告)号:US09406582B2

    公开(公告)日:2016-08-02

    申请号:US12179225

    申请日:2008-07-24

    摘要: A method and apparatus to minimize thermal impedance using copper on the die or chip backside. Some embodiments use deposited copper having a thickness chosen to complement a given chip thickness, in order to reduce or minimize wafer warpage. In some embodiments, the wafer, having a plurality of chips (e.g., silicon), is thinned (e.g., by chemical-mechanical polishing) before deposition of the copper layer, to reduce the thermal resistance of the chip. Some embodiments further deposit copper in a pattern of bumps, raised areas, or pads, e.g., in a checkerboard pattern, to thicken and add copper while reducing or minimizing wafer warpage and chip stress.

    摘要翻译: 使用铜芯在芯片或芯片背面上最小化热阻抗的方法和装置。 一些实施例使用具有选择的厚度的沉积铜来补充给定的芯片厚度,以便减小或最小化晶片翘曲。 在一些实施例中,具有多个芯片(例如硅)的晶片在沉积铜层之前被薄化(例如通过化学机械抛光),以降低芯片的热阻。 一些实施例进一步将铜以凸起,凸起区域或焊盘(例如棋盘图案)的图案沉积,以增加和添加铜,同时减少或最小化晶片翘曲和芯片应力。

    Low temperature solder metallurgy and process for packaging applications and structures formed thereby
    45.
    发明授权
    Low temperature solder metallurgy and process for packaging applications and structures formed thereby 有权
    低温焊料冶金和由此形成的包装应用和结构的工艺

    公开(公告)号:US07560373B1

    公开(公告)日:2009-07-14

    申请号:US12059281

    申请日:2008-03-31

    申请人: Fay Hua

    发明人: Fay Hua

    IPC分类号: H01L21/44

    摘要: Methods of forming a microelectronic structure are described. Those methods include applying a solder paste to a portion of a board, wherein the solder paste is not applied to a ball grid array region, and placing a BGA package comprising at least one low temperature solder ball on the ball grid array region, wherein the at least one low temperature solder ball comprises a eutectic tin bismuth based solder doped with at least one of copper and nickel.

    摘要翻译: 描述形成微电子结构的方法。 这些方法包括将焊膏施加到板的一部分,其中焊膏不施加到球栅阵列区域,并且将包括至少一个低温焊球的BGA封装放置在球栅阵列区域上,其中, 至少一个低温焊球包括掺杂有铜和镍中的至少一种的共晶锡铋基焊料。