公开(公告)号：US08900418B2

公开(公告)日：2014-12-02

申请号：US13677126

申请日：2012-11-14

申请人： Intermolecular, Inc.

发明人： Imran Hashim ,  Hanhong Chen ,  Tony Chiang ,  Indranil De ,  Nobi Fuchigami ,  Edward Haywood ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC分类号： C23C14/34 ,  B05D5/12 ,  H01L49/02 ,  C23C16/40 ,  C23C16/455 ,  H01L21/314 ,  H01L21/316 ,  H01L27/108 ,  H01L21/02

CPC分类号： H01L28/65 ,  C23C16/405 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02697 ,  H01L21/3141 ,  H01L21/31604 ,  H01L27/10852 ,  H01L28/40

摘要： This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

摘要翻译： 本公开内容提供（a）制造基于钇和钛的氧化物层（例如电介质层）的方法，以具有高介电常数和低泄漏特性，以及（b）相关的器件和结构。 具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。 在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。 如果需要，可以通过PVD工艺或者通过使用特定的前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺，作为反应过程的结果来生产氧化物层 反应。

公开(公告)号：US08865544B2

公开(公告)日：2014-10-21

申请号：US13546927

申请日：2012-07-11

申请人： Joseph Neil Greeley ,  Duane M. Goodner ,  Vishwanath Bhat ,  Vassil N. Antonov ,  Prashant Raghu

发明人： Joseph Neil Greeley ,  Duane M. Goodner ,  Vishwanath Bhat ,  Vassil N. Antonov ,  Prashant Raghu

IPC分类号： H01L21/8242

CPC分类号： H01L28/75 ,  B82Y30/00 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/65 ,  H01L28/90 ,  Y10S977/932 ,  Y10T428/265

摘要： Some embodiments include a method of forming a capacitor. An opening is formed through a silicon-containing mass to a base, and sidewalls of the opening are lined with protective material. A first capacitor electrode is formed within the opening and has sidewalls along the protective material. At least some of the silicon-containing mass is removed with an etch. The protective material protects the first capacitor electrode from being removed by the etch. A second capacitor electrode is formed along the sidewalls of the first capacitor electrode, and is spaced from the first capacitor electrode by capacitor dielectric. Some embodiments include multi-material structures having one or more of aluminum nitride, molybdenum nitride, niobium nitride, niobium oxide, silicon dioxide, tantalum nitride and tantalum oxide. Some embodiments include semiconductor constructions.

摘要翻译： 一些实施例包括形成电容器的方法。 通过含硅物质向基底形成开口，并且开口的侧壁衬有保护材料。 第一电容器电极形成在开口内并具有保护材料的侧壁。 用蚀刻去除至少一些含硅物质。 保护材料保护第一电容器电极不被蚀刻除去。 沿着第一电容器电极的侧壁形成第二电容器电极，并且通过电容器电介质与第一电容器电极间隔开。 一些实施例包括具有氮化铝，氮化钼，氮化铌，氧化铌，二氧化硅，氮化钽和氧化钽中的一种或多种的多材料结构。 一些实施例包括半导体结构。

公开(公告)号：US08828836B2

公开(公告)日：2014-09-09

申请号：US13153626

申请日：2011-06-06

申请人： Karthik Ramani ,  Hiroyuki Ode ,  Sandra Malhotra

发明人： Karthik Ramani ,  Hiroyuki Ode ,  Sandra Malhotra

IPC分类号： H01L21/20 ,  H01L49/02 ,  H01L29/92

CPC分类号： H01L28/40 ,  H01L28/60 ,  H01L28/65 ,  H01L29/92

摘要： A method for fabricating a dynamic random access memory (DRAM) capacitor stack is disclosed wherein the stack includes a first electrode, a dielectric layer, and a second electrode. The first electrode is formed from a conductive binary metal. A dielectric layer is formed over the first electrode. The dielectric layer is subjected to a milliseconds anneal process that serves to crystallize the dielectric material and decrease the concentration of oxygen vacancies.

摘要翻译： 公开了一种用于制造动态随机存取存储器（DRAM）电容器堆叠的方法，其中堆叠包括第一电极，电介质层和第二电极。 第一电极由导电二元金属形成。 在第一电极上形成电介质层。 对电介质层进行几毫秒的退火工艺，以使介电材料结晶并降低氧空位的浓度。

公开(公告)号：US08815612B2

公开(公告)日：2014-08-26

申请号：US13489206

申请日：2012-06-05

申请人： Naoya Sashida

发明人： Naoya Sashida

IPC分类号： H01L21/00 ,  H01L27/115 ,  H01L49/02 ,  G11C11/22

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11507 ,  H01L28/57 ,  H01L28/65

摘要： A ferroelectric memory device includes a field effect transistor formed on a semiconductor substrate, an interlayer insulation film formed on the semiconductor substrate so as to cover the field effect transistor, a conductive plug formed in the interlayer insulation film in contact with the first diffusion region, and a ferroelectric capacitor formed over the interlayer insulation in contact with the conductive plug, wherein the ferroelectric capacitor includes a ferroelectric film and upper and lower electrodes sandwiching the ferroelectric film respectively from above and below, the lower electrode being connected electrically to the conductive plug, a layer containing oxygen being interposed between the conductive plug and the lower electrode, a layer containing nitrogen being interposed between the layer containing oxygen and the lower electrode, a self-aligned layer being interposed between the layer containing nitrogen and the lower electrode.

摘要翻译： 铁电存储器件包括形成在半导体衬底上的场效应晶体管，形成在半导体衬底上以覆盖场效应晶体管的层间绝缘膜，形成在与第一扩散区接触的层间绝缘膜中的导电插塞， 以及形成在与所述导电插塞接触的所述层间绝缘体上的铁电电容器，其中，所述强电介质电容器包括强电介质膜和分别从上下夹着所述铁电体膜的上下电极，所述下电极与所述导电插塞电连接， 介于导电插塞和下电极之间的含有氧的层，包含氮的层包含在含氧层和下电极的层之间，自对准层插入在含氮层和下电极之间。

公开(公告)号：US20140187015A1

公开(公告)日：2014-07-03

申请号：US13727898

申请日：2012-12-27

申请人： INTERMOLECULAR, INC. ,  ELPIDA MEMORY, INC.

发明人： Xiangxin Rui ,  Mitsuhiro Horikawa ,  Hiroyuki Ode ,  Karthik Ramani

IPC分类号： H01L49/02

CPC分类号： H01L28/40 ,  H01L28/56 ,  H01L28/65 ,  H01L28/75

摘要： A first electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the first electrode layer contains a conductive base layer and conductive metal oxide layer. A second electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the second electrode layer contains a conductive base layer and conductive metal oxide layer. In some embodiments, both the first electrode layer and the second electrode layer contain a conductive base layer and conductive metal oxide layer.

公开(公告)号：US08765569B2

公开(公告)日：2014-07-01

申请号：US13160132

申请日：2011-06-14

申请人： Hanhong Chen ,  Wim Deweerd ,  Hiroyuki Ode

发明人： Hanhong Chen ,  Wim Deweerd ,  Hiroyuki Ode

IPC分类号： H01L21/20 ,  H01L21/8242 ,  H01L21/329

CPC分类号： H01L28/65 ,  H01L28/75

摘要： A metal oxide bilayer second electrode for a MIM DRAM capacitor is formed wherein the layer of the electrode that is in contact with the dielectric layer (i.e. bottom layer) has a desired composition and crystal structure. An example is crystalline MoO2 if the dielectric layer is TiO2 in the rutile phase. The other component of the bilayer (i.e. top layer) is a sub-oxide of the same material as the bottom layer. The top layer serves to protect the bottom layer from oxidation during subsequent PMA or other DRAM fabrication steps by reacting with any oxygen species before they can reach the bottom layer of the bilayer second electrode.

摘要翻译： 形成用于MIM DRAM电容器的金属氧化物双层第二电极，其中与电介质层（即，底层）接触的电极层具有期望的组成和晶体结构。 如果电介质层是金红石相中的TiO 2，那么结晶MoO2就是一个例子。 双层的另一部分（即顶层）是与底层相同的材料的次氧化物。 顶层用于在随后的PMA或其它DRAM制造步骤期间通过与任何氧物种反应而在它们可以到达双层第二电极的底层之前保护底层免受氧化。

公开(公告)号：US20140077337A1

公开(公告)日：2014-03-20

申请号：US13737156

申请日：2013-01-09

申请人： INTERMOLECULAR, INC.

发明人： Hanhong Chen ,  Edward Haywood ,  Sandra Malhotra ,  Hiroyuki Ode

IPC分类号： H01L29/92

CPC分类号： H01L29/92 ,  C23C16/45525 ,  H01L21/28562 ,  H01L28/65 ,  H01L28/75

摘要： A first electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the first electrode layer contains a conductive metal oxide formed using a high temperature, low pressure ALD process. The high temperature ALD process results in a layer with enhanced crystallinity, higher density, reduced shrinkage, and lower carbon contamination. The high temperature ALD process can be used for either or both the bottom electrode and the top electrode layers.

摘要翻译： 形成金属绝缘体金属（MIM）DRAM电容器的第一电极层，其中第一电极层含有使用高温低压ALD工艺形成的导电金属氧化物。 高温ALD工艺产生了具有增强的结晶度，较高密度，降低的收缩率和较低的碳污染的层。 高温ALD工艺可以用于底部电极和顶部电极层中的一个或两个。

公开(公告)号：US08664011B2

公开(公告)日：2014-03-04

申请号：US13780177

申请日：2013-02-28

申请人： Fujitsu Semiconductor Limited

发明人： Wensheng Wang

IPC分类号： H01L21/02

CPC分类号： H01L21/02104 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65

摘要： An upper electrode of a ferroelectric capacitor has a first layer formed of a first oxide expressed by a chemical formula AOx1 (A: metal, O: oxygen) using a stoichiometric composition parameter x1, and expressed by a chemical formula AOx2 using a actual composition parameter x2, and a second layer formed of a second oxide, formed on the first layer, expressed by a chemical formula BOy1 (B: metal) using a stoichiometric composition parameter y1 and expressed by a chemical formula BOy2 using a actual composition parameter y2, which includes at least one of stone-wall crystal and column crystal.

摘要翻译： 铁电电容器的上电极具有使用化学式AOx1（A：金属，O：氧）表示的第一氧化物，使用化学计量组成参数x1形成的第一层，并由化学式AOx2表示，使用实际组成参数 x2，以及由化学式BOy1（B：金属）表示的第一层形成的第二层的第二层，使用化学计量组成参数y1，并使用实际组成参数y2由化学式BOy2表示， 包括石壁晶体和柱晶中的至少一种。

公开(公告)号：US08629487B2

公开(公告)日：2014-01-14

申请号：US13756675

申请日：2013-02-01

申请人： Fujitsu Semiconductor Limited

发明人： Wensheng Wang

IPC分类号： H01L21/283 ,  H01L21/8239 ,  H01L29/43 ,  H01L29/772

CPC分类号： H01L28/40 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65

摘要： A semiconductor device includes a substrate and a ferroelectric capacitor including a lower electrode, a ferroelectric film, and an upper electrode. The upper electrode includes a first layer formed of an oxide whose stoichiometric composition is expressed as AOx1 and whose actual composition is expressed as AOx2; a second layer formed on the first layer and formed of an oxide whose stoichiometric composition is expressed as BOy1 and whose actual composition is expressed as BOy2; and a metal layer formed on the second layer. The second layer is higher in ratio of oxidation than the first layer. The composition parameters x1, x2, y1, and y2 satisfy y2/y1>x2/x1, and the second layer includes an interface layer of the stoichiometric composition formed at an interface with the metal layer. The interface layer is higher in ratio of oxidation than the rest of the second layer.

摘要翻译： 半导体器件包括基板和包括下电极，铁电体膜和上电极的铁电电容器。 上电极包括由化学计量组成表示为AOx1的氧化物形成的第一层，其实际组成表示为AOx2; 形成在第一层上并由化学计量组成表示为BOy1并且其实际组成表示为BOy2的氧化物形成的第二层; 以及形成在第二层上的金属层。 第二层的氧化比例高于第一层。 组成参数x1，x2，y1和y2满足y2 / y1> x2 / x1，第二层包括在与金属层的界面处形成的化学计量组成的界面层。 界面层的氧化比例高于第二层的其余部分。

公开(公告)号：US08609440B2

公开(公告)日：2013-12-17

申请号：US13756720

申请日：2013-02-01

申请人： Fujitsu Semiconductor Limited

发明人： Wensheng Wang

IPC分类号： H01L21/18

CPC分类号： H01L28/40 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65

摘要： A semiconductor device includes a substrate and a ferroelectric capacitor including a lower electrode, a ferroelectric film, and an upper electrode. The upper electrode includes a first layer formed of an oxide whose stoichiometric composition is expressed as AOx1 and whose actual composition is expressed as AOx2; a second layer formed on the first layer and formed of an oxide whose stoichiometric composition is expressed as BOy1 and whose actual composition is expressed as BOy2; and a metal layer formed on the second layer. The second layer is higher in ratio of oxidation than the first layer. The composition parameters x1, x2, y1, and y2 satisfy y2/y1>x2/x1, and the second layer includes an interface layer of the stoichiometric composition formed at an interface with the metal layer. The interface layer is higher in ratio of oxidation than the rest of the second layer.

摘要翻译： 半导体器件包括基板和包括下电极，铁电体膜和上电极的铁电电容器。 上电极包括由化学计量组成表示为AOx1的氧化物形成的第一层，其实际组成表示为AOx2; 形成在第一层上并由化学计量组成表示为BOy1并且其实际组成表示为BOy2的氧化物形成的第二层; 以及形成在第二层上的金属层。 第二层的氧化比例高于第一层。 组成参数x1，x2，y1和y2满足y2 / y1> x2 / x1，第二层包括在与金属层的界面处形成的化学计量组成的界面层。 界面层的氧化比例高于第二层的其余部分。