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117 条记录 (耗时 0.018 秒)

    Method for in-line testing of flip-chip semiconductor assemblies
    53.
    发明授权
    Method for in-line testing of flip-chip semiconductor assemblies 失效

    公开(公告)号：US07105366B2

    公开(公告)日：2006-09-12

    申请号：US10338522

    申请日：2005-09-08

    申请人： Chad A. Cobbley ,  John VanNortwick ,  Bret K. Street ,  Tongbi Jiang

    发明人： Chad A. Cobbley ,  John VanNortwick ,  Bret K. Street ,  Tongbi Jiang

    IPC分类号： G01R31/26

    CPC分类号： G01R1/0483 ,  Y10T29/4913 ,  Y10T29/49144

    摘要： Flip-chip semiconductor assemblies, each including integrated circuit (IC) dice and an associated substrate, are electrically tested before encapsulation using an in-line or in situ test socket or probes at a die-attach station. Those assemblies using “wet” quick-cure epoxies for die attachment may be tested prior to the epoxy being cured by pressing the integrated circuit (IC) dice against interconnection points on the substrate for electrical connection, while those assemblies using “dry” epoxies may be cured prior to testing. In either case, any failures in the dice or in the interconnections between the dice and the substrates can be easily fixed, and the need for the use of known-good-die (KGD) rework procedures during repair is eliminated.

    Method of encapsulating interconnecting units in packaged microelectronic devices
    54.
    发明授权
    Method of encapsulating interconnecting units in packaged microelectronic devices 有权
    在封装的微电子器件中封装互连单元的方法

    公开(公告)号：US07101737B2

    公开(公告)日：2006-09-05

    申请号：US10970399

    申请日：2004-10-20

    申请人： Chad A. Cobbley

    发明人： Chad A. Cobbley

    IPC分类号： H01L21/48 ,  H05K3/30

    CPC分类号： H01L23/3121 ,  H01L21/565 ,  H01L23/13 ,  H01L23/4985 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/4824 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  Y10T29/49146 ,  Y10T29/49171 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： Methods and apparatuses for encapsulating a microelectronic die or other components in the fabrication of packaged microelectronic devices. In one aspect of the invention, a packaged microelectronic device assembly includes a microelectronic die, a substrate attached to the die, a protective casing covering a portion of the substrate, and a barrier projecting away from the surface of the substrate. The microelectronic die can have an integrated circuit and a plurality of bond-pads operatively coupled to the integrated circuit. The substrate can have a cap-zone defined by an area that is to be covered by the protective casing, a plurality of contact elements arranged in the cap-zone, a plurality of ball-pads arranged in a ball-pad array outside of the cap-zone, and a plurality of conductive lines coupling the contact elements to the ball-pads. The contact elements are electrically coupled to corresponding bond-pads on the microelectronic die, and the protective casing covers the cap-zone. The barrier on the surface of the substrate is configured so that at least a portion of the barrier is outside of the cap-zone and adjacent to at least a portion of the molded section. The barrier is a seal that inhibits the thermosetting material of the protective casing from covering a portion of the substrate outside of the cap-zone. As such, the barrier prevents thermosetting material from leaking between the substrate and a mold outside of the cap-zone during a molding process.

    摘要翻译： 用于将微电子管芯或其他部件封装在封装的微电子器件的制造中的方法和装置。 在本发明的一个方面，封装的微电子器件组件包括微电子管芯，连接到管芯的衬底，覆盖衬底的一部分的保护壳体以及远离衬底的表面突出的阻挡层。 微电子管芯可以具有集成电路和可操作地耦合到集成电路的多个接合焊盘。 衬底可以具有由被保护壳体覆盖的区域限定的帽区域，布置在帽区域中的多个接触元件，布置在球垫阵列外部的球垫阵列中的多个球垫 帽区，以及将接触元件耦合到球垫的多个导线。 接触元件电耦合到微电子管芯上的相应接合焊盘，并且保护套管覆盖盖区。 衬底表面上的阻挡层被构造成使得阻挡层的至少一部分在帽区域的外部并且与模制部分的至少一部分相邻。 阻挡层是抑制保护壳体的热固性材料在盖帽区域外部覆盖基底的一部分的密封件。 因此，在模制过程中，屏障防止热固性材料在盖区之外的基板和模具之间泄漏。

    Method for in-line testing of flip-chip semiconductor assemblies
    56.
    发明授权
    Method for in-line testing of flip-chip semiconductor assemblies 失效

    公开(公告)号：US07005878B2

    公开(公告)日：2006-02-28

    申请号：US10900610

    申请日：2004-07-27

    申请人： Chad A. Cobbley ,  John VanNortwick ,  Bret K. Street ,  Tongbi Jiang

    发明人： Chad A. Cobbley ,  John VanNortwick ,  Bret K. Street ,  Tongbi Jiang

    IPC分类号： G01R31/26

    CPC分类号： G01R1/0483 ,  Y10T29/4913 ,  Y10T29/49144

    摘要： Flip-chip semiconductor assemblies, each including integrated circuit (IC) dice and an associated substrate, are electrically tested before encapsulation using an in-line or in situ test socket or probes at a die-attach station. Those assemblies using “wet” quick-cure epoxies for die attachment may be tested prior to the epoxy being cured by pressing the integrated circuit (IC) dice against interconnection points on the substrate for electrical connection, while those assemblies using “dry” epoxies may be cured prior to testing. In either case, any failures in the dice or in the interconnections between the dice and the substrates can be easily fixed, and the need for the use of known-good-die (KGD) rework procedures during repair is eliminated.

    Apparatus and methods of automated wafer-grinding using grinding surface position monitoring
    59.
    发明授权
    Apparatus and methods of automated wafer-grinding using grinding surface position monitoring 有权
    使用研磨表面位置监测的自动晶片磨削的装置和方法

    公开(公告)号：US06572444B1

    公开(公告)日：2003-06-03

    申请号：US09655002

    申请日：2000-08-31

    申请人： Michael B. Ball ,  Chad A. Cobbley

    发明人： Michael B. Ball ,  Chad A. Cobbley

    IPC分类号： B24B4900

    CPC分类号： B24B7/228 ,  B24B47/22 ,  B24B49/00

    摘要： Apparatus and methods of automated wafer-grinding using grinding surface position monitoring. In one embodiment, an apparatus for grinding a working surface includes a grinding surface engageable with at least a portion of the working surface, and a feed mechanism that controllably adjusts a position of the grinding surface. The apparatus further includes a position sensor that senses a position of the grinding surface along an axis approximately normal to the working surface and a controller that receives a position signal from the position sensor and transmits a control signal to the feed mechanism in response to the position signal. In alternate embodiments, the position sensor may be an acoustic sensor, an optical sensor, or another type of sensor. The grinding surface may include a grinding material suspended in a binder, the grinding material being worn during grinding. In an alternate embodiment, an apparatus further includes a supplemental sensor that senses an operating characteristic and outputs a characteristic signal. The controller receives the characteristic signal and transmits the control signal to the feed mechanism based on at least one of the position signal or the characteristic signal. In alternate embodiments, the characteristic signal may include a pressure of the grinding surface on the working surface, a shaft speed of a drive shaft, or a current drawn by a drive motor.

    摘要翻译： 使用研磨表面位置监测的自动晶片磨削的装置和方法。 在一个实施例中，用于研磨工作表面的设备包括可与工作表面的至少一部分接合的研磨表面以及可调节地调节研磨表面的位置的进给机构。 该装置还包括位置传感器，其沿着大致垂直于工作表面的轴感测研磨表面的位置;以及控制器，其接收来自位置传感器的位置信号，并响应于该位置向控制信号传送控制信号 信号。 在替代实施例中，位置传感器可以是声学传感器，光学传感器或另一种类型的传感器。 研磨表面可以包括悬浮在粘合剂中的研磨材料，研磨材料在研磨期间磨损。 在替代实施例中，装置还包括检测操作特性并输出特征信号的补充传感器。 控制器接收特征信号，并且基于位置信号或特征信号中的至少一个将控制信号发送到馈送机构。 在替代实施例中，特征信号可以包括工作表面上的研磨表面的压力，驱动轴的轴速度或由驱动马达吸取的电流。