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    High-voltage semiconductor component
    62.
    发明授权
    High-voltage semiconductor component 有权
    高压半导体元件

    公开(公告)号：US06825514B2

    公开(公告)日：2004-11-30

    申请号：US10455858

    申请日：2003-06-06

    申请人： Gerald Deboy ,  Dirk Ahlers ,  Helmut Strack ,  Michael Rueb ,  Hans Martin Weber

    发明人： Gerald Deboy ,  Dirk Ahlers ,  Helmut Strack ,  Michael Rueb ,  Hans Martin Weber

    IPC分类号： H01L2980

    CPC分类号： H01L29/7816 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/41766 ,  H01L29/4232 ,  H01L29/4238 ,  H01L29/7801 ,  H01L29/7802

    摘要： A process for manufacturing of a semiconductor device comprising a blocking pn junction, a source zone of a first conductivity type connected to a first electrode and bordering on a zone forming the blocking pn junction of a second conductivity type complementary to the first conductivity type, and a drain zone of the first conductivity type connected to a second electrode, the side of the zone of the second conductivity type facing the drain zone forming a first surface, and in the region between the first surface and a second surface located between the first surface and the drain zone, areas of the first and second conductivity type nested in one another, comprises the step of: varying in individual semiconductor layers, by doping, the degree of compensation in the regions of the second conductivity type.

    摘要翻译： 一种用于制造半导体器件的方法，该半导体器件包括阻挡pn结，与第一电极连接并与形成与第一导电类型互补的第二导电类型的阻挡pn结的区域接壤的第一导电类型的源区，以及 连接到第二电极的第一导电类型的漏极区，形成第一表面的第二导电类型的区域的侧面，并且在第一表面和位于第一表面之间的第二表面之间的区域中 并且漏区，第一和第二导电类型的区域彼此嵌套，包括以下步骤：通过掺杂在各个半导体层中改变第二导电类型的区域中的补偿程度。

    MOS component with a particular source and base structure
    64.
    发明授权
    MOS component with a particular source and base structure 失效
    MOS组件具有特定的源和基础结构

    公开(公告)号：US5396088A

    公开(公告)日：1995-03-07

    申请号：US240138

    申请日：1994-05-10

    申请人： Helmut Strack

    发明人： Helmut Strack

    IPC分类号： H01L29/10 ,  H01L29/739 ,  H01L29/78 ,  H01L29/784

    CPC分类号： H01L29/7395 ,  H01L29/1095 ,  H01L29/7802 ,  H01L2924/0002

    摘要： The source zone of an MOS component on a semiconductor body is disposed on the upper side of the gate electrode, and is in contact at an upper side of the source zone, with a source electrode. The base zone laterally adjoins the source zone and laterally adjoins the gate electrode at the drain zone. The minority charge carriers which flow from the semiconductor body to the cathode therefore flow directly to the source electrode through that part of the base zone disposed next to the gate electrode. An activation of a parasitic bipolar transistor, and thus the occurrence of so-called second breakdown, are thus avoided.

    摘要翻译： 半导体主体上的MOS部件的源极区域设置在栅电极的上侧，并且在源极区的上侧与源电极接触。 基区横向邻接源区，并在漏区附近横向邻接栅电极。 因此，从半导体本体流到阴极的少数电荷载流子通过靠近栅电极的基极区的一部分直接流到源电极。 因此避免了寄生双极晶体管的激活，从而避免了所谓的第二击穿的发生。

    Compensation semiconductor component and method of fabricating the semiconductor component
    70.
    发明授权
    Compensation semiconductor component and method of fabricating the semiconductor component 有权

    公开(公告)号：US06614090B2

    公开(公告)日：2003-09-02

    申请号：US09974650

    申请日：2001-10-09

    申请人： Gerald Deboy ,  Helmut Strack

    发明人： Gerald Deboy ,  Helmut Strack

    IPC分类号： H01L2358

    CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/66712 ,  H01L29/7802 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The semiconductor component is a charge carrier compensation component formed in a semiconductor body. A semiconductor basic body is disposed in the semiconductor body. The basic body has at least one compensation layer which adjoins a boundary layer and first regions of a first conductivity type and second regions of a second conductivity type are provided along a layout grid. A total quantity of charge of the first regions corresponds approximately to a total quantity of charge of the second regions. At least one semiconductor layer in the semiconductor body adjoins the semiconductor basic body at the boundary layer. A multiplicity of doped regions are embedded in the first surface of the semiconductor layer which form a grid for a cell array of the semiconductor component. The grid in the semiconductor layer is aligned independently of the layout grid in the semiconductor basic body.