公开(公告)号：US20060158315A1

公开(公告)日：2006-07-20

申请号：US10562464

申请日：2003-08-11

申请人： Mitsuo Usami

发明人： Mitsuo Usami

IPC分类号： H04Q5/22

CPC分类号： G06K7/0008 ,  G06K7/10039 ,  G06K19/0723

摘要： Transmission and reception of the identification number to/from an interrogator includes an interrogator that reads a recognition number from a responder by radio. When a clock pulse is modulated on a high-frequency carrier and transmitted to the responder from the antenna of the interrogator, there are a first case when the clock pulse interval is short and a second case when the clock pulse interval is long. By combining the clock pulse of the first case and the clock pulse of the second case so as to control the read of the recognition number from the interrogator, it is possible to realize reduction of the semiconductor chip size of the responder and suppress the cost of the semiconductor chip

摘要翻译： 向/从询问器发送和接收识别号码包括通过无线电从应答器读取识别号码的询问器。 当在高频载波上调制时钟脉冲并从询问器的天线发送到应答器时，存在时钟脉冲间隔短的第一种情况，当时钟脉冲间隔较长时，存在第二种情况。 通过组合第一种情况的时钟脉冲和第二种情况下的时钟脉冲，以便控制来自询问器的识别号码的读取，可以实现响应者的半导体芯片尺寸的减小并抑制成本 半导体芯片

公开(公告)号：US20060151620A1

公开(公告)日：2006-07-13

申请号：US11370902

申请日：2006-03-09

申请人： Mitsuo Usami ,  Akira Sato

发明人： Mitsuo Usami ,  Akira Sato

IPC分类号： G06K19/06

CPC分类号： G06K19/07728 ,  G06K19/07745 ,  G06K19/07749 ,  G06K19/0775 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/07811 ,  H01L2924/13091 ,  H01L2924/00

摘要： A wireless IC tag is provided which includes a plate-shaped first conductor, a plate-shaped second conductor, and an IC chip which is sandwiched between the first conductor and the second conductor via a front surface and a rear surface of the IC chip. The IC chip includes a double voltage rectifier circuit to rectify an alternating voltage induced between the front surface and the rear surface of the IC chip. The second conductor functions as an antenna and also includes a slit extending from a center portion thereof in a longitudinal direction. The first conductor electrically connects both sides of the slit via the front surface and the rear surface of the IC chip.

摘要翻译： 提供了一种无线IC标签，其包括经由IC芯片的前表面和后表面夹在第一导体和第二导体之间的板状第一导体，板状第二导体和IC芯片。 IC芯片包括用于对在IC芯片的前表面和后表面之间感应的交流电压进行整流的双电压整流电路。 第二导体用作天线，并且还包括从其纵向方向上的中心部分延伸的狭缝。 第一导体经由IC芯片的前表面和后表面电连接狭缝的两侧。

公开(公告)号：US06922686B2

公开(公告)日：2005-07-26

申请号：US09931251

申请日：2001-08-17

申请人： Chikashi Okamoto ,  Kazuo Takaragi ,  Yasuko Fukuzawa ,  Hideki Tokuyama ,  Mitsuo Usami

发明人： Chikashi Okamoto ,  Kazuo Takaragi ,  Yasuko Fukuzawa ,  Hideki Tokuyama ,  Mitsuo Usami

IPC分类号： G06Q50/28 ,  G06F17/30 ,  G06Q50/00

CPC分类号： G06Q10/08 ,  Y10S707/944 ,  Y10S707/955 ,  Y10S707/96 ,  Y10S707/961 ,  Y10S707/99931 ,  Y10S707/99936

摘要： The technology includes the steps of: associating material-object identification code identifying each individual material object with material-object information representing information about material object identified by identification code and storing identification code and material-object information in material-object information database in each of business categories; sending code and information stored in database in each business category; integrating items of information having same code with each other among codes and items of information received from database in each business category to generate integrated material-object information, associating identification code with integrated material-object information identified by code and storing identification code and integrated material-object information in integrated database; requesting to send integrated material-object information associated with given identification code; reading requested integrated material-object information from integrated database and sending integrated information to requester of integrated material-object information; and receiving and outputting sent integrated material-object information.

摘要翻译： 该技术包括以下步骤：将识别每个单独材料对象的材料对象识别代码与表示由识别码识别的材料对象的信息的材料对象信息相关联，并将物理对象信息数据库中的识别码和素材对象信息存储在每个 业务类别; 在每个业务类别中发送存储在数据库中的代码和信息; 在每个业务类别中从代码和从数据库接收的信息项之间整合具有相同代码的信息的项目以产生综合材料对象信息，将识别代码与通过代码识别的综合材料对象信息相关联并存储识别码和集成材料 - 综合数据库中的对象信息; 请求发送与给定识别码相关联的综合物料对象信息; 从综合数据库读取所需的综合物料信息，并向综合资料对象信息请求者发送综合信息; 并接收和输出发送的综合物料对象信息。

公开(公告)号：US06867478B2

公开(公告)日：2005-03-15

申请号：US10410175

申请日：2003-04-10

申请人： Mitsuo Usami

发明人： Mitsuo Usami

IPC分类号： G06K19/07 ,  G06K19/077 ,  H01L21/68 ,  H01L23/12 ,  H01L23/498 ,  H01L25/04 ,  H01L25/18 ,  H01L29/93 ,  H01L27/082 ,  H01L27/102 ,  H01L29/70 ,  H01L31/11

CPC分类号： H01L21/6835 ,  G06K19/07745 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07779 ,  G06K19/07786 ,  H01L23/49838 ,  H01L23/49855 ,  H01L2221/68354 ,  H01L2221/68368 ,  H01L2224/83191 ,  H01L2924/01019 ,  H01L2924/07811 ,  H01L2924/19041 ,  Y10S257/91 ,  Y10S438/928 ,  H01L2924/00

摘要： A semiconductor device manufacturing method is used for packaging a thin semiconductor chip in an economical manner. A semiconductor chip having one electrode terminal, a first member having a first conductor on its surface, and a second member having a second conductor on its surface are prepared. The first and second members are positioned such that the first and second conductors face each other, and the semiconductor chip is held between the members. In this arrangement, one of the first and second conductors is in electrical contact with the first electrode.

摘要翻译： 半导体器件制造方法以经济的方式用于封装薄的半导体芯片。 准备具有一个电极端子的半导体芯片，在其表面上具有第一导体的第一构件和在其表面上具有第二导体的第二构件。 第一和第二构件被定位成使得第一和第二导体彼此面对，并且半导体芯片保持在构件之间。 在这种布置中，第一和第二导体之一与第一电极电接触。

公开(公告)号：US06679428B2

公开(公告)日：2004-01-20

申请号：US09784123

申请日：2001-02-16

申请人： Masaya Miura ,  Yutaka Miyazaki ,  Mitsuo Usami ,  Takashi Yoshida

发明人： Masaya Miura ,  Yutaka Miyazaki ,  Mitsuo Usami ,  Takashi Yoshida

IPC分类号： G06K708

CPC分类号： G06K19/07796 ,  G06K7/0008

摘要： A carrier case for accommodating paper sheets, cards or the like having radio frequency data carriers attached thereto or watermarked therein. A device is provided for reading out information from the radio frequency data carriers while eliminating the need for externally removing the paper sheets, cards or the like having the radio frequency data carriers attached thereto or watermarked therein. The carrier case is provided therein with an opening for insertion of the data reading device, and is also provided with a movable divider plate. When it is desired to read out data from the radio frequency data carriers, the divider plate is tilted so that the data reading device can read out the data from the data carriers with a good sensitivity in a relationship contacted with the radio frequency data carriers or not contacted therewith.

摘要翻译： 一种用于容纳附有其或具有水印的射频数据载体的纸张，卡片等的载体盒。 提供一种用于从射频数据载体读出信息的装置，同时不需要外部移除附有其上附加了水印的无线电频率数据载体的纸张，卡等。 载体壳体中设置有用于插入数据读取装置的开口，并且还设置有可移动分隔板。 当希望从射频数据载体读出数据时，分频板被倾斜，使得数据读取装置可以以与射频数据载体接触的关系中具有良好灵敏度的数据载体读出数据，或者 不与其接触。

公开(公告)号：US06657542B2

公开(公告)日：2003-12-02

申请号：US09940537

申请日：2001-08-29

申请人： Mitsuo Usami

发明人： Mitsuo Usami

IPC分类号： G08B1314

CPC分类号： H01L24/01 ,  G06K7/0008 ,  G06K19/02 ,  G06K19/041 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07758 ,  G06K19/07786 ,  H01L21/50 ,  H01L23/051 ,  H01L23/08 ,  H01L23/291 ,  H01L23/3107 ,  H01L23/48 ,  H01L23/4827 ,  H01L23/552 ,  H01L23/645 ,  H01L23/66 ,  H01L24/83 ,  H01L2223/6677 ,  H01L2224/274 ,  H01L2224/45124 ,  H01L2224/83801 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/16588 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01Q1/2283 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/83205

摘要： An electronic device, in which a flat plate semiconductor and dumets connected to surface electrodes on the front and back surfaces of the semiconductor and to lead wires are encapsulated in a glass tube.

公开(公告)号：US06604234B2

公开(公告)日：2003-08-05

申请号：US09864312

申请日：2001-05-25

申请人： Toshio Suzuki ,  Mitsuo Usami

发明人： Toshio Suzuki ,  Mitsuo Usami

IPC分类号： G06F1750

CPC分类号： H01L27/11293 ,  H01L27/0207

摘要： In a method of designing/manufacturing a plurality of semiconductor integrated circuit devices having built-in ROMs each storing different data on a single wafer, a ROM pattern is formed in combination with a pattern that is common to a plurality of semiconductor integrated circuit devices other than the ROM pattern.

摘要翻译： 在设计/制造具有内置ROM的多个半导体集成电路器件的方法中，每个半导体集成电路器件在单个晶片上存储不同的数据，ROM图案与多个半导体集成电路器件其他 比ROM模式。

公开(公告)号：US06589818B2

公开(公告)日：2003-07-08

申请号：US10260409

申请日：2002-10-01

申请人： Mitsuo Usami ,  Kunihiro Tsubosaki ,  Kunihiko Nishi

发明人： Mitsuo Usami ,  Kunihiro Tsubosaki ,  Kunihiko Nishi

IPC分类号： H01L2144

CPC分类号： H01L21/6835 ,  H01L21/6836 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2224/29 ,  H01L2224/29007 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01061 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/19043 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

摘要： A semiconductor chip (105′) and a substrate (102) are bonded with an organic adhesive layer (409) containing conductive particles (406), and a pad (405) and an electrode (412) are mutually, electrically connected through the conductive particles (406). The semiconductor chip (105′) is formed by contacting a semiconductor wafer (105) attached to a tape (107) with an etchant while rotating the semiconductor wafer (105) within an in-plane direction at a high speed or reciprocating the wafer (105) laterally to uniformly etch the semiconductor wafer (105) thereby reducing the thickness thereof, and dicing the thus reduced wafer. The resultant thin chip (105′) is hot-pressed by means of a heating head (106) for bonding on the substrate (102). In this way, a thin semiconductor chip can be formed stably at low costs and bonded on a substrate without causing any crack of the chip, thereby obtaining a semiconductor device which is unlikely to break owing to the bending stress from outside.

摘要翻译： 半导体芯片（105'）和基板（102）与包含导电颗粒（406）的有机粘合剂层（409）接合，并且焊盘（405）和电极（412）相互电连接，通过导电 颗粒（406）。 半导体芯片（105'）通过使附接到带（107）的半导体晶片（105）与蚀刻剂接触而形成，同时使半导体晶片（105）在平面内方向高速旋转或使晶片 105）以均匀蚀刻半导体晶片（105），从而减小其厚度，并切割由此减小的晶片。 所得到的薄片（105'）通过加热头（106）热压，用于在基底（102）上粘合。 以这种方式，可以以低成本稳定地形成薄的半导体芯片，并且结合在基板上而不引起芯片的任何裂纹，从而获得由于来自外部的弯曲应力而不可能破裂的半导体器件。

公开(公告)号：US06342434B1

公开(公告)日：2002-01-29

申请号：US09077548

申请日：1998-06-01

申请人： Toshio Miyamoto ,  Kunihiro Tsubosaki ,  Mitsuo Usami

发明人： Toshio Miyamoto ,  Kunihiro Tsubosaki ,  Mitsuo Usami

IPC分类号： H01L2146

CPC分类号： H01L21/6835 ,  G06K19/077 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07779 ,  G06K19/07783 ,  H01L23/49855 ,  H01L23/5388 ,  H01L24/27 ,  H01L24/28 ,  H01L24/83 ,  H01L2221/68318 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/81903 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2224/83851 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/01022 ,  H01L2924/3512

摘要： A semiconductor wafer is made thin without any cracks or warp under good workability. The semiconductor wafer thinning process includes the first step of preparing a carrier formed of a base and a suction pad provided on one surface of the base or formed of a base film with an adhesive, the second step of bonding a semiconductor wafer to the carrier in such a manner that a rear surface of the semiconductor wafer with no circuit elements formed therein is opposite to the carrier to form a wafer composite, and the third step of holding the carrier of the wafer composite with its semiconductor wafer side up and spin-coating an etchant on the rear surface of the semiconductor wafer thereby to make the semiconductor wafer thin.

摘要翻译： 半导体晶片制成薄而没有任何裂纹或翘曲的良好的可加工性。 半导体晶片减薄处理包括：准备由基底形成的载体和设置在基底的一个表面上或由基底膜与粘合剂形成的吸附垫的第一步骤，将半导体晶片接合到载体上的第二步骤 这样一种方式使得其中形成有电路元件的半导体晶片的后表面与载体相反以形成晶片复合物，并且第三步骤将晶片复合材料的载体保持在其半导体晶片侧面向上并且旋涂 在半导体晶片的后表面上形成蚀刻剂，从而使半导体晶片变薄。

公开(公告)号：US6166911A

公开(公告)日：2000-12-26

申请号：US930057

申请日：1997-11-20

申请人： Mitsuo Usami ,  Kunihiko Nishi ,  Yoshikatsu Mikami ,  Masakatsu Suzuki

发明人： Mitsuo Usami ,  Kunihiko Nishi ,  Yoshikatsu Mikami ,  Masakatsu Suzuki

IPC分类号： B42D15/10 ,  G06K19/077 ,  H01L23/498 ,  H01L23/64 ,  H01L25/16 ,  H05K3/32 ,  H05K7/14 ,  G06K19/02 ,  H01Q1/36

CPC分类号： G06K19/07728 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07779 ,  G06K19/07783 ,  H01L23/49855 ,  H01L23/49883 ,  H01L23/642 ,  H01L23/645 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12033 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

摘要： Provided is a semiconductor assembly, comprising a circuit board (1) including a conductor circuit (4), the conductor circuit including connecting pads, a semiconductor chip (2) provided with connecting terminals provided on a first surface thereof, and mounted on the circuit board, a casing (5) covering the circuit board, wherein the connecting pads of the conductor circuit and the connecting terminals of the semiconductor chip are disposed in mutually opposing relationship, and are connected with each other by an electroconductive bonding agent, a neutral plane of the semiconductor chip substantially coinciding with an overall neutral plane of the semiconductor assembly.

摘要翻译： PCT No.PCT / JP96 / 01348 Sec。 371日期：1997年11月20日 102（e）日期1997年11月20日PCT提交1996年5月22日PCT公布。 公开号WO96 / 37917 日期：1996年11月28日提供了一种半导体组件，包括包括导体电路（4）的电路板（1），包括连接焊盘的导体电路，设置在其第一表面上的连接端子的半导体芯片（2） 并且安装在电路板上的覆盖电路板的壳体（5），其中导体电路的连接焊盘和半导体芯片的连接端子以相互相对的关系设置，并且通过导电接合 所述半导体芯片的中性平面基本上与所述半导体组件的整体中性平面重合。