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    CONTACT MODULE FOR OPTIMIZING EMITTER AND CONTACT RESISTANCE
    61.
    发明申请
    CONTACT MODULE FOR OPTIMIZING EMITTER AND CONTACT RESISTANCE 有权
    用于优化发射器和接触电阻的接触模块

    公开(公告)号：US20160155661A1

    公开(公告)日：2016-06-02

    申请号：US14558037

    申请日：2014-12-02

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： James W. ADKISSON ,  Anthony K. STAMPER

    IPC: H01L21/768 ,  H01L23/522 ,  H01L29/73 ,  H01L29/66

    CPC classification number: H01L21/76814 ,  H01L21/02063 ,  H01L21/8249 ,  H01L23/485 ,  H01L27/0623 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/42304 ,  H01L29/66272 ,  H01L29/66318 ,  H01L29/732 ,  H01L29/7371 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An advanced contact module for optimizing emitter and contact resistance and methods of manufacture are disclosed. The method includes forming a first contact via to a first portion of a first device. The method further includes filling the first contact via with metal material to form a first metal contact to the first portion of the first device. The method further includes forming additional contact vias to other portions of the first device and contacts of a second device. The method further includes cleaning the additional contact vias while protecting the first metal contact of the first portion of the first device. The method further includes filling the additional contact vias with metal material to form additional metal contacts to the other portions of the first device and the second device.

    Abstract translation: 公开了一种用于优化发射极和接触电阻的高级接触模块及其制造方法。 该方法包括形成第一接触通孔到第一器件的第一部分。 该方法还包括用金属材料填充第一接触通孔以形成与第一器件的第一部分的第一金属接触。 该方法还包括向第一装置的其他部分和第二装置的触点形成额外的接触通孔。 该方法还包括在保护第一装置的第一部分的第一金属接触的同时清洁附加接触孔。 该方法还包括用金属材料填充附加的接触孔，以形成与第一装置和第二装置的其它部分的额外的金属接触。

    WAFER FRONTSIDE-BACKSIDE THROUGH SILICON VIA
    67.
    发明申请
    WAFER FRONTSIDE-BACKSIDE THROUGH SILICON VIA 有权
    通过硅胶穿过半圆形背面

    公开(公告)号：US20150332966A1

    公开(公告)日：2015-11-19

    申请号：US14281210

    申请日：2014-05-19

    Applicant: International Business Machines Corporation

    Inventor： Jeffrey C. MALING ,  Anthony K. STAMPER ,  Zeljka TOPIC-BEGANOVIC ,  Daniel S. VANSLETTE

    IPC: H01L21/768 ,  H01L23/48

    CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/48 ,  H01L2224/11

    Abstract: A wafer frontside-backside through silicon via and methods of manufacture are disclosed. The method includes forming a plurality of frontside metalized vias into a partial depth of a substrate. The method further includes forming a backside via in the substrate which exposes, from the backside, the plurality of frontside metalized vias. The method further includes forming a metal in the via in contact with the plurality of metalized frontside vias.

    Abstract translation: 公开了通过硅通孔的晶片前侧和制造方法。 该方法包括在衬底的部分深度中形成多个前侧金属化通孔。 该方法还包括在衬底中形成背面通孔，其从背面暴露多个前侧金属化通孔。 该方法还包括在通孔中形成与多个金属化前沿通孔接触的金属。

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