公开(公告)号：US20180374995A1

公开(公告)日：2018-12-27

申请号：US16120851

申请日：2018-09-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiaki Oikawa ,  Shingo EGUCHI ,  Mitsuo MASHIYAMA ,  Masatoshi KATANIWA ,  Hironobu SHOJI ,  Masataka NAKADA ,  Satoshi SEO

IPC: H01L33/44 ,  H01L51/52 ,  H01L51/56 ,  H01L51/00

Abstract: An object is to provide a highly reliable light emitting device which is thin and is not damaged by external local pressure. Further, another object is to manufacture a light emitting device with a high yield by preventing defects of a shape and characteristics due to external stress in a manufacture process. A light emitting element is sealed between a first structure body in which a fibrous body is impregnated with an organic resin and a second structure body in which a fibrous body is impregnated with an organic resin, whereby a highly reliable light emitting device which is thin and has intensity can be provided. Further, a light emitting device can be manufactured with a high yield by preventing defects of a shape and characteristics in a manufacture process.

公开(公告)号：US20170061863A1

公开(公告)日：2017-03-02

申请号：US15238888

申请日：2016-08-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shingo EGUCHI

IPC: G09G3/20 ,  G09G3/36 ,  G09G3/3208 ,  G06F3/01 ,  G09G3/34

CPC classification number: G06F3/01 ,  G02F1/133553 ,  G02F2201/44 ,  G09G3/20 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2360/144

Abstract: A novel information processing device that is highly convenient or reliable is provided. For example, a configuration including a selection circuit which has a function of selecting image information or background information on the basis of sensing information on the illuminance of an environment in which the information processing device is used and a photograph or a moving image included in the image information and supplying the selected information to a reflective display element or a light-emitting element has been devised.

Abstract translation: 提供了一种非常方便或可靠的新型信息处理装置。 例如，包括具有选择图像信息或背景信息的功能的配置，该选择电路基于感测关于使用信息处理设备的环境的照度的信息，以及包括在该信息处理设备中的照片或运动图像 已经设计了图像信息并将所选择的信息提供给反射显示元件或发光元件。

公开(公告)号：US20160332826A1

公开(公告)日：2016-11-17

申请号：US15219930

申请日：2016-07-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masakatsu OHNO ,  Kohei YOKOYAMA ,  Satoru IDOJIRI ,  Hisao IKEDA ,  Yasuhiro JINBO ,  Hiroki ADACHI ,  Yoshiharu HIRAKATA ,  Shingo EGUCHI

IPC: B65G49/06 ,  H01L51/56 ,  H01L27/32 ,  B65H3/08 ,  B32B37/00 ,  B65H35/00 ,  B65H16/00 ,  B32B43/00 ,  B32B17/06 ,  H01L51/52 ,  B65H3/48

CPC classification number: B65G49/068 ,  B32B17/06 ,  B32B37/025 ,  B32B38/10 ,  B32B43/006 ,  B32B2457/00 ,  B32B2457/14 ,  B32B2457/20 ,  B65G49/069 ,  B65G2249/04 ,  B65H3/0816 ,  B65H3/48 ,  B65H16/00 ,  B65H35/0006 ,  H01L21/673 ,  H01L21/67333 ,  H01L21/67715 ,  H01L21/68 ,  H01L27/3244 ,  H01L51/5237 ,  H01L51/56 ,  H01L2221/68318 ,  H01L2227/323 ,  Y10T29/53091 ,  Y10T29/5317 ,  Y10T156/1121 ,  Y10T156/1137 ,  Y10T156/1158 ,  Y10T156/1184 ,  Y10T156/1917 ,  Y10T156/1922 ,  Y10T156/1939 ,  Y10T156/1967

Abstract: An apparatus for supplying a support having a clean surface is provided. Alternatively, an apparatus for manufacturing a stack including a support and a remaining portion of a processed member whose one surface layer is separated is provided. A positioning portion, a slit formation portion, and a peeling portion are included. The positioning portion is provided with a first transfer mechanism of a stacked film including a support and a separator and a table for fixing the stacked film. The slit formation portion is provided with a cutter that can form a slit which does not pass through the separator. The peeling portion is provided with a second transfer mechanism and a peeling mechanism extending the separator and then peeling the separator. In addition, a pretreatment portion activating a support surface is included.

公开(公告)号：US20160243812A1

公开(公告)日：2016-08-25

申请号：US15147020

申请日：2016-05-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kayo KUMAKURA ,  Tomoya AOYAMA ,  Akihiro CHIDA ,  Kohei YOKOYAMA ,  Masakatsu OHNO ,  Satoru IDOJIRI ,  Hisao IKEDA ,  Hiroki ADACHI ,  Yoshiharu HIRAKATA ,  Shingo EGUCHI ,  Yasuhiro JINBO

IPC: B32B43/00 ,  H01L21/67 ,  H01L51/56

CPC classification number: B32B43/006 ,  B26D1/04 ,  B26D2001/006 ,  B32B38/10 ,  B32B2457/00 ,  G02B6/00 ,  H01L21/67092 ,  H01L27/1248 ,  H01L27/3258 ,  H01L27/3262 ,  H01L51/56 ,  H01L2221/68327 ,  H01L2227/323 ,  H01L2251/5338 ,  Y10T156/1126 ,  Y10T156/1132 ,  Y10T156/1168 ,  Y10T156/1184 ,  Y10T156/1933 ,  Y10T156/1944 ,  Y10T156/1961 ,  Y10T156/1967

Abstract: A processing apparatus of a stack is provided. The stack includes two substrates attached to each other with a gap provided between their end portions. The processing apparatus includes a fixing mechanism that fixes part of the stack, a plurality of adsorption jigs that fix an outer peripheral edge of one of the substrates of the stack, and a wedge-shaped jig that is inserted into a corner of the stack. The plurality of adsorption jigs include a mechanism that allows the adsorption jigs to move separately in a vertical direction and a horizontal direction. The processing apparatus further includes a sensor sensing a position of the gap between the end portion in the stack. A tip of the wedge-shaped jig moves along a chamfer formed on an end surface of the stack. The wedge-shaped jig is inserted into the gap between the end portions in the stack.

公开(公告)号：US20160013221A1

公开(公告)日：2016-01-14

申请号：US14801093

申请日：2015-07-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shingo EGUCHI ,  Yohei MONMA ,  Atsuhiro TANI ,  Misako HIROSUE ,  Kenichi HASHIMOTO ,  Yasuharu HOSAKA

IPC: H01L27/12 ,  H01L21/683

CPC classification number: H01L27/1266 ,  B32B43/006 ,  G02F1/1303 ,  G02F1/13306 ,  G06K19/0772 ,  H01L21/67132 ,  H01L21/6835 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/156 ,  H01L31/1892 ,  H01L31/206 ,  H01L33/005 ,  H01L51/003 ,  H01L51/0097 ,  H01L2221/68318 ,  H01L2221/6835 ,  H01L2221/68363 ,  H01L2221/68386 ,  H01L2221/68395 ,  H01L2227/326 ,  H01L2251/5338 ,  H01L2924/19041 ,  H01L2924/30105 ,  Y10T29/41

Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.

公开(公告)号：US20140131852A1

公开(公告)日：2014-05-15

申请号：US14156744

申请日：2014-01-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shingo EGUCHI

IPC: H01L23/00 ,  H01L23/29

CPC classification number: H01L23/562 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/295 ,  H01L23/3114 ,  H01L2221/6835 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00

Abstract: In a semiconductor integrated circuit sandwiched between a pair of a first impact resistance layer and a second impact resistance layer, an impact diffusion layer is provided between the semiconductor integrated circuit and the second impact resistance layer. By provision of the impact resistance layer against the external stress and the impact diffusion layer for diffusing the impact, force applied to the semiconductor integrated circuit per unit area is reduced, so that the semiconductor integrated circuit is protected. The impact diffusion layer preferably has a low modulus of elasticity and high breaking modulus.

Abstract translation: 在夹在一对第一耐冲击层和第二耐冲击层之间的半导体集成电路中，在半导体集成电路和第二耐冲击层之间设置有冲击扩散层。 通过设置抵抗外部应力的抗冲击层和用于扩散冲击的冲击扩散层，减小了施加到每单位面积的半导体集成电路的力，从而保护了半导体集成电路。 冲击扩散层优选具有低的弹性模量和高的断裂模量。

公开(公告)号：US20130149816A1

公开(公告)日：2013-06-13

申请号：US13759251

申请日：2013-02-05

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD

Inventor： Yoshiaki OIKAWA ,  Shingo EGUCHI ,  Shunpei YAMAZAKI

IPC: H01L21/71

CPC classification number: H01L21/71 ,  H01L23/293 ,  H01L23/3157 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/19041 ,  H01L2924/00

Abstract: To reduce defects of a semiconductor device, such as defects in shape and characteristic due to external stress and electrostatic discharge. To provide a highly reliable semiconductor device. In addition, to increase manufacturing yield of a semiconductor device by reducing the above defects in the manufacturing process. The semiconductor device includes a semiconductor integrated circuit sandwiched by impact resistance layers against external stress and an impact diffusion layer diffusing the impact and a conductive layer covering the semiconductor integrated circuit. With the use of the conductive layer covering the semiconductor integrated circuit, electrostatic breakdown (malfunctions of the circuit or damages of a semiconductor element) due to electrostatic discharge of the semiconductor integrated circuit can be prevented.

公开(公告)号：US20240304611A1

公开(公告)日：2024-09-12

申请号：US18440172

申请日：2024-02-13

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Koji KUSUNOKI ,  Shingo EGUCHI ,  Takayuki IKEDA

IPC: H01L25/18 ,  G06F3/044 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/16 ,  H01L27/12 ,  H01L27/15 ,  H01L33/00

CPC classification number: H01L25/18 ,  G06F3/044 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/167 ,  H01L25/50 ,  H01L33/0093 ,  G06F2203/04103 ,  H01L24/16 ,  H01L27/1225 ,  H01L27/156 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2924/12041

Abstract: A display device with high resolution is provided. A display device with high display quality is provided. The display device includes a substrate, an insulating layer, a plurality of transistors, and a plurality of light-emitting diodes. The plurality of light-emitting diodes are provided in a matrix over the substrate. Each of the plurality of transistors is electrically connected to at least one of the plurality of light-emitting diodes. The plurality of light-emitting diodes are positioned closer to the substrate than the plurality of transistors are. The plurality of light-emitting diodes emit light toward the substrate. Each of the plurality of transistors includes a metal oxide layer and a gate electrode. The metal oxide layer includes a channel formation region. The top surface of the gate electrode is substantially level with the top surface of the insulating layer.

公开(公告)号：US20240292697A1

公开(公告)日：2024-08-29

申请号：US18689899

申请日：2022-09-05

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Masahiro KATAYAMA ,  Yukinori SHIMA ,  Masataka NAKADA ,  Shingo EGUCHI ,  Daiki NAKAMURA ,  Koji KUSUNOKI

IPC: H10K59/32 ,  G09G3/3233 ,  H10K59/131 ,  H10K59/38 ,  H10K59/80

CPC classification number: H10K59/32 ,  H10K59/131 ,  H10K59/38 ,  H10K59/805 ,  G09G3/3233 ,  G09G2300/0814 ,  G09G2300/0842 ,  G09G2320/0223

Abstract: A display device in which a voltage drop is inhibited adequately is provided. The display device includes a first light-emitting device including a first light-emitting layer, a first charge-generation layer over the first light-emitting layer, and a second light-emitting layer over the first charge-generation layer; a first color filter overlapping with the first light-emitting device; a second light-emitting device including a third light-emitting layer, a second charge-generation layer over the third light-emitting layer, and a fourth light-emitting layer over the second charge-generation layer; a second color filter overlapping with the second light-emitting device; a common electrode included in the first light-emitting device and the second light-emitting device; and an auxiliary wiring electrically connected to the common electrode. The auxiliary wiring includes a first wiring layer and a second wiring layer, the second wiring layer is electrically connected to the first wiring layer through a contact hole of an insulating layer, and the second wiring layer has a lattice shape in a top view.

公开(公告)号：US20240250112A1

公开(公告)日：2024-07-25

申请号：US18624562

申请日：2024-04-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Koji KUSUNOKI ,  Shingo EGUCHI ,  Yosuke TSUKAMOTO ,  Kazunori WATANABE ,  Kouhei TOYOTAKA

IPC: H01L27/15 ,  H01L33/00 ,  H01L33/62

CPC classification number: H01L27/156 ,  H01L33/005 ,  H01L33/62 ,  H01L2933/0066

Abstract: A display device with high resolution is provided. Manufacturing cost of a display device using a micro LED as a display element is reduced. The display device includes a substrate, a plurality of transistors, and a plurality of light-emitting diodes. The plurality of light-emitting diodes are provided in a matrix over the substrate. Each of the plurality of transistors are electrically connected to at least one of the plurality of light-emitting diodes. The plurality of light-emitting diodes are positioned closer to the substrate than the plurality of transistors are. The plurality of light-emitting diodes emit light to the opposite side of the substrate.