公开(公告)号：US5182217A

公开(公告)日：1993-01-26

申请号：US740570

申请日：1991-08-02

Applicant: Paul R. Norton

Inventor： Paul R. Norton

IPC: H01L21/368 ,  H01L31/0296 ,  H01L31/103 ,  H01L31/109

CPC classification number: H01L31/109 ,  H01L21/02411 ,  H01L21/0248 ,  H01L21/0251 ,  H01L21/02562 ,  H01L21/02625 ,  H01L31/02966 ,  H01L31/1032 ,  H01L21/02576 ,  H01L21/02579 ,  Y10S148/064 ,  Y10S148/08

Abstract: Photodetectors that produce detectivities close to the theoretical maximum detectivity include an electrically insulating substrate carrying a body of semiconductor material that includes a region of first conductivity type and a region of second conductivity type where the region of first conductivity type overlies and covers the junction with the region of second conductivity type and where the junction between the first and second regions separates minority carriers in the region of second conductivity type from majority carriers in the region of first conductivity type. These photodetectors produce high detectivities where radiation incident on the detectors has wavelengths in the range of about 1 to about 25 microns or more, particularly under low background conditions.

Abstract translation: 产生接近理论最大检测率的检测率的光电检测器包括承载半导体材料体的电绝缘基板，其包括第一导电类型的区域和第二导电类型的区域，其中第一导电类型的区域覆盖并覆盖与 第二导电类型的区域，并且其中第一和第二区域之间的结点将第二导电类型区域中的少数载流子与第一导电类型区域中的多数载流子分开。 这些光电检测器产生高检测率，其中入射到检测器上的辐射波长在约1至约25微米或更大的范围内，特别是在低背景条件下。

公开(公告)号：US4904618A

公开(公告)日：1990-02-27

申请号：US234802

申请日：1988-08-22

Applicant: Gertrude F. Neumark

Inventor： Gertrude F. Neumark

IPC: H01L21/368 ,  H01L21/38 ,  H01L33/00 ,  H01L33/28

CPC classification number: H01L33/285 ,  H01L21/02411 ,  H01L21/02562 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02625 ,  H01L21/02628 ,  H01L21/38 ,  H01L33/0083 ,  Y10S148/041 ,  Y10S148/064

Abstract: Non-equilibrium impurity incorporation is used to dope hard-to-dope crystals of wide band gap semiconductors, such as zinc selenide and zinc telluride. This involves incorporating into the crystal a compensating pair of primary and secondary dopants, thereby to increase the solubility of either dopant alone in the crystals. Thereafter, the secondary more mobile dopant is removed preferentially, leaving the primary dopant predominant. This technique is used to dope zinc selenide p-type by the use of nitrogen as the primary dopant and lithium as the secondary dopant.

Abstract translation: 使用非平衡杂质掺入来掺杂宽带隙半导体的难以掺杂的晶体，例如硒化锌和碲化锌。 这涉及在晶体中掺入一对补偿对的初级和次级掺杂剂，从而增加了每种掺杂剂在晶体中的溶解度。 此后，优先去除次要更多的移动掺杂剂，留下主要掺杂剂占优势。 该技术用于通过使用氮作为主要掺杂剂和锂作为第二掺杂剂来掺杂硒化锌p型。

公开(公告)号：US4743310A

公开(公告)日：1988-05-10

申请号：US10028

申请日：1987-02-02

Applicant: Robert E. Kay ,  Hakchill Chan ,  Fred Ju ,  Burton A. Bray

Inventor： Robert E. Kay ,  Hakchill Chan ,  Fred Ju ,  Burton A. Bray

IPC: C30B25/02 ,  C30B25/22 ,  H01L21/363

CPC classification number: C30B25/02 ,  C30B25/22 ,  C30B29/48 ,  H01L21/0237 ,  H01L21/02411 ,  H01L21/0248 ,  H01L21/02562 ,  H01L21/02631 ,  Y10S148/064 ,  Y10T428/12528

Abstract: A layer of HgCdTe (15) is epitaxially grown on a crystalline support (10). A single crystal CdTe substrate (5) is first epitaxially grown to a thickness of between 1 micron and 5 microns onto the support (10). Then a HgTe source (3) is spaced from the CdTe substrate (5) a distance of between 0.1 mm and 10 mm. The substrate (5) and source (3) are heated together in a thermally insulating, reusable ampoule (17) within a growth temperature range of between 500.degree. C. and 625.degree. C. for a growth time of between 5 minutes and 13 hours. In a first growth step embodiment, the source (3) and substrate (5) are non-isothermal. In a second growth step embodiment, the source (3) and substrate (5) are isothermal. Then an optional interdiffusion step is performed, in which the source (3) and substrate (5) are cooled within a temperature range of between 400.degree. C. and 500.degree. C. for a time of between 1 hour and 16 hours. Means are disclosed for preventing contamination of the reactants during HgTe (3) synthesis, and for polishing the finished HgCdTe layer (15).

Abstract translation: 在晶体载体（10）上外延生长一层HgCdTe（15）。 首先将单晶CdTe衬底（5）外延生长至1微米至5微米的厚度至载体（10）上。 然后，HgTe源（3）与CdTe衬底（5）间隔0.1mm至10mm的距离。 基材（5）和源（3）在绝热的可重复使用的安瓿（17）中在500℃至625℃的生长温度范围内一起加热5分钟至13小时的生长时间 。 在第一生长步骤的实施例中，源（3）和衬底（5）是非等温的。 在第二生长步骤的实施例中，源（3）和衬底（5）是等温的。 然后进行可选的相互扩散步骤，其中将源（3）和基底（5）在400℃至500℃的温度范围内冷却1小时至16小时。 公开了用于在HgTe（3）合成期间防止反应物污染并用于抛光最终的HgCdTe层（15）的手段。

公开(公告)号：US4719124A

公开(公告)日：1988-01-12

申请号：US851255

申请日：1986-07-28

Applicant: Po-Yen Lu ,  Chi-Hua Wang ,  Larry M. Williams

Inventor： Po-Yen Lu ,  Chi-Hua Wang ,  Larry M. Williams

IPC: H01L21/365

CPC classification number: H01L21/02395 ,  H01L21/02411 ,  H01L21/02562 ,  H01L21/0262

Abstract: It has been found that deposition temperature for materials such as cadmium mercury telluride is significantly lowered by precracking selected precursor materials. For example, if organometallic compounds such as diethylmercury and diethyltellurium are decomposed before introduction in the deposition vapor, epitaxial layer formation is possible at 250.degree. C.

Abstract translation: 已经发现，通过预选所选择的前体材料，显着降低了诸如碲化汞镉等材料的沉积温度。 例如，如果有机金属化合物如二乙基汞和二乙基碲在引入沉积蒸气之前分解，则可以在250℃下形成外延层。

公开(公告)号：US4445965A

公开(公告)日：1984-05-01

申请号：US387961

申请日：1982-06-14

Applicant: Arthur G. Milnes

Inventor： Arthur G. Milnes

IPC: C30B23/02 ,  C30B25/02 ,  C30B33/00 ,  H01L21/36 ,  H01L21/363 ,  H01L21/365 ,  H01L21/465 ,  H01L31/0296 ,  C30B19/12

CPC classification number: C30B25/02 ,  C30B23/02 ,  C30B29/48 ,  C30B33/00 ,  H01L21/02411 ,  H01L21/02439 ,  H01L21/02485 ,  H01L21/02551 ,  H01L21/02562 ,  H01L21/02636 ,  H01L21/465 ,  H01L31/0296 ,  Y10S117/915 ,  Y10S148/135 ,  Y10S438/94

Abstract: A thin cadmium-telluride semiconductor film for use in solar cells is grown epitaxially on a second semiconductor film, typically tellurium, which may be epitaxial on a substrate semiconductor, typically single-crystal cadmium-telluride. The second semiconductor has a lower resistance to layered cleaving than the desired semiconductor. Application of a strain to the sandwich causes the desired thin CdTe layer to peel off by fracture along the plane of the second semiconductor.

Abstract translation: 在太阳能电池中使用的薄碲化镉半导体薄膜外延生长在第二半导体薄膜上，通常为碲，其可以在衬底半导体（通常为单晶碲化镉）上外延生长。 第二半导体具有比期望的半导体更低的分层抗裂性。 将应变施加到夹层中使得所需的薄CdTe层沿着沿着第二半导体的平面的断裂而剥离。

公开(公告)号：US4357620A

公开(公告)日：1982-11-02

申请号：US207863

申请日：1980-11-18

Applicant: Cheng-Chi Wang ,  Muren Chu

Inventor： Cheng-Chi Wang ,  Muren Chu

IPC: H01L21/368 ,  H01L31/109 ,  H01L31/18 ,  H01L29/161 ,  H01L27/14

CPC classification number: H01L31/1832 ,  H01L21/02411 ,  H01L21/0248 ,  H01L21/02562 ,  H01L21/02625 ,  H01L21/02628 ,  H01L21/02658 ,  H01L31/109 ,  H01L31/1828 ,  H01L21/02573 ,  H01L21/02667 ,  Y02E10/543

Abstract: Disclosed is a method of growing a layer of CdTe on HgCdTe by liquid phasepitaxy. The solution for growth comprises Sn and Hg with a small amount of CdTe. A typical composition is Sn:Hg:CdTe=36:5:0.15 parts by weight. The growth temperature is a function of the amount of CdTe in solution. For the typical composition stated, the growth temperature is about 520.degree. C. The layers were grown on (111)A oriented CdTe substrates. The HgCdTe epilayer with a desired Cd composition is first grown, and an epilayer of CdTe is subsequently grown on the HgCdTe epilayer. The cross-diffusion at the CdTe/Hg.sub.1-x Cd.sub.x Te interface has been as small as 0.3 .mu.m for the thin CdTe epilayer. The first CdTe/HgCdTe heterojunction sensitive to .about.2.8 .mu.m at 77.degree. K. has been demonstrated.

Abstract translation: 公开了一种通过液相外延在HgCdTe上生长CdTe层的方法。 用于生长的溶液包括具有少量CdTe的Sn和Hg。 典型的组成是Sn：Hg：CdTe = 36:5:0.15重量份。 生长温度是溶液中CdTe量的函数。 对于所述的典型组成，生长温度为约520℃。将层在（111）A取向的CdTe底物上生长。 首先生长具有所需Cd组成的HgCdTe外延层，随后在HgCdTe外延层上生长CdTe的外延层。 CdTe / Hg1-xCdxTe界面的交叉扩散对于薄的CdTe外延层来说已经小到0.3μm。 已经证明了在77°K下对于差异敏感的第一CdTe / HgCdTe异质结为2.8μm。

公开(公告)号：US4115163A

公开(公告)日：1978-09-19

申请号：US647327

申请日：1976-01-08

Applicant: Yulia Ivanovna Gorina ,  Galina Alexandrovna Kaljuzhnaya ,  Andrei Vasilievich Kuznetsov ,  Sergei Nikolaevich Maximovsky ,  Mikhail Borisovich Nikiforov ,  Bentsion Moiseevich Vul ,  Galina Evgenievna Ivannikova ,  Vintsentas Ionovich Denis ,  Mikolas Mikolo Yarmalis ,  Vitautas Ionovich Repshis

Inventor： Yulia Ivanovna Gorina ,  Galina Alexandrovna Kaljuzhnaya ,  Andrei Vasilievich Kuznetsov ,  Sergei Nikolaevich Maximovsky ,  Mikhail Borisovich Nikiforov ,  Bentsion Moiseevich Vul ,  Galina Evgenievna Ivannikova ,  Vintsentas Ionovich Denis ,  Mikolas Mikolo Yarmalis ,  Vitautas Ionovich Repshis

IPC: C23C14/54 ,  C30B23/06 ,  H01L21/205 ,  H01L21/365

CPC classification number: C30B23/063 ,  C23C14/541 ,  H01L21/02381 ,  H01L21/02411 ,  H01L21/02417 ,  H01L21/0242 ,  H01L21/02532 ,  H01L21/02562 ,  H01L21/02568 ,  H01L21/02576 ,  H01L21/02579 ,  Y10S148/048 ,  Y10S148/071

Abstract: A method of growing epitaxial semiconductor films on substrates is proposed which consists in that a substrate is cleaned from damage layers and heated to a critical epitaxy temperature simultaneously by irradiating a substrate surface with an intensive luminous flux. A source material for growing a film is introduced to the substrate in a gaseous state. When producing multi-layer semiconductor structures, a substrate surface opposite to a surface exposed to the luminous flux is cooled to a temperature sufficient to prevent mutual diffusion between the film and the substrate materials. Versions of an apparatus for carrying this method into effect are also proposed. The apparatus includes a quartz chamber with a vaporizer for vaporizing the source material for film growing, a means for supporting the substrate and openings for introducing a neutral or reducing agent. The apparatus is provided with furnaces for heating the walls of the chamber. Each apparatus has a powerful light source disposed outside the chamber so as to face a working surface of the substrate support.

Abstract translation: 提出了一种在衬底上生长外延半导体膜的方法，其方法是通过用强烈的光通量照射衬底表面，同时通过将衬底从损伤层中清除并加热至临界外延温度。 用于生长膜的源材料以气态引入衬底。 当制造多层半导体结构时，与暴露于光通量的表面相对的衬底表面被冷却到足以防止膜和衬底材料之间的相互扩散的温度。 还提出了用于实施该方法的装置的版本。 该装置包括具有用于蒸发用于膜生长的源材料的蒸发器的石英腔，用于支撑衬底的装置和用于引入中性或还原剂的开口。 该设备设置有用于加热室的壁的炉。 每个设备具有设置在室外部的强大的光源，以面对基板支撑件的工作表面。

公开(公告)号：US3986192A

公开(公告)日：1976-10-12

申请号：US538082

申请日：1975-01-02

Applicant: James Vincent DiLorenzo ,  William Charles Niehaus ,  Lawrence John Varnerin, Jr.

Inventor： James Vincent DiLorenzo ,  William Charles Niehaus ,  Lawrence John Varnerin, Jr.

IPC: H01L21/205 ,  H01L29/864 ,  H01L29/90 ,  H01L29/48 ,  H01L29/56 ,  H01L29/88

CPC classification number: H01L29/864 ,  H01L21/02381 ,  H01L21/02409 ,  H01L21/02411 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02546 ,  H01L21/0262 ,  Y10S148/007 ,  Y10S148/017 ,  Y10S148/056 ,  Y10S148/057 ,  Y10S148/065 ,  Y10S148/079 ,  Y10S148/129 ,  Y10S148/139 ,  Y10S438/936

Abstract: The operating frequency of an IMPATT diode depends on the width of the depletion region formed during operation. The frequency of high efficiency GaAs IMPATT diodes comprising a non-uniformly doped depletion region contacted by a rectifying barrier can be more precisely fixed by forming a "clump" of charge at exactly the depth below the surface contacted by the rectifying barrier corresponding to the desired depletion region.

Abstract translation: IMPATT二极管的工作频率取决于工作期间形成的耗尽区的宽度。 包括由精整阻挡层接触的非均匀掺杂的耗尽区的高效GaAs IMPATT二极管的频率可以通过在与所需的整流屏障相接触的整流屏障接触的表面正下方的深度处形成“电荷” 耗尽区。

公开(公告)号：US3312571A

公开(公告)日：1967-04-04

申请号：US48450665

申请日：1965-07-30

Applicant: MONSANTO CO

Inventor： RUEHRWEIN ROBERT A

IPC: H01L21/34 ,  H01L21/365 ,  H01L31/18

CPC classification number: H01L31/1836 ,  H01L21/0237 ,  H01L21/02395 ,  H01L21/024 ,  H01L21/02411 ,  H01L21/02551 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/02562 ,  H01L21/02568 ,  H01L21/02573 ,  H01L21/0262 ,  H01L29/66969 ,  H01L31/1828 ,  Y02E10/543 ,  Y10S148/072 ,  Y10S148/11 ,  Y10S252/951

公开(公告)号：US20150187982A1

公开(公告)日：2015-07-02

申请号：US14141408

申请日：2013-12-26

Applicant: Intermolecular, Inc.

Inventor： Sergey Barabash ,  Amir Bayati ,  Dipankar Pramanik ,  Zhi-Wen Sun

IPC: H01L31/18

CPC classification number: H01L31/1832 ,  C23C14/0629 ,  C23C16/305 ,  H01L21/02411 ,  H01L21/02422 ,  H01L21/0248 ,  H01L21/02485 ,  H01L21/02499 ,  H01L21/02505 ,  H01L21/02562 ,  H01L21/02568 ,  H01L21/0262 ,  H01L21/02631 ,  H01L31/02966 ,  H01L31/0749 ,  H01L31/18 ,  H01L31/1836 ,  Y02E10/541 ,  Y02P70/521

Abstract: Embodiments provided herein describe methods for forming cadmium-manganese-telluride (CMT), such as for use in photovoltaic devices. A substrate including a material with a zinc blende crystalline structure is provided. CMT is formed above the substrate. During the formation of the CMT, cation-rich processing conditions are maintained. The resulting CMT may be more readily provided with p-type dopants when compared to conventionally-formed CMT.

Abstract translation: 本文提供的实施方案描述了形成碲化锰 - 碲化物（CMT）的方法，例如用于光伏器件中的方法。 提供了包括具有闪锌矿晶体结构的材料的基板。 CMT形成在衬底之上。 在CMT的形成过程中，维持富阳离子处理条件。 当与常规形成的CMT相比时，所得到的CMT可以更容易地被提供有p型掺杂剂。