公开(公告)号：US09396997B2

公开(公告)日：2016-07-19

申请号：US13288271

申请日：2011-11-03

申请人： Franz Hirler ,  Anton Mauder ,  Hermann Gruber ,  Hubert Rothleitner ,  Andreas Peter Meiser

发明人： Franz Hirler ,  Anton Mauder ,  Hermann Gruber ,  Hubert Rothleitner ,  Andreas Peter Meiser

IPC分类号： H01L21/76 ,  H01L21/768 ,  H01L23/48 ,  H01L29/06 ,  H01L29/423 ,  H01L29/739 ,  H01L29/78 ,  H01L21/762 ,  H01L21/8234 ,  H01L23/00 ,  H01L27/088 ,  H01L29/40 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66

CPC分类号： H01L29/407 ,  H01L21/76224 ,  H01L21/76898 ,  H01L21/823481 ,  H01L23/481 ,  H01L24/16 ,  H01L27/088 ,  H01L29/0653 ,  H01L29/401 ,  H01L29/402 ,  H01L29/408 ,  H01L29/41741 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/7808 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2224/16245 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00

摘要： A method for producing a semiconductor component is provided. The method includes providing a semiconductor body with a first surface and a second surface opposite to the first surface, etching an insulation trench from the first surface partially into the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, processing the second surface by at least one of grinding, polishing and a CMP-process to expose the first insulation layer, and depositing on the processed second surface a second insulation layer which extends to the first insulation layer.

摘要翻译： 提供一种半导体元件的制造方法。 该方法包括：提供具有与第一表面相对的第一表面和第二表面的半导体本体，将绝缘沟槽从第一表面部分地蚀刻到半导体本体中，在绝缘沟槽的一个或多个侧壁上形成第一绝缘层， 通过研磨，抛光和CMP工艺中的至少一个来处理第二表面以暴露第一绝缘层，以及在经处理的第二表面上沉积延伸到第一绝缘层的第二绝缘层。

公开(公告)号：US08779509B2

公开(公告)日：2014-07-15

申请号：US13539959

申请日：2012-07-02

申请人： Hans-Joachim Schulze ,  Anton Mauder ,  Franz Hirler

发明人： Hans-Joachim Schulze ,  Anton Mauder ,  Franz Hirler

IPC分类号： H01L21/14

CPC分类号： H01L29/086 ,  H01L21/265 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/0878 ,  H01L29/167 ,  H01L29/36 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/8611

摘要： A semiconductor device includes a doped layer which contains a first dopant of a first conductivity type. In the doped layer, a counter-doped zone is formed in an edge area that surrounds an element area of the semiconductor device. The counter-doped zone contains at least the first dopant and a second dopant of a second conductivity type, which is the opposite of the first conductivity type. A concentration of the second dopant is at least 20% and at most 100% of a concentration of the first dopant. The dopants in the counter-doped zone decrease charge carrier mobility and minority carrier lifetime such that the dynamic robustness of the semiconductor device is increased.

摘要翻译： 半导体器件包括含有第一导电类型的第一掺杂剂的掺杂层。 在掺杂层中，在围绕半导体器件的元件区域的边缘区域中形成反掺杂区域。 反掺杂区至少包含与第一导电类型相反的第二导电类型的第一掺杂剂和第二掺杂剂。 第二掺杂剂的浓度为第一掺杂剂的浓度的至少20％且至多100％。 反掺杂区中的掺杂剂降低了载流子迁移率和少数载流子寿命，从而提高了半导体器件的动态鲁棒性。

公开(公告)号：US20140027879A1

公开(公告)日：2014-01-30

申请号：US13560626

申请日：2012-07-27

申请人： Joachim Weyers ,  Kevni Bueyuektas ,  Franz Hirler ,  Anton Mauder

发明人： Joachim Weyers ,  Kevni Bueyuektas ,  Franz Hirler ,  Anton Mauder

IPC分类号： H01L49/02

CPC分类号： H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

摘要： One aspect of the invention relates to a semiconductor component with a semiconductor body with a top side and with a bottom side. A first coil that is monolithically integrated with the semiconductor body is arranged distant from the bottom side and comprises N first windings, wherein N≧1. The first coil has a first coil axis that extends in a direction different from a surface normal of the bottom side.

摘要翻译： 本发明的一个方面涉及具有顶侧和底侧的半导体本体的半导体部件。 与半导体本体一体地集成的第一线圈被布置成远离底侧并且包括N个第一绕组，其中N> = 1。 第一线圈具有沿与底侧的表面法线不同的方向延伸的第一线圈轴线。

公开(公告)号：US20130264607A1

公开(公告)日：2013-10-10

申请号：US13441364

申请日：2012-04-06

申请人： Dorothea Werber ,  Anton Mauder ,  Frank Pfirsch ,  Hans-Joachim Schulze ,  Franz Hirler ,  Alexander Philippou

发明人： Dorothea Werber ,  Anton Mauder ,  Frank Pfirsch ,  Hans-Joachim Schulze ,  Franz Hirler ,  Alexander Philippou

IPC分类号： H01L29/739

CPC分类号： H01L29/7396 ,  H01L29/0696 ,  H01L29/0834

摘要： A semiconductor includes a drift zone of a first conductivity type arranged between a first side and a second side of a semiconductor body. The semiconductor device further includes a first region of the first conductivity type and a second region of a second conductivity type subsequently arranged along a first direction parallel to the second side. The semiconductor device further includes an electrode at the second side adjoining the first and second regions. The semiconductor device further includes a third region of the second conductivity type arranged between the drift zone and the first region. The third region is spaced apart from the second region and from the second side.

摘要翻译： 半导体包括布置在半导体主体的第一侧和第二侧之间的第一导电类型的漂移区。 半导体器件还包括第一导电类型的第一区域和沿着平行于第二侧面的第一方向布置的第二导电类型的第二区域。 半导体器件还包括邻近第一和第二区域的第二侧的电极。 半导体器件还包括布置在漂移区和第一区之间的第二导电类型的第三区。 第三区域与第二区域和第二区域隔开。

公开(公告)号：US08541833B2

公开(公告)日：2013-09-24

申请号：US13082679

申请日：2011-04-08

申请人： Hans-Joachim Schulze ,  Anton Mauder ,  Helmut Strack ,  Franz Hirler

发明人： Hans-Joachim Schulze ,  Anton Mauder ,  Helmut Strack ,  Franz Hirler

IPC分类号： H01L29/66 ,  H01L21/70

CPC分类号： H01L21/823487 ,  H01L27/0694 ,  H01L27/1207 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor component includes a sequence of layers, the sequence of layers including a first insulator layer, a first semiconductor layer disposed on the first insulator layer, a second insulator layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the second insulator layer. The semiconductor component also includes a plurality of devices at least partly formed in the first semiconductor layer. A first one of the plurality of devices is a power transistor formed in a first region of the first semiconductor layer and a first region of the second semiconductor layer. The first region of the first and second semiconductor layers are in electrical contact with one another through a first opening in the second insulator layer.

摘要翻译： 半导体部件包括一层层，所述层序列包括第一绝缘体层，设置在第一绝缘体层上的第一半导体层，设置在第一半导体层上的第二绝缘体层，以及设置在第二绝缘体层上的第二半导体层 绝缘体层。 半导体部件还包括至少部分地形成在第一半导体层中的多个器件。 多个器件中的第一个是在第一半导体层的第一区域和第二半导体层的第一区域中形成的功率晶体管。 第一和第二半导体层的第一区域通过第二绝缘体层中的第一开口彼此电接触。

公开(公告)号：US08530300B2

公开(公告)日：2013-09-10

申请号：US12842488

申请日：2010-07-23

申请人： Joachim Weyers ,  Armin Willmeroth ,  Anton Mauder ,  Franz Hirler

发明人： Joachim Weyers ,  Armin Willmeroth ,  Anton Mauder ,  Franz Hirler

IPC分类号： H01L21/8238

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/66712 ,  H01L29/8613 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a method of forming a semiconductor device with drift regions of a first doping type and compensation regions of a second doping type, and a semiconductor device with drift regions of a first doping type and compensation regions of a second doping type.

摘要翻译： 公开了一种形成具有第一掺杂类型的漂移区和第二掺杂型的补偿区的半导体器件的方法，以及具有第一掺杂类型的漂移区和第二掺杂类型的补偿区的半导体器件。

公开(公告)号：US20130221427A1

公开(公告)日：2013-08-29

申请号：US13404161

申请日：2012-02-24

申请人： Ralf Siemieniec ,  Oliver Blank ,  Anton Mauder ,  Franz Hirler

发明人： Ralf Siemieniec ,  Oliver Blank ,  Anton Mauder ,  Franz Hirler

IPC分类号： H01L29/78 ,  H01L21/04

CPC分类号： H01L29/7813 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

摘要： A semiconductor device includes a first contact in low Ohmic contact with a source region of the device and a first portion of a body region of the device formed in an active area of the device, and a second contact in low Ohmic contact with a second portion of the body region formed in a peripheral area of the device. The minimum width of the second contact at a first surface of the device is larger than the minimum width of the first contact at the first surface so that maximum current density during commutating the semiconductor device is reduced and thus the risk of device damage during hard commutating is also reduced.

摘要翻译： 半导体器件包括与器件的源极区域的低欧姆接触的第一接触和形成在器件的有源区域中的器件的体区的第一部分，以及与第二部分的低欧姆接触的第二接触 形成在装置的周边区域中的身体区域。 器件第一表面处的第二触点的最小宽度大于第一表面处的第一接触的最小宽度，使得在半导体器件的整流期间的最大电流密度降低，并且因此在硬整流期间器件损坏的风险 也减少了。

公开(公告)号：US08502315B2

公开(公告)日：2013-08-06

申请号：US13463243

申请日：2012-05-03

申请人： Anton Mauder ,  Rudolf Berger ,  Franz Hirler ,  Ralf Siemieniec ,  Hans-Joachim Schulze

发明人： Anton Mauder ,  Rudolf Berger ,  Franz Hirler ,  Ralf Siemieniec ,  Hans-Joachim Schulze

IPC分类号： H01L29/78

CPC分类号： H01L29/66719 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/408 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/66734 ,  H01L29/7813

摘要： A semiconductor device includes a source, a drain, and a gate configured to selectively enable a current to pass between the source and the drain. The semiconductor device includes a drift zone between the source and the drain and a first field plate adjacent the drift zone. The semiconductor device includes a dielectric layer electrically isolating the first field plate from the drift zone and charges within the dielectric layer close to an interface of the dielectric layer adjacent the drift zone.

摘要翻译： 半导体器件包括源极，漏极和被配置为选择性地使电流在源极和漏极之间通过的栅极。 半导体器件包括源极和漏极之间的漂移区和邻近漂移区的第一场板。 半导体器件包括将第一场板与漂移区电隔离的电介质层，并且电介质层内的电荷接近靠近漂移区的电介质层的界面。

公开(公告)号：US08435853B2

公开(公告)日：2013-05-07

申请号：US12871038

申请日：2010-08-30

申请人： Franz Hirler ,  Anton Mauder ,  Frank Pfirsch ,  Hans-Joachim Schulze

发明人： Franz Hirler ,  Anton Mauder ,  Frank Pfirsch ,  Hans-Joachim Schulze

IPC分类号： H01L21/8234

CPC分类号： H01L29/66143 ,  H01L21/823487 ,  H01L29/0626 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/6609 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/7808 ,  H01L29/7813

摘要： A method for forming a field effect power semiconductor is provided. The method includes providing a semiconductor body, a conductive region arranged next to a main surface of the semiconductor body, and an insulating layer arranged on the main horizontal surface. A narrow trench is etched through the insulating layer to expose the conductive region. A polycrystalline semiconductor layer is deposited and a vertical poly-diode structure is formed. The polycrystalline semiconductor layer has a minimum vertical thickness of at least half of the maximum horizontal extension of the narrow trench. A polycrystalline region which forms at least a part of a vertical poly-diode structure is formed in the narrow trench by maskless back-etching of the polycrystalline semiconductor layer. Further, a semiconductor device with a trench poly-diode is provided.

摘要翻译： 提供了一种用于形成场效应功率半导体的方法。 该方法包括提供半导体本体，邻近半导体主体的主表面布置的导电区域和布置在主水平表面上的绝缘层。 通过绝缘层蚀刻窄沟槽以暴露导电区域。 沉积多晶半导体层并形成垂直多晶二极管结构。 多晶半导体层的最小垂直厚度为窄沟槽的最大水平延伸的至少一半。 通过多晶半导体层的无掩模背面蚀刻，在窄沟槽中形成形成垂直多晶二极管结构的至少一部分的多晶区域。 此外，提供了具有沟槽多晶二极管的半导体器件。

公开(公告)号：US07977737B2

公开(公告)日：2011-07-12

申请号：US12043429

申请日：2008-03-06

申请人： Armin Willmeroth ,  Winfried Kaindl ,  Carolin Tolksdorf ,  Anton Mauder ,  Holger Kapels ,  Gerald Deboy ,  Franz Hirler

发明人： Armin Willmeroth ,  Winfried Kaindl ,  Carolin Tolksdorf ,  Anton Mauder ,  Holger Kapels ,  Gerald Deboy ,  Franz Hirler

IPC分类号： H01L29/66 ,  H01L21/337

CPC分类号： H01L27/0733 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device with inherent capacitances and method for its production. The semiconductor device has an inherent feedback capacitance between a control electrode and a first electrode. In addition, the semiconductor device has an inherent drain-source capacitance between the first electrode and a second electrode. At least one monolithically integrated additional capacitance is connected in parallel to the inherent feedback capacitance or in parallel to the inherent drain-source capacitance. The additional capacitance comprises a first capacitor surface and a second capacitor surface opposite the first capacitor surface. The capacitor surfaces are structured conductive layers of the semiconductor device on a front side of the semiconductor body, between which a dielectric layer is located and which form at least one additional capacitor.

摘要翻译： 具有固有电容的半导体器件及其制造方法。 半导体器件在控制电极和第一电极之间具有固有的反馈电容。 此外，半导体器件在第一电极和第二电极之间具有固有的漏极 - 源极电容。 至少一个单片集成附加电容与固有反馈电容并联连接，或与固有漏 - 源电容并联连接。 附加电容包括与第一电容器表面相对的第一电容器表面和第二电容器表面。 电容器表面是半导体器件的前侧上的半导体器件的结构化导电层，介电层位于其之间，并形成至少一个附加电容器。