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    Semiconductor device and method for producing the same
    71.
    发明申请
    Semiconductor device and method for producing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US20060183324A1

    公开(公告)日：2006-08-17

    申请号：US11392540

    申请日：2006-03-30

    申请人： Tomio Iwasaki ,  Hideo Miura

    发明人： Tomio Iwasaki ,  Hideo Miura

    IPC分类号： H01L21/44

    CPC分类号： H01L23/53238 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L23/53228 ,  H01L23/53242 ,  H01L23/53252 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided is a reliable semiconductor device with a layered interconnect structure that may develop no trouble of voids and interconnect breakdowns, in which the layered interconnect structure comprises a conductor film and a neighboring film as so layered on a semiconductor substrate that the neighboring film is contacted with the conductor film. In the device, the materials for the conductor film and the neighboring film are so selected that the difference between the short side, ap, of the rectangular unit cells that constitute the plane with minimum free energy of the conductor film and the short side, an, of the rectangular unit cells that constitute the plane with minimum free energy of the neighboring film, {|ap−an|/ap}×100=A (%) and the difference between the long side, bp, of the rectangular unit cells that constitute the plane with minimum free energy of the conductor film and the long side, bn, of the rectangular unit cells that constitute the plane with minimum free energy of the neighboring film, {|bp−bn|/bp}×100=B (%) satisfy an inequality of {A+B×(ap/bp)}

    摘要翻译： 提供了一种具有层状互连结构的可靠的半导体器件，其可以不产生空隙和互连故障的问题，其中分层互连结构包括导体膜和相邻的膜，如此分层在半导体衬底上，邻近膜与 导体膜。 在该器件中，用于导体膜和相邻膜的材料被选择成使构成具有最小自由能的平面的矩形单元电池的短边，即< 导体薄膜和构成具有相邻薄膜的最小自由能的平面的矩形单元电池的短边，即 n x100 = A（％）和构成该矩阵单位单元的长边，b

    P 之间的差异 构成具有相邻膜的最小自由能的平面的矩形单位电池的导体膜和长边的最小自由能的平面{| b＆lt; p＆lt; x100 = B（％）满足{A + Bx（a p b＆lt; p＆lt; p＆gt;）} <13。 在此，导体膜的扩散被延迟。

    Semiconductor device having layered interconnect structure with a copper or platinum conducting film and a neighboring film
    73.
    发明授权
    Semiconductor device having layered interconnect structure with a copper or platinum conducting film and a neighboring film 失效
    具有与铜或铂导电膜和相邻膜的分层互连结构的半导体器件

    公开(公告)号：US07030493B2

    公开(公告)日：2006-04-18

    申请号：US10878018

    申请日：2004-06-29

    申请人： Tomio Iwasaki ,  Hideo Miura

    发明人： Tomio Iwasaki ,  Hideo Miura

    IPC分类号： H01L23/52

    CPC分类号： H01L23/53238 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L23/53228 ,  H01L23/53242 ,  H01L23/53252 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided is a reliable semiconductor device with a layered interconnect structure that may develop no trouble of voids and interconnect breakdowns, in which the layered interconnect structure comprises a conductor film and a neighboring film as so layered on a semiconductor substrate that the neighboring film is contacted with the conductor film. In the device, the materials for the conductor film and the neighboring film are so selected that the difference between the short side, ap, of the rectangular unit cells that constitute the plane with minimum free energy of the conductor film and the short side, an, of the rectangular unit cells that constitute the plane with minimum free energy of the neighboring film, {|ap−an|/ap}×100=A (%) and the difference between the long side, bp, of the rectangular unit cells that constitute the plane with minimum free energy of the conductor film and the long side, bn, of the rectangular unit cells that constitute the plane with minimum free energy of the neighboring film, {|bp−bn|/bp}×100=B (%) satisfy an inequality of {A+B×(ap/bp)}

    摘要翻译： 提供了一种具有层状互连结构的可靠的半导体器件，其可以不产生空隙和互连故障的问题，其中分层互连结构包括导体膜和相邻的膜，如此分层在半导体衬底上，邻近膜与 导体膜。 在该器件中，用于导体膜和相邻膜的材料被选择成使构成具有最小自由能的平面的矩形单元电池的短边，即< 导体薄膜和构成具有相邻薄膜的最小自由能的平面的矩形单元电池的短边，即 n x100 = A（％）和构成该矩阵单位单元的长边，b

    P 之间的差异 构成具有相邻膜的最小自由能的平面的矩形单位电池的导体膜和长边的最小自由能的平面{| b＆lt; p＆lt; x100 = B（％）满足{A + Bx（a p b＆lt; p＆lt; p＆gt;）} <13。 在此，导体膜的扩散被延迟。

    Laser module with sealed packages having reduced total volume
    74.
    发明申请
    Laser module with sealed packages having reduced total volume 有权
    具有密封包装的激光模块，总体积减小

    公开(公告)号：US20060034571A1

    公开(公告)日：2006-02-16

    申请号：US11197592

    申请日：2005-08-05

    申请人： Kazuhiko Nagano ,  Hideo Miura ,  Shinichiro Sonoda

    发明人： Kazuhiko Nagano ,  Hideo Miura ,  Shinichiro Sonoda

    IPC分类号： G02B6/36

    CPC分类号： G02B6/4248 ,  G02B6/3897 ,  G02B6/4249 ,  G02B6/4292

    摘要： In a laser module in which laser beams emitted from semiconductor laser elements are collimated by collimator lenses, and condensed by an optical condensing system so that the laser beams converge at a light-entrance end face of an optical fiber. The semiconductor laser elements and the collimator lenses are contained in a hermetically sealed, first package which includes a front wall having a window arranged for passage of the laser beams, and a portion of the optical condensing system and the light-entrance end face are contained in a hermetically sealed, second package which is fixed to the front wall. The cross section of the second package perpendicular to the optical axis of the optical fiber at the light-entrance end face is smaller than the cross section of the first package parallel to the cross section of the second package.

    摘要翻译： 在从半导体激光元件射出的激光束通过准直透镜准直的激光模块中，通过光聚光系统进行聚光，使得激光束会聚在光纤的光入射端面。 半导体激光元件和准直透镜被包含在气密密封的第一封装中，该封装包括具有布置成用于激光束通过的窗口的前壁，并且包含光聚光系统和光入射端面的一部分 在密封的第二包装中，其被固定到前壁。 在光入射端面处垂直于光纤的光轴的第二封装的横截面小于与第二封装的横截面平行的第一封装的横截面。

    Semiconductor device with layered interconnect structure
    75.
    发明授权
    Semiconductor device with layered interconnect structure 失效
    具有分层互连结构的半导体器件

    公开(公告)号：US06989599B1

    公开(公告)日：2006-01-24

    申请号：US09255856

    申请日：1999-02-23

    申请人： Tomio Iwasaki ,  Hideo Miura

    发明人： Tomio Iwasaki ,  Hideo Miura

    IPC分类号： H01L23/532

    CPC分类号： H01L23/53238 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L23/53228 ,  H01L23/53242 ,  H01L23/53252 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A reliable semiconductor device is provided with a layered interconnect structure that may develop no problem of voids and interconnect breakdowns, in which the layered interconnect structure includes a conductor film and a neighboring film so layered on a semiconductor substrate that the neighboring film is in contact with the conductor film. In the device, the materials for the conductor film and the neighboring film are so selected that the difference between the short side, ap, of the rectangular unit cells that constitute the plane with minimum free energy of the conductor film and the short side, an, of the rectangular unit cells that constitute the plane with minimum free energy of the neighboring film, {|ap−an|/ap}×100=A (%) and the difference between the long side, bp, of the rectangular unit cells that constitute the plane with minimum free energy of the conductor film and the long side, bn, of the rectangular unit cells that constitute the plane with minimum free energy of the neighboring film, {|bp−bn|/bp}×100=B (%) satisfy an inequality of {A+B×(ap/bp)}

    摘要翻译： 可靠的半导体器件具有分层互连结构，其不会产生空隙和互连故障的问题，其中分层互连结构包括导体膜和相邻薄膜层叠在半导体衬底上，邻近薄膜与 导体膜。 在该器件中，用于导体膜和相邻膜的材料被选择成使构成具有最小自由能的平面的矩形单元电池的短边，即< 导体薄膜和构成具有相邻薄膜的最小自由能的平面的矩形单元电池的短边，即 n x100 = A（％）和构成该矩阵单位单元的长边，b

    P 之间的差异 构成具有相邻膜的最小自由能的平面的矩形单位电池的导体膜和长边的最小自由能的平面{| b＆lt; p＆lt; x100 = B（％）满足{A + Bx（a p b＆lt; p＆lt; p＆gt;）} <13。 以这种方式，导体膜的扩散被延迟。

    Semiconductor device with CMOS-field-effect transistors having improved drain current characteristics
    76.
    发明授权
    Semiconductor device with CMOS-field-effect transistors having improved drain current characteristics 有权
    具有CMOS场效应晶体管的半导体器件具有改善的漏极电流特性

    公开(公告)号：US06982465B2

    公开(公告)日：2006-01-03

    申请号：US10433786

    申请日：2001-12-06

    申请人： Yukihiro Kumagai ,  Hiroyuki Ohta ,  Fumio Ootsuka ,  Shuji Ikeda ,  Takahiro Onai ,  Hideo Miura ,  Katsuhiko Ichinose ,  Toshifumi Takeda

    发明人： Yukihiro Kumagai ,  Hiroyuki Ohta ,  Fumio Ootsuka ,  Shuji Ikeda ,  Takahiro Onai ,  Hideo Miura ,  Katsuhiko Ichinose ,  Toshifumi Takeda

    IPC分类号： H01L29/76

    CPC分类号： H01L29/7842 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L27/092

    摘要： The present invention provides a semiconductor device including n-channel field effect transistors and p-channel field effect transistors all of which have excellent drain current characteristics.In a semiconductor device including an n-channel field effect transistor 10 and a p-channel field effect transistor 30, a stress control film 19 covering a gate electrode 15 of the n-channel field effect transistor 10 undergoes film stress mainly composed of tensile stress. A stress control film 39 covering a gate electrode 15 of the p-channel field effect transistor 30 undergoes film stress mainly caused by compression stress compared to the film 19 of the n-channel field effect transistor 10. Accordingly, drain current is expected to be improved in both the n-channel field effect transistor and the p-channel field effect transistor. Consequently, the characteristics can be generally improved.

    摘要翻译： 本发明提供一种包括n沟道场效应晶体管和p沟道场效应晶体管的半导体器件，其全部具有优良的漏极电流特性。 在包括n沟道场效应晶体管10和p沟道场效应晶体管30的半导体器件中，覆盖n沟道场效应晶体管10的栅电极15的应力控制膜19经受主要由拉伸应力 。 与n沟道场效应晶体管10的膜19相比，覆盖p沟道场效应晶体管30的栅电极15的应力控制膜39主要由压缩应力引起的膜应力。 因此，预期在n沟道场效应晶体管和p沟道场效应晶体管两者中都会改善漏极电流。 因此，通常可以提高特性。

    Semiconductor device and manufacturing method
    78.
    发明申请
    Semiconductor device and manufacturing method 失效
    半导体器件及制造方法

    公开(公告)号：US20050121727A1

    公开(公告)日：2005-06-09

    申请号：US10496766

    申请日：2002-11-11

    申请人： Norio Ishitsuka ,  Yukihiro Kumagai ,  Hideo Miura ,  Shuji Ikeda ,  Toshifumi Takeda ,  Hiroyuki Ohta

    发明人： Norio Ishitsuka ,  Yukihiro Kumagai ,  Hideo Miura ,  Shuji Ikeda ,  Toshifumi Takeda ,  Hiroyuki Ohta

    IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/822 ,  H01L21/8238 ,  H01L27/04 ,  H01L27/08 ,  H01L27/092 ,  H01L27/10 ,  H01L29/76 ,  H01L29/94 ,  H01L31/113

    CPC分类号： H01L29/7846 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823878 ,  H01L29/7842

    摘要： The object of the present invention is to provide a semiconductor device comprising an n-type channel field effect transistor and a p-type channel field effect transistor, which has a high degree of reliability and excellent drain current characteristics. The gist of the invention for attaining the object resides in disposing a silicon nitride film to the side wall of a trench for an active region in which the n-type channel field effect transistor is formed and disposing the silicon nitride film only in the direction perpendicular to the channel direction to the sidewall of the trench for the active region of the p-type channel field effect transistor. According to the present invention, a semiconductor device comprising an n-type channel field effect transistor and a p-type channel field effect transistor of excellent current characteristics can be provided.

    摘要翻译： 本发明的目的是提供一种包括n型沟道场效应晶体管和p型沟道场效应晶体管的半导体器件，其具有高可靠性和优异的漏极电流特性。 实现本发明的要点在于，在形成有n型沟道场效应晶体管的有源区的沟槽的侧壁上设置氮化硅膜，仅在垂直方向上设置氮化硅膜 到通道方向，到p型沟道场效应晶体管的有源区的沟槽的侧壁。 根据本发明，可以提供包括n型沟道场效应晶体管和具有优异电流特性的p型沟道场效应晶体管的半导体器件。

    Semiconductor device and manufacturing method
    79.
    发明授权
    Semiconductor device and manufacturing method 失效
    半导体器件及制造方法

    公开(公告)号：US06891761B2

    公开(公告)日：2005-05-10

    申请号：US10767053

    申请日：2004-01-30

    申请人： Yukihiro Kumagai ,  Hideo Miura ,  Hiroyuki Ohta ,  Michihiro Mishima ,  Katsuyuki Nakanishi

    发明人： Yukihiro Kumagai ,  Hideo Miura ,  Hiroyuki Ohta ,  Michihiro Mishima ,  Katsuyuki Nakanishi

    IPC分类号： H01L21/76 ,  H01L21/8234 ,  H01L21/8242 ,  H01L27/08 ,  H01L27/108 ,  G11C16/06

    CPC分类号： H01L29/7842 ,  H01L21/823412 ,  H01L21/823481 ,  H01L27/10873 ,  H01L27/10897

    摘要： A semiconductor device is provided including a circuit employing two or more field-effect transistor that are desired to have equal characteristics, capable of realizing high reliability and superior transistor characteristics. The transistors which are desired to have equal characteristics are placed in the semiconductor device so as to have the same STI trench width (the width of shallow trench isolation adjacent to an active area in which the transistor is formed). By such composition, stress growing in the active area due to the shallow trench isolation is equalized among the transistors, and, thereby, the characteristics of the transistors can be equalized.

    摘要翻译： 提供一种半导体器件，其包括使用期望具有相同特性的两个或更多个场效应晶体管的电路，能够实现高可靠性和优异的晶体管特性。 期望具有相同特性的晶体管被​​放置在半导体器件中，以具有相同的STI沟槽宽度（与形成晶体管的有源区相邻的浅沟槽隔离的宽度）。 通过这样的组成，由于浅沟槽隔离而在有源区中生长的应力在晶体管之间被均衡，从而可以使晶体管的特性相等。

    Winding device
    80.
    发明授权
    Winding device 有权
    绕线装置

    公开(公告)号：US06883746B2

    公开(公告)日：2005-04-26

    申请号：US10250550

    申请日：2001-01-04

    申请人： Atsumi Murachi ,  Hideo Miura ,  Takashi Nakamura

    发明人： Atsumi Murachi ,  Hideo Miura ,  Takashi Nakamura

    IPC分类号： B65H18/04 ,  B65H75/24 ,  B65H18/10

    CPC分类号： B65H18/04 ,  B65H75/243 ,  B65H2301/4148 ,  B65H2403/731

    摘要： A winding device, comprising a ring-shaped holder disposed concentrically with a winding shaft, a ring-shaped slider fitted onto the outer peripheral surface of the holder, and a plurality of chips disposed at angular intervals on a tapered inclined surface formed on the outer peripheral surface of the slider, wherein a fluid pressure passes through a first flow path in the winding shaft, the slider is moved in the axial direction of the winding shaft by a first piston, each chip is moved in the radial direction of the winding shaft by the inclination surface of the slider and pressed against the inner peripheral surface of the winding core so as to hold the winding core, a second piston is pressed against the end face of the holder by a second flow path independent of the first flow path, and the torque of the winding shaft is transmitted to the holder, slider, chips, and winding core by the friction between the second piston and the holder so as to rotate the winding core.

    摘要翻译： 一种卷绕装置，包括与卷绕轴同心地设置的环形保持器，安装在保持器的外周面上的环状滑块，和以角度间隔设置在形成于外侧的锥形倾斜面上的多个芯片 滑块的外周面，其中流体压力通过卷绕轴中的第一流路，滑块通过第一活塞沿着卷绕轴的轴向移动，每个芯片沿着卷绕轴的径向方向移动 通过滑动件的倾斜表面并压靠在卷芯的内周表面上以便保持卷芯，第二活塞通过独立于第一流动路径的第二流动路径被压靠在保持器的端面上， 并且通过第二活塞和保持器之间的摩擦将卷绕轴的扭矩传递到保持器，滑块，芯片和卷绕芯，以使卷绕芯旋转。