公开(公告)号：US08939112B2

公开(公告)日：2015-01-27

申请号：US12907423

申请日：2010-10-19

申请人： Katsumi Kikuchi

发明人： Katsumi Kikuchi

IPC分类号： F22B37/24 ,  F22B21/00 ,  F22B37/20

CPC分类号： F22B37/208 ,  F22B21/00 ,  F22B37/244

摘要： A buckstay connecting system includes a socket part that is fixed to the horizontal buckstay being separated from a lower end of the vertical buckstay between the lower end of the vertical buckstay and the horizontal buckstay, and an insertion part that is fixed to a lower portion of the vertical buckstay, is inserted into the socket part so as to be able to slide in a vertical direction, inhibits the horizontal buckstay from being inclined, and is allowed to be fastened to the socket part.

摘要翻译： 搭扣连接系统包括：固定在水平支架上的插座部分，其与垂直支座的下端与水平支柱之间的垂直支柱的下端分离;以及插入部，其固定到 垂直支架插入插座部分，以便能够在垂直方向上滑动，从而阻止水平支架倾斜，并且允许将其固定到插座部分。

公开(公告)号：US07397000B2

公开(公告)日：2008-07-08

申请号：US11125158

申请日：2005-05-10

申请人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Hideya Murai ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata

发明人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Hideya Murai ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata

IPC分类号： H05K1/00

CPC分类号： H01L23/49816 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/145 ,  H01L23/49822 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0366 ,  H05K3/205 ,  H05K3/423 ,  H05K2201/0376 ,  H05K2201/068 ,  H05K2203/0733 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board has a base insulating film. The base insulating film has a thickness of 20 to 100 μm and is made of a heat-resistant resin which has a glass-transition temperature of 150° C. or higher and which contains reinforcing fibers made of glass or aramid. The base insulating film has the following physical properties (1) to (6) when an elastic modulus at a temperature of T° C. is given as DT (GPa) and a breaking strength at a temperature of T° C. is given as HT (MPa). (1) A coefficient of thermal expansion in the direction of thickness thereof is 90 ppm/K or less (2) D23≧5 (3) D150≧2.5 (4) (D−65/D150)≦3.0 (5) H23≧140 (6) (H−65/H150)≦2.3.

摘要翻译： 布线板具有基底绝缘膜。 基底绝缘膜的厚度为20〜100μm，由玻璃化转变温度为150℃以上的含有玻璃或芳族聚酰胺的增强纤维的耐热性树脂构成。 当在T℃的温度下的弹性模量为D T（GPa）时，基体绝缘膜具有以下物理性质（1）至（6））和在温度下的断裂强度 的T℃给出为H T（MPa）。 （1）其厚度方向的热膨胀系数为90ppm / K以下（2）D 23 = 5（3）D 150 = 140（6）（H < => 150 150

公开(公告)号：US07338884B2

公开(公告)日：2008-03-04

申请号：US10997986

申请日：2004-11-29

申请人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Koji Matsui ,  Kazuhiro Baba

发明人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Koji Matsui ,  Kazuhiro Baba

IPC分类号： H01L21/00 ,  H01L21/76 ,  H01L21/30 ,  H01L21/4763 ,  H01L21/44 ,  H01L29/40

CPC分类号： H05K3/20 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/112 ,  H05K3/4644

摘要： An interconnecting substrate for carrying a semiconductor device, comprising: an insulating layer; an interconnection set on an obverse surface of the insulating layer; an electrode which is set on a reverse surface side of the insulating layer and formed in such a way that, at least, a lateral face of an obverse end of the electrode is all round brought into contact with the insulating layer, while, at least, a reverse surface of the electrode is not in contact with said insulating layer; a via conductor which is disposed on an obverse surface of the electrode and formed in the insulating layer so as to connect this electrode with the interconnection; and a supporting structure on the surface of the insulating layer.

摘要翻译： 一种用于承载半导体器件的互连衬底，包括：绝缘层; 在所述绝缘层的正面上设置的布线; 设置在绝缘层的背面侧的电极，其形成方式至少使电极的正面的侧面全部与绝缘层接触，同时至少 电极的反面不与所述绝缘层接触; 通孔导体，其设置在所述电极的正面上并形成在所述绝缘层中，以将所述电极与所述互连件连接; 以及在绝缘层的表面上的支撑结构。

公开(公告)号：US06960258B2

公开(公告)日：2005-11-01

申请号：US10267667

申请日：2002-10-10

申请人： Katsumi Kikuchi

发明人： Katsumi Kikuchi

IPC分类号： B05C5/02 ,  B05C17/005 ,  H01L21/00 ,  B65D5/72

CPC分类号： B05C17/00503 ,  B05C5/02 ,  H01L21/67126

摘要： By means of a fluid material discharge device of simple construction, a technique for fluid material discharge is provided which has few or no inadequate discharge, high productivity, and which enables easy modification and adjustment of the amount of fluid material discharge. The fluid material discharge device comprises a nozzle for discharge of fluid material and a filament-shape member inserted into the nozzle for use. The filament-shape member has a tip portion AA, which is exposed outside of the nozzle when no pressure is exerted on the tip of the filament-shape member, a portion BB which can be inserted into the nozzle, and a portion CC, on the side of the filament-shape member opposite the tip portion AA, and being bent from the portion BB. The spring structure of the filament-shape member is utilized to discharge fluid material.

摘要翻译： 通过简单结构的流体物料排出装置，提供了一种液体材料排出技术，其排放量很少或排放不足，生产率高，能够容易地改变和调节流体材料的排出量。 流体材料排出装置包括用于排出流体材料的喷嘴和插入喷嘴中的丝状构件用于使用。 长丝状构件具有尖端部AA，当没有压力施加在丝状构件的顶端上时，暴露在喷嘴外部，可以插入到喷嘴中的部分BB和部分CC 长丝状部件的与末端部分AA相对的一侧，并从部分BB弯曲。 丝状构件的弹簧结构用于排出流体材料。

公开(公告)号：US06861757B2

公开(公告)日：2005-03-01

申请号：US10097843

申请日：2002-03-15

申请人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Koji Matsui ,  Kazuhiro Baba

发明人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Koji Matsui ,  Kazuhiro Baba

IPC分类号： H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H05K3/20 ,  H05K3/46 ,  H01L23/48 ,  H01L29/40

CPC分类号： H05K3/20 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/112 ,  H05K3/4644

摘要： An interconnecting substrate for carrying a semiconductor device, comprising: an insulating layer; an interconnection set on an obverse surface of the insulating layer; an electrode which is set on a reverse surface side of the insulating layer and formed in such a way that, at least, a lateral face of an obverse end of the electrode is all round brought into contact with the insulating layer, while, at least, a reverse surface of the electrode is not in contact with said insulating layer; a via conductor which is disposed on an obverse surface of the electrode and formed in the insulating layer so as to connect this electrode with the interconnection; and a supporting structure on the surface of the insulating layer.

公开(公告)号：US07696007B2

公开(公告)日：2010-04-13

申请号：US12390708

申请日：2009-02-23

申请人： Katsumi Kikuchi ,  Tadanori Shimoto ,  Koji Matsui ,  Kazuhiro Baba

发明人： Katsumi Kikuchi ,  Tadanori Shimoto ,  Koji Matsui ,  Kazuhiro Baba

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/4857 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/81 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/0097 ,  H05K3/06 ,  H05K3/20 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/44 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/0969 ,  H05K2203/0323 ,  H05K2203/0376 ,  H05K2203/061 ,  H05K2203/1536 ,  H01L2924/00

摘要： A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.

摘要翻译： 用于安装半导体芯片的半导体封装板包括具有用于在其中接收半导体芯片的开口的金属基体和层叠在金属基底上的多层布线膜。 将半导体芯片倒装芯片接合到设置在开口内的多层布线膜上的金属焊盘上。 金属基体的表面与容纳在开口中的半导体芯片的顶表面齐平。 所得的半导体器件在不使用加强件的情况下具有较大数量的外部引脚和较小的变形。

公开(公告)号：US07233066B2

公开(公告)日：2007-06-19

申请号：US11411020

申请日：2006-04-26

申请人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

发明人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

IPC分类号： H01L23/48

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2924/19041 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/4682 ,  H05K2201/2018 ,  H05K2203/0152 ,  H05K2203/0376

摘要： A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.

摘要翻译： 公开了一种制造多层布线基板的方法。 多层布线基板不含芯基板，并且包括包含绝缘体层和布线层的堆积层。 构建层的第一主表面和第二主表面之一形成有金属支撑框体。 该方法包括以下步骤：在金属支撑板的第一主表面上形成第一绝缘体层，其中第一绝缘体层包含在绝缘体层中，并成为位于第一绝缘体层的第一主表面侧的第一抗蚀剂层 并且在第一绝缘体层的第一主表面上的给定位置形成第一金属焊盘层，其中第一金属焊盘层包括在布线层中并且变成金属焊盘层。

公开(公告)号：US07060604B2

公开(公告)日：2006-06-13

申请号：US10454530

申请日：2003-06-05

申请人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

发明人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

IPC分类号： H01L21/4763

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2924/19041 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/4682 ,  H05K2201/2018 ,  H05K2203/0152 ,  H05K2203/0376

摘要： A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.

摘要翻译： 公开了一种制造多层布线基板的方法。 多层布线基板不含芯基板，并且包括包含绝缘体层和布线层的堆积层。 构建层的第一主表面和第二主表面之一形成有金属支撑框体。 该方法包括以下步骤：在金属支撑板的第一主表面上形成第一绝缘体层，其中第一绝缘体层包含在绝缘体层中，并成为位于第一绝缘体层的第一主表面侧的第一抗蚀剂层 并且在第一绝缘体层的第一主表面上的给定位置形成第一金属焊盘层，其中第一金属焊盘层包括在布线层中并且变成金属焊盘层。

公开(公告)号：US20050281995A1

公开(公告)日：2005-12-22

申请号：US11167623

申请日：2005-06-27

申请人： Hideya Murai ,  Tadanori Shimoto ,  Kazuhiro Baba ,  Katsumi Kikuchi

发明人： Hideya Murai ,  Tadanori Shimoto ,  Kazuhiro Baba ,  Katsumi Kikuchi

IPC分类号： B32B7/12 ,  H05K3/46 ,  B32B3/00 ,  B32B15/00

CPC分类号： H05K3/4673 ,  B32B7/12 ,  H05K3/4644 ,  H05K2201/0154 ,  H05K2201/0195 ,  H05K2201/0358 ,  Y10T428/24917 ,  Y10T428/249953 ,  Y10T428/249955 ,  Y10T428/249958 ,  Y10T428/31681

摘要： In a sheet material (1), a bonding layer (2) is provided, and then a high-strength layer (3) is laminated on the bonding layer (2). The bonding layer (2) is made of an epoxy resin being a thermosetting material. The high-strength layer (3) is made of polyimide, which is not softened at a thermosetting temperature of the epoxy resin and has a tensile rupture strength higher than that of the cured thermosetting material. Moreover, the polyimide has a tensile rupture strength of 100 MPa or higher at 23° C. and a tensile rupture elongation of 10% or higher at 23° C. Assuming that a tensile rupture strength at −65° C. is a and a tensile rupture strength at 150° C. is b, a ratio (a/b) is 2.5 or less.

摘要翻译： 在片材（1）中，设置接合层（2），然后在接合层（2）上层叠高强度层（3）。 接合层（2）由作为热固性材料的环氧树脂制成。 高强度层（3）由聚酰亚胺制成，其在环氧树脂的热固化温度下不软化，并且其拉伸断裂强度高于固化的热固性材料的拉伸断裂强度。 此外，聚酰亚胺在23℃下的拉伸断裂强度为100MPa以上，在23℃下的拉伸断裂伸长率为10％以上。假设在-65℃下的拉伸断裂强度为a和a 150℃时的拉伸断裂强度为b，比率（a / b）为2.5以下。

公开(公告)号：US08148816B2

公开(公告)日：2012-04-03

申请号：US12522816

申请日：2008-01-11

申请人： Hideki Sasaki ,  Yuuki Fujimura ,  Katsumi Kikuchi

发明人： Hideki Sasaki ,  Yuuki Fujimura ,  Katsumi Kikuchi

IPC分类号： H01L23/34 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L23/552 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/18 ,  H01L2223/6688 ,  H01L2224/05624 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device in which a plurality of semiconductor chips is stacked. A first semiconductor chip is stacked in a region, on a second semiconductor chip, in which a circuit that generates noise is not disposed within said second semiconductor chip, and a wire of a circuit that easily receives noise within said first semiconductor chip is disposed so as not to extend over said circuit that generates noise.

摘要翻译： 堆叠多个半导体芯片的半导体装置。 第一半导体芯片堆叠在第二半导体芯片上，其中产生噪声的电路不设置在所述第二半导体芯片内，并且容易接收所述第一半导体芯片内的噪声的电路的布线被布置成 因为不能在产生噪声的电路上延伸。