公开(公告)号：US08039756B2

公开(公告)日：2011-10-18

申请号：US11542309

申请日：2006-10-04

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Yoichiro Kurita ,  Koji Soejima

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Yoichiro Kurita ,  Koji Soejima

IPC分类号： H05K1/16

CPC分类号： H01L21/6835 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/32 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K3/0023 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2203/0733 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/00

摘要： A multilayered wiring board has electrodes disposed on a first surface and a second surface, alternately layered insulation layers and wiring layers, and vias that are disposed in the insulation layer and electrically connect the wiring layers. The second electrode disposed on the second surface is embedded in the insulation layer exposed on said second surface, and the second wiring layer covered by the insulation layer exposed on said second surface does not have a layer for improving adhesion to the insulation layer.

摘要翻译： 多层布线基板具有设置在第一表面和第二表面上的电极，交替层叠的绝缘层和布线层以及布置在绝缘层中并且电连接布线层的通孔。 设置在第二表面上的第二电极嵌入在暴露在所述第二表面上的绝缘层中，并且由暴露在所述第二表面上的绝缘层覆盖的第二布线层不具有用于改善与绝缘层的粘附性的层。

公开(公告)号：US08030201B2

公开(公告)日：2011-10-04

申请号：US12635160

申请日：2009-12-10

申请人： Koji Soejima ,  Yoichiro Kurita ,  Masaya Kawano ,  Shintaro Yamamichi ,  Katsumi Kikuchi

发明人： Koji Soejima ,  Yoichiro Kurita ,  Masaya Kawano ,  Shintaro Yamamichi ,  Katsumi Kikuchi

IPC分类号： H01L21/44

CPC分类号： H01L21/563 ,  H01L21/6835 ,  H01L24/81 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1147 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A first electronic circuit component and a second electronic circuit component are electrically connected to an electro-conductive member via a first solder and a second solder, respectively. The electro-conductive member is formed in a resin film. The electro-conductive member is configured as containing a second diffusion barrier metal film. The second diffusion barrier metal film prevents diffusion of the second solder. Between the electro-conductive member and the first solder, a first diffusion barrier metal film is provided. The first diffusion barrier metal film prevents diffusion of the first solder. On the first surface of the resin film and on the electro-conductive member, an adhesive metal film is formed so as to contact with the resin film and the electro-conductive member. The adhesive metal film has stronger adhesiveness to the resin film than either of those of the first solder and the first diffusion barrier metal film.

摘要翻译： 第一电子电路部件和第二电子电路部件分别经由第一焊料和第二焊料电连接到导电部件。 导电构件形成在树脂膜中。 导电构件被构造成包含第二扩散阻挡金属膜。 第二扩散阻挡金属膜防止第二焊料的扩散。 在导电构件和第一焊料之间设置有第一扩散阻挡金属膜。 第一扩散阻挡金属膜防止第一焊料的扩散。 在树脂膜的第一表面和导电部件上形成粘接金属膜，以与树脂膜和导电部件接触。 粘合金属膜比第一焊料和第一扩散阻挡金属膜中的任一种具有比树脂膜更强的粘附性。

公开(公告)号：US07701726B2

公开(公告)日：2010-04-20

申请号：US12340267

申请日：2008-12-19

申请人： Jun Tsukano ,  Kenta Ogawa ,  Takehiko Maeda ,  Shintaro Yamamichi ,  Katsumi Kikuchi

发明人： Jun Tsukano ,  Kenta Ogawa ,  Takehiko Maeda ,  Shintaro Yamamichi ,  Katsumi Kikuchi

IPC分类号： H05K1/11 ,  H01K1/14

CPC分类号： H05K1/0271 ,  H01L21/4846 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H05K3/205 ,  H05K3/4644 ,  H05K2201/09018 ,  H05K2201/09481 ,  H05K2201/09781 ,  H01L2924/00 ,  H01L2224/0401

摘要： A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed.

摘要翻译： 布线基板包括基底绝缘膜，形成在基底绝缘膜的上表面侧上的第一互连，设置在形成在基底绝缘膜中的通孔中的通孔导体，以及设置在基底绝缘膜的底面侧的第二互连 基底绝缘膜，第二互连件经由通孔导体连接到第一互连件。 布线基板包括分割的基板单元区域，其中形成有第一互连，通孔导体和第二互连。

公开(公告)号：US07649749B2

公开(公告)日：2010-01-19

申请号：US11822599

申请日：2007-07-09

申请人： Jun Tsukano ,  Kenta Ogawa ,  Takehiko Maeda ,  Shintaro Yamamichi ,  Katsumi Kikuchi

发明人： Jun Tsukano ,  Kenta Ogawa ,  Takehiko Maeda ,  Shintaro Yamamichi ,  Katsumi Kikuchi

IPC分类号： H05K1/11 ,  H05K1/14

CPC分类号： H05K1/0271 ,  H01L21/4846 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H05K3/205 ,  H05K3/4644 ,  H05K2201/09018 ,  H05K2201/09481 ,  H05K2201/09781 ,  H01L2924/00 ,  H01L2224/0401

摘要： A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film. The second interconnection is connected to the first interconnection via the via. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via, and the second interconnection are formed. The wiring substrate includes a warpage-controlling pattern on the base insulating film, with a warped shape such that when the wiring substrate rests on a horizontal plate, at least a central part of a plane surface of the substrate contacts the horizontal plate, with both ends of the side raised.

摘要翻译： 布线基板包括基底绝缘膜，形成在基底绝缘膜的顶表面侧的第一互连，设置在形成在基底绝缘膜中的通孔中的通孔导体，以及设置在基底绝缘膜的底表面侧的第二互连 基底绝缘膜。 第二互连通过通孔连接到第一互连。 布线基板包括分开的基板单元区域，其中形成有第一互连，通孔和第二互连。 布线基板包括在基底绝缘膜上的翘曲控制图案，具有翘曲形状，使得当布线基板搁置在水平板上时，基板的平面的至少中心部分接触水平板，两者 一边抬起头。

公开(公告)号：US20090046441A1

公开(公告)日：2009-02-19

申请号：US12160132

申请日：2006-12-20

申请人： Takuo Funaya ,  Hideya Murai ,  Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hirokazu Honda ,  Shinichi Miyazaki

发明人： Takuo Funaya ,  Hideya Murai ,  Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hirokazu Honda ,  Shinichi Miyazaki

IPC分类号： H05K1/11 ,  H05K1/18

CPC分类号： H01L21/6835 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49866 ,  H01L24/45 ,  H01L24/48 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/19041 ,  H05K1/115 ,  H05K1/117 ,  H05K3/20 ,  H05K3/4614 ,  H05K3/4682 ,  H05K3/4694 ,  H05K2201/0272 ,  H05K2201/0352 ,  H05K2201/09845 ,  H05K2201/09972 ,  H05K2203/0425 ,  H05K2203/061 ,  H01L2924/00 ,  H01L2224/05599

摘要： A wiring board for mounting semiconductor device, includes at least a dielectric film 1; wirings formed in the dielectric film 1; a plurality of electrode pads provided at front and back surfaces of the dielectric film with their surfaces exposed and at least portions of lateral sides of them buried into the dielectric film; vias connecting the wirings and the electrode pads. At least one via connecting each other the wirings formed in the dielectric film includes second material different from first material forming the vias connecting the wirings and the electrode pads. The wiring board for mounting semiconductor device, is effective for an increase in terminals and finer pitch of terminal intervals due to an improvement in integration, performance or multi-function of semiconductor devices, can mount semiconductor devices especially on both sides of the board at a high density and high accuracy, and furthermore, is excellent in reliability as well.

摘要翻译： 一种用于安装半导体器件的布线板，至少包括电介质膜1; 电介质膜1中形成的布线; 多个电极焊盘，其设置在电介质膜的前表面和后表面，其表面暴露，并且其侧面的至少一部分埋入电介质膜中; 连接布线和电极垫的通孔。 至少一个彼此连接的通孔形成在电介质膜中的布线包括与形成连接布线和电极焊盘的通孔的第一材料不同的第二材料。 用于安装半导体器件的布线板，由于半导体器件的集成度，性能或多功能性的提高，端子间距的增加和端子间隔的更细的间距是有效的，所以可以在半导体器件的两侧特别地安装半导体器件 高密度和高精度，此外，也具有优异的可靠性。

公开(公告)号：US07294393B2

公开(公告)日：2007-11-13

申请号：US11167623

申请日：2005-06-27

申请人： Hideya Murai ,  Tadanori Shimoto ,  Kazuhiro Baba ,  Katsumi Kikuchi

发明人： Hideya Murai ,  Tadanori Shimoto ,  Kazuhiro Baba ,  Katsumi Kikuchi

IPC分类号： B32B3/06

CPC分类号： H05K3/4673 ,  B32B7/12 ,  H05K3/4644 ,  H05K2201/0154 ,  H05K2201/0195 ,  H05K2201/0358 ,  Y10T428/24917 ,  Y10T428/249953 ,  Y10T428/249955 ,  Y10T428/249958 ,  Y10T428/31681

摘要： In a sheet material (1), a bonding layer (2) is provided, and then a high-strength layer (3) is laminated on the bonding layer (2). The bonding layer (2) is made of an epoxy resin being a thermosetting material. The high-strength layer (3) is made of polyimide, which is not softened at a thermosetting temperature of the epoxy resin and has a tensile rupture strength higher than that of the cured thermosetting material. Moreover, the polyimide has a tensile rupture strength of 100 MPa or higher at 23° C. and a tensile rupture elongation of 10% or higher at 23° C. Assuming that a tensile rupture strength at −65° C. is a and a tensile rupture strength at 150° C. is b, a ratio (a/b) is 2.5 or less.

摘要翻译： 在片材（1）中，设置接合层（2），然后在接合层（2）上层叠高强度层（3）。 接合层（2）由作为热固性材料的环氧树脂制成。 高强度层（3）由聚酰亚胺制成，其在环氧树脂的热固化温度下不软化，并且其拉伸断裂强度高于固化的热固性材料的拉伸断裂强度。 此外，聚酰亚胺在23℃下的拉伸断裂强度为100MPa以上，在23℃下的拉伸断裂伸长率为10％以上。假设在-65℃下的拉伸断裂强度为a和a 150℃时的拉伸断裂强度为b，比率（a / b）为2.5以下。

公开(公告)号：US20050130413A1

公开(公告)日：2005-06-16

申请号：US10997986

申请日：2004-11-29

申请人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Koji Matsui ,  Kazuhiro Baba

发明人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Koji Matsui ,  Kazuhiro Baba

IPC分类号： H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H05K3/20 ,  H05K3/46 ,  H01L21/4763

CPC分类号： H05K3/20 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/112 ,  H05K3/4644

摘要： An interconnecting substrate for carrying a semiconductor device, comprising: an insulating layer; an interconnection set on an obverse surface of the insulating layer; an electrode which is set on a reverse surface side of the insulating layer and formed in such a way that, at least, a lateral face of an obverse end of the electrode is all round brought into contact with the insulating layer, while, at least, a reverse surface of the electrode is not in contact with said insulating layer; a via conductor which is disposed on an obverse surface of the electrode and formed in the insulating layer so as to connect this electrode with the interconnection; and a supporting structure on the surface of the insulating layer.

摘要翻译： 一种用于承载半导体器件的互连衬底，包括：绝缘层; 在所述绝缘层的正面上设置的布线; 设置在绝缘层的背面侧的电极，其形成方式至少使电极的正面的侧面全部与绝缘层接触，同时至少 电极的反面不与所述绝缘层接触; 通孔导体，其设置在所述电极的正面上并形成在所述绝缘层中，以将所述电极与所述互连件连接; 以及在绝缘层的表面上的支撑结构。

公开(公告)号：US20050098875A1

公开(公告)日：2005-05-12

申请号：US11002248

申请日：2004-12-03

申请人： Katsumi Kikuchi ,  Tadanori Shimoto ,  Koji Matsui ,  Kazuhiro Baba

发明人： Katsumi Kikuchi ,  Tadanori Shimoto ,  Koji Matsui ,  Kazuhiro Baba

IPC分类号： H01L21/60 ,  H01L23/498 ,  H01L23/538 ,  H05K3/00 ,  H05K3/06 ,  H05K3/20 ,  H05K3/40 ,  H05K3/44 ,  H05K3/46 ,  H01L23/053 ,  H01L23/48

CPC分类号： H01L21/4857 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/81 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/0097 ,  H05K3/06 ,  H05K3/20 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/44 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/0969 ,  H05K2203/0323 ,  H05K2203/0376 ,  H05K2203/061 ,  H05K2203/1536 ,  H01L2924/00

摘要： A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.

公开(公告)号：US20050088833A1

公开(公告)日：2005-04-28

申请号：US10975061

申请日：2004-10-26

申请人： Katsumi Kikuchi ,  Tadanori Shimoto ,  Kazuhiro Baba

发明人： Katsumi Kikuchi ,  Tadanori Shimoto ,  Kazuhiro Baba

IPC分类号： H01L23/13 ,  H01L23/16 ,  H01L23/31 ,  H01L23/498 ,  H05K7/06 ,  H05K1/03 ,  H05K1/16

CPC分类号： H01L23/16 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49822 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041

摘要： There are provided a semiconductor device mounting board, a method of manufacturing the same, a method of inspecting the same, and a semiconductor package in which by improving a conventional wiring board, the semiconductor device mounting board is capable of implementing a high-density and fine structure corresponding to a narrowing pitch and has high mounting reliability. A semiconductor device mounting board characterized by comprising a wiring construction film including an insulating layer and a wiring layer, a first electrode pattern disposed on one surface of the wiring construction film in which a periphery of a side surface of the electrode pattern is in contact with the insulating layer, at least a rear surface of the first electrode pattern is not in contact with the insulating layer, and the insulating layer surface on which the first electrode pattern is disposed is in a plane in which the first electrode pattern rear surface exists; a second electrode pattern in a surface on an opposing side of the first electrode pattern, an insulator film in which an opening pattern which can be housed in the first electrode pattern is disposed, and a metallic supporter disposed on the insulator film surface.

摘要翻译： 提供了一种半导体器件安装板，其制造方法，其检查方法和半导体封装，其中通过改进传统的布线板，半导体器件安装板能够实现高密度和 精细结构对应于窄的间距并且具有高的安装可靠性。 一种半导体器件安装板，其特征在于包括具有绝缘层和布线层的布线构造膜，布置在布线构造膜的一个表面上的第一电极图案，其中电极图案的侧面的周边与 绝缘层，第一电极图案的至少后表面不与绝缘层接触，并且其上设置有第一电极图案的绝缘层表面处于其中存在第一电极图案背面的平面中; 在第一电极图案的相对侧的表面中的第二电极图案，设置有可容纳在第一电极图案中的开口图案的绝缘膜，以及设置在绝缘膜表面上的金属支撑体。

公开(公告)号：US4856353A

公开(公告)日：1989-08-15

申请号：US323192

申请日：1989-03-13

申请人： Yoshimi Okabe ,  Katsumi Kikuchi

发明人： Yoshimi Okabe ,  Katsumi Kikuchi

IPC分类号： G01N21/88 ,  F22B37/02 ,  F28F11/00 ,  G01N21/954 ,  G02B23/24

CPC分类号： G01N21/954 ,  G02B23/2492

摘要： When a measuring instrument is inserted through a header into a boiler heat-transfer tube so as to carry out inspection, a guide for insertion of the measuring instrument is positively and correctly aligned with a heat transfer tube hole of the header.

摘要翻译： 当将测量仪器通过集管插入锅炉传热管中进行检查时，用于插入测量仪器的引导件与插头的传热管孔正确对准。