公开(公告)号：US20050124153A1

公开(公告)日：2005-06-09

申请号：US11023833

申请日：2004-12-28

申请人： Uri Cohen

发明人： Uri Cohen

IPC分类号： H01L21/768 ,  H01L21/4763 ,  H01L21/44

CPC分类号： H01L23/53238 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76873 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53252 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： One embodiment of the present invention is a method for making metallic interconnects, which method is utilized at a stage of processing a substrate having a patterned insulating layer which includes at least one opening and a field surrounding the at least one opening, the field and the at least one opening being ready for depositing one or more seed layers, which method includes steps of: (a) depositing by an ALD technique at least an initial portion of a substantially conformal seed layer on the field and inside surfaces of the at least one opening, wherein said at least one opening has a width of less than about 0.13 μm; (b) depositing by a PVD technique a substantially non-conformal seed layer over the substantially conformal seed layer, said substantially non-conformal seed layer being thicker than said substantially conformal seed layer over the field; and (c) electroplating a metallic layer over the substantially non-conformal seed layer, wherein the electroplated metallic layer consists of a material selected from a group consisting of Cu, Ag, or alloys comprising one or more of these metals.

摘要翻译： 本发明的一个实施例是一种用于制造金属互连的方法，该方法用于处理具有图案化绝缘层的基底的阶段，该图案化绝缘层包括至少一个开口和围绕该至少一个开口的场， 至少一个开口准备用于沉积一个或多个种子层，该方法包括以下步骤：（a）通过ALD技术沉积基本上保形的种子层的至少一个初始部分，该至少一个初始部分在至少一个 开口，其中所述至少一个开口具有小于约0.13μm的宽度; （b）通过PVD技术沉积在所述基本上保形的种子层上的基本上不共形的种子层，所述基本上不共形的种子层比所述场上的所述基本上保形的种子层厚; 和（c）在基本上不共形的种子层上电镀金属层，其中电镀金属层由选自Cu，Ag或包含这些金属中的一种或多种的合金组成的材料组成。

公开(公告)号：US06872657B2

公开(公告)日：2005-03-29

申请号：US10638235

申请日：2003-08-08

申请人： Chaoyong Li ,  Dao Hua Zhang

发明人： Chaoyong Li ,  Dao Hua Zhang

IPC分类号： H01L21/285 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76843 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76862 ,  H01L21/76873 ,  H01L2221/1089

摘要： Copper seed layers for use in damascene structures are commonly deposited by CVD because of their superior step coverage. However, these films have poor adhesion to the barrier layer. This problem has been overcome by preceding the deposition of the CVD copper layer with a metal plasma treatment that lays down a very thin layer of copper while the structure receiving it is maintained at a temperature below about −40 C. This is followed by a short exposure to a nitrogen bearing plasma. The results is a seed layer having excellent step coverage as well as very good adhesion to the underlying barrier layer.

摘要翻译： 用于镶嵌结构的铜种子层通常由CVD沉积，因为它们具有优异的阶梯覆盖。 然而，这些膜对阻挡层的粘附性差。 通过在金属等离子体处理沉积CVD铜层之前已经克服了这个问题，金属等离子体处理层放置了非常薄的铜层，而接收它的结构保持在低于约-40℃的温度。之后是短暂的 暴露于含氮等离子体。 结果是具有优异的台阶覆盖以及对下面的阻挡层的非常好的附着力的种子层。

公开(公告)号：US20050048768A1

公开(公告)日：2005-03-03

申请号：US10924767

申请日：2004-08-25

申请人： Hiroaki Inoue ,  Yukio Fukunaga ,  Akira Susaki

发明人： Hiroaki Inoue ,  Yukio Fukunaga ,  Akira Susaki

IPC分类号： H01L21/00 ,  H01L21/288 ,  H01L21/306 ,  H01L21/3213 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76843 ,  H01L21/02052 ,  H01L21/288 ,  H01L21/32134 ,  H01L21/6708 ,  H01L21/76849 ,  H01L21/76874 ,  H01L21/76877 ,  H01L2221/1089

摘要： There is provided an apparatus for forming interconnects which can form embedded interconnects or interconnects protected with a protective film while preventing the formation of an oxide film. An interconnects-forming apparatus for forming embedded interconnects in a surface of a substrate, includes: a barrier layer-forming apparatus for forming a barrier layer on a surface of a substrate; a metal layer-forming apparatus for forming a metal layer on the surface of the barrier layer formed in the barrier layer-forming apparatus; and an apparatus frame capable of controlling the internal atmosphere; wherein the barrier layer-forming apparatus and the metal layer-forming apparatus are disposed in the apparatus frame.

摘要翻译： 提供了一种用于形成互连的装置，其可以形成用保护膜保护的嵌入式互连或互连，同时防止氧化膜的形成。 一种用于在衬底的表面中形成嵌入式互连的互连形成装置，包括：阻挡层形成装置，用于在衬底的表面上形成阻挡层; 金属层形成装置，用于在阻挡层形成装置中形成的势垒层的表面上形成金属层; 以及能够控制内部气氛的装置框架; 其中所述阻挡层形成装置和所述金属层形成装置设置在所述装置框架中。

公开(公告)号：US20040235294A1

公开(公告)日：2004-11-25

申请号：US10472678

申请日：2003-09-18

发明人： Toru Imori ,  Junnosuke Sekiguchi ,  Atsushi Yabe

IPC分类号： H01L021/44

CPC分类号： H01L21/76874 ,  C23C18/1844 ,  C23C18/31 ,  H01L21/288 ,  H01L2221/1089

摘要： It is an object of the present invention to provide a semiconductor wafer on which a thin, smooth, uniform and good adhesive electroless plating layer that can be suitable for a seed layer is formed, and to provide an electroless plating method which is suitable for use in the manufacture of such a semiconductor wafer. A semiconductor wafer is coated with a silane coupling agent which has a functional group that is able to capture a metal, and is further coated with an organic-solvent solution of a palladium compound such as palladium chloride or the like. Afterward, the wafer is electroless plated. As a result of such an electroless plating method, a semiconductor wafer having a thickness of 70 to 5000 angstroms and a mean surface roughness Ra of 10 to 100 angstroms can be obtained.

摘要翻译： 本发明的目的是提供一种半导体晶片，其上形成了可以适用于晶种层的薄，平滑，均匀和良好的粘合剂化学镀层，并提供适合使用的无电镀方法 在制造这种半导体晶片时。 半导体晶片涂覆有具有能够捕获金属的官能团的硅烷偶联剂，并进一步用钯化合物如氯化钯等的有机溶剂溶液涂布。 之后，晶片被无电镀。 作为这种无电镀方法的结果，可以获得厚度为70至5000埃的平均表面粗糙度Ra为10至100埃的半导体晶片。

公开(公告)号：US06787006B2

公开(公告)日：2004-09-07

申请号：US10197680

申请日：2002-07-16

申请人： Praburam Gopalraja ,  Jianming Fu ,  Fusen Chen ,  Girish Dixit ,  Zheng Xu ,  Wei Wang ,  Ashok K. Sinha

发明人： Praburam Gopalraja ,  Jianming Fu ,  Fusen Chen ,  Girish Dixit ,  Zheng Xu ,  Wei Wang ,  Ashok K. Sinha

IPC分类号： C23C1435

CPC分类号： H01L21/76844 ,  C23C14/046 ,  C23C14/165 ,  C23C14/185 ,  C23C14/225 ,  C23C14/35 ,  H01J37/3405 ,  H01J37/342 ,  H01J37/3423 ,  H01J37/3452 ,  H01J37/3455 ,  H01J37/3458 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76873 ,  H01L2221/1089

摘要： A multi-step sputtering process in plasma sputter reactor having target and magnetron operable in two modes, for example, in a substrate sputter etch and a substrate sputter deposition. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.

摘要翻译： 在等离子体溅射反应器中的多步骤溅射工艺，其具有可在两种模式中操作的靶和磁控管，例如在衬底溅射蚀刻和衬底溅射沉积中。 目标具有面向待溅射涂覆的晶片的环形保险库。 位于拱顶周围的各种类型的磁性装置产生一个支撑等离子体的磁场，该等离子体延伸在大容积的拱顶上。 与本发明的反应器或其它反应器的集成铜通孔填充方法包括铜的高度电离溅射沉积的第一步骤，其可任选地用于去除通孔底部的阻挡层，更中立的，更低的 铜的完全溅射沉积以完成种子层，以及将铜电镀到孔中以完成金属化的第三步骤。 前两个步骤也可以与阻隔金属一起使用。

公开(公告)号：US06713122B1

公开(公告)日：2004-03-30

申请号：US10272693

申请日：2002-10-15

申请人： Steven T. Mayer ,  John B. Alexy ,  Jingbin Feng

发明人： Steven T. Mayer ,  John B. Alexy ,  Jingbin Feng

IPC分类号： B05D512

CPC分类号： H01L21/76843 ,  C23C18/1617 ,  C23C18/1669 ,  C23C18/1675 ,  C23C18/1676 ,  C23C18/168 ,  C23C18/1692 ,  C23C18/40 ,  H01L21/288 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L2221/1089 ,  Y10S977/89

摘要： Methods and apparatus for reducing heat load and air exposure when using an electroless plating fluid during a plating process, are presented. An electroless plating apparatus, including an electroless plating vessel and recirculation systems, is presented. The electroless plating vessel minimizes air exposure (and thus evaporative cooling and degradation) of the electroless plating fluid while the recirculation systems minimize heat load of the electroless plating fluid.

摘要翻译： 提出了在电镀过程中使用化学镀液时减少热负荷和空气暴露的方法和装置。 提出了一种包括无电电镀容器和再循环系统的化学镀设备。 化学镀电容器使无电解电镀液体的空气暴露（以及因此蒸发冷却和降解）最小化，同时再循环系统最小化化学镀液的热负荷。

公开(公告)号：US20040023489A1

公开(公告)日：2004-02-05

申请号：US10210932

申请日：2002-08-02

发明人： Dinesh Chopra

IPC分类号： H01L021/326 ,  H01L021/479 ,  H01L021/44

CPC分类号： H01L21/76843 ,  H01L21/265 ,  H01L21/76859 ,  H01L21/76873 ,  H01L21/76879 ,  H01L2221/1089 ,  Y10S438/918 ,  Y10S438/946

摘要： The present invention is generally directed to various methods of using ion implantation techniques to control various metal formation processes. In one illustrative embodiment, the method comprises forming a metal seed layer above a patterned layer of insulating material, the patterned layer of insulating material defining a plurality of field areas, deactivating at least a portion of the metal seed layer in areas where the metal seed layer is positioned above at least some of the field areas, and performing a deposition process to deposit a metal layer above the metal seed layer. In some embodiments, the metal may be comprised of copper, platinum, nickel, tantalum, tungsten, cobalt, etc. Portions of the metal seed layer may be deactivated by implanting ions into portions of the metal seed layer positioned above at least some of the field areas. The implanted ions may be comprised of nitrogen, carbon, silicon, hydrogen, etc. In yet another illustrative embodiment, the system comprises a stencil mask implant tool for implanting ions into selected areas of a metal seed layer formed above a patterned layer of insulating material that defines a plurality of field areas, the ions being implanted into areas of the metal seed layer positioned above at least some of the field areas.

公开(公告)号：US06686278B2

公开(公告)日：2004-02-03

申请号：US09884799

申请日：2001-06-19

申请人： Yu-Piao Wang ,  Chia-Che Chuang

发明人： Yu-Piao Wang ,  Chia-Che Chuang

IPC分类号： H01L2144

CPC分类号： H01L21/76843 ,  H01L21/28562 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76876 ,  H01L2221/1089

摘要： A method for forming a plug metal layer is disclosed and includes the following steps. Performance of an atomic layer deposition (ALD) at least once to form a continuous metal seed layer (CMSL) on a barrier layer, wherein the atomic layer deposition comprise: a mixing gas of hydrogen and silane, such as hydroxy silane or tetrahydroxy silane, being transported on the barrier layer. Next, performance of a purge/vacuum process. Then transporting a reactive gas, such as WF6, to form the continuous metal seed layer (CMSL). A subsequent cycle step of atomic layer deposition (ALD) can be repeated to form the thickness of the continuous metal seed layer (CMSL) to about 20 to 40 Å.

摘要翻译： 公开了一种形成插塞金属层的方法，包括以下步骤。 原子层沉积（ALD）的性能至少一次以在阻挡层上形成连续金属种子层（CMSL），其中原子层沉积包括：氢和硅烷的混合气体，例如羟基硅烷或四羟基硅烷， 在阻挡层上运输。 接下来，执行吹扫/真空过程。 然后输送诸如WF6的反应气体以形成连续的金属种子层（CMSL）。 可以重复原子层沉积（ALD）的随后的循环步骤以将连续金属种子层（CMSL）的厚度形成为约20至40埃。

公开(公告)号：US06664122B1

公开(公告)日：2003-12-16

申请号：US09996425

申请日：2001-11-27

申请人： Tatyana N. Andryuschenko ,  Jonathan D. Reid ,  Steven T. Mayer ,  Eric G. Webb

发明人： Tatyana N. Andryuschenko ,  Jonathan D. Reid ,  Steven T. Mayer ,  Eric G. Webb

IPC分类号： H01L2166

CPC分类号： H01L21/76843 ,  C23C18/1617 ,  C23C18/1669 ,  C23C18/1675 ,  C23C18/1676 ,  C23C18/168 ,  C23C18/1692 ,  C23C18/40 ,  H01L21/288 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L2221/1089 ,  Y10S977/89

摘要： Disclosed is a procedure for deposition of a thin and relatively continuous electroless copper film on the substrate of sub-micron integrated circuit features. The electroless copper film is deposited onto a previously deposited PVD copper film, which may be discontinuous. The continuous film formed by electroless deposition allows for sufficient filling of the sub-micron integrated circuit features by electrodeposition. The electroless bath employed to form the continuous electroless copper film may be composed of a reducing agent, a complexing agent, a source of copper ions, a pH adjuster, and optionally one or more surfactants and/or stabilizers. In one example, the reducing agent contains an aldehyde moiety.

摘要翻译： 公开了在亚微米集成电路特征的衬底上沉积薄而相对连续的无电铜膜的步骤。 将化学镀铜膜沉积在预先沉积的PVD铜膜上，其可以是不连续的。 通过无电沉积形成的连续膜允许通过电沉积充分填充亚微米集成电路特征。 用于形成连续化学镀铜膜的无电镀浴可以由还原剂，络合剂，铜离子源，pH调节剂和任选的一种或多种表面活性剂和/或稳定剂组成。 在一个实例中，还原剂含有醛部分。

公开(公告)号：US06660154B2

公开(公告)日：2003-12-09

申请号：US09981851

申请日：2001-10-17

申请人： David Merricks ,  Denis Morrissey ,  Martin W. Bayes ,  Mark Lefebvre ,  James G. Shelnut ,  Donald E. Storjohann

发明人： David Merricks ,  Denis Morrissey ,  Martin W. Bayes ,  Mark Lefebvre ,  James G. Shelnut ,  Donald E. Storjohann

IPC分类号： C23C2800

CPC分类号： H01L21/76843 ,  C23C18/28 ,  C25D3/38 ,  C25D5/54 ,  C25D7/123 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76877 ,  H01L2221/1089

摘要： Disclosed are methods for repairing or enhancing discontinuous metal seed layers prior to subsequent metallization during the manufacture of electronic devices. Such repair methods do not require the use of a second electroplating bath.