Power semiconductor device having different channel regions

    公开(公告)号:US10396074B2

    公开(公告)日:2019-08-27

    申请号:US16116463

    申请日:2018-08-29

    Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, and first and second cells each configured for controlling a load current and electrically connected to the first load terminal structure and to a drift region. A first mesa in the first cell includes a port region electrically connected to the first load terminal structure, and a first channel region coupled to the drift region. A second mesa included in the second cell includes a port region electrically connected to the first load terminal structure, and a second channel region coupled to the drift region. The mesas are spatially confined in a direction perpendicular to a direction of the load current by an insulation structure, and have a total extension of less than 100 nm in that direction. The first channel region includes an inversion channel. The second channel region includes an accumulation channel.

    Power semiconductor device having fully depleted channel regions

    公开(公告)号:US10340336B2

    公开(公告)日:2019-07-02

    申请号:US15637459

    申请日:2017-06-29

    Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, an active cell field in the body, and a plurality of first and second cells in the active cell field. Each cell is electrically connected to the first load terminal structure and to a drift region. Each first cell includes a mesa having a port region electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each second cell includes a mesa having a port region of the opposite conductivity type electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each mesa is spatially confined in a direction perpendicular to a direction of the load current within the respective mesa, by an insulation structure and has a total extension of less than 100 nm in the direction.

    Power semiconductor device having fully depleted channel region

    公开(公告)号:US10141404B2

    公开(公告)日:2018-11-27

    申请号:US15635300

    申请日:2017-06-28

    Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, first and second cells electrically connected to the first load terminal structure and to a drift region, the drift region having a first conductivity type; a first mesa in the first cell and including: a port region electrically connected to the first load terminal structure, and a channel region coupled to the drift region; a second mesa in the second cell and including: a port region of the opposite conductivity type and electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each mesa is spatially confined, in a direction perpendicular to a direction of the load current within the respective mesa, by an insulation structure. The insulation structure houses a control electrode structure, and a guidance electrode arranged between the mesas.

    Semiconductor Device Having an Electrostatic Discharge Protection Structure

    公开(公告)号:US20180301537A1

    公开(公告)日:2018-10-18

    申请号:US15951918

    申请日:2018-04-12

    Abstract: A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface. A transistor structure is formed is the semiconductor body. A trench structure extends from the first surface into the semiconductor body. An electrostatic discharge protection structure is accommodated in the trench structure. The electrostatic discharge protection structure includes a first terminal region and a second terminal region. A source contact structure at the first surface is electrically connected to source regions of the transistor structure and to the first terminal region. A gate contact structure at the first surface is electrically connected to a gate electrode of the transistor structure and to the second terminal region.

    Current Measurement in a Power Semiconductor Device

    公开(公告)号:US20170170823A1

    公开(公告)日:2017-06-15

    申请号:US15377750

    申请日:2016-12-13

    Abstract: A semiconductor device includes a first load terminal, a second load terminal and a semiconductor body coupled to the first load terminal and the second load terminal. The semiconductor body is configured to conduct a load current along a load current path between the first load terminal and the second load terminal. The semiconductor device further includes a control electrode electrically insulated from the semiconductor body and configured to control a part of the load current path, and an electrically floating sensor electrode arranged adjacent to the control electrode. The sensor electrode is electrically insulated from each of the semiconductor body, and the control electrode and is capacitively coupled to the load current path.

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