公开(公告)号：US20090159316A1

公开(公告)日：2009-06-25

申请号：US12337965

申请日：2008-12-18

Applicant: Toshiyuki KURAMOCHI

Inventor： Toshiyuki KURAMOCHI

IPC: H05K1/03 ,  H05K3/00

CPC classification number: H05K1/0271 ,  H05K3/4602 ,  H05K3/4694 ,  H05K2201/0187 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/09972 ,  Y10T29/49124

Abstract: A wiring substrate is provided. The wiring substrate includes: a core layer in which a gap is formed; and a lamination layer which includes an insulating layer and a wiring layer and which is formed on at least one surface of the core layer. The lamination layer has a thermal expansion coefficient different from that of the core layer. A plurality of mounting regions on which an electronic component is to be mounted are provided on the lamination layer to be spaced from each other. The gap in the core layer is filled with an insulating member having the same material as the insulating layer and surrounds each of the plurality of mounting regions or each of mounting region groups including one or more of the mounting regions.

Abstract translation: 提供布线基板。 布线基板包括：形成有间隙的芯层; 以及层叠层，其包括绝缘层和布线层，并且形成在所述芯层的至少一个表面上。 层叠层的热膨胀系数与芯层的热膨胀系数不同。 要在其上安装电子部件的多个安装区域设置在层压层上以彼此间隔开。 芯层中的间隙填充有与绝缘层具有相同材料的绝缘构件，并且围绕多个安装区域中的每一个或包括一个或多个安装区域的每个安装区域组。

公开(公告)号：US07438560B2

公开(公告)日：2008-10-21

申请号：US11840709

申请日：2007-08-17

Applicant: Yasuhiro Takahashi

Inventor： Yasuhiro Takahashi

IPC: H01R12/00

CPC classification number: H05K1/0216 ,  H05K1/023 ,  H05K1/0237 ,  H05K1/0239 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/09972

Abstract: A printed wiring board, comprising a signal plane having a baseband block for processing a baseband signal and a high-frequency block for processing a high-frequency signal which is obtained by converting the baseband signal, and a ground plane opposing to the signal plane. The baseband block and the high-frequency block are connected through a transmission line for transmitting a signal of a specific frequency region. The ground plane is provided with a first ground portion and a second ground portion, the first ground portion being provided at an area opposing to the baseband block, the second ground portion being provided at an area opposing to the high-frequency block. The first ground portion and the second ground portion are coupled to each other through a coupling portion provided therebetween which has a low impedance with respect to the signal of the specific frequency region.

Abstract translation: 一种印刷电路板，包括具有用于处理基带信号的基带块的信号平面和用于处理通过转换基带信号而获得的高频信号的高频块以及与信号面相对的接地面。 基带块和高频块通过用于发送特定频率区域的信号的传输线路连接。 接地平面设置有第一接地部分和第二接地部分，第一接地部分设置在与基带部件相对的区域处，第二接地部分设置在与高频部件相对的区域。 第一接地部分和第二接地部分通过设置在它们之间的耦合部分彼此耦合，其相对于特定频率区域的信号具有低阻抗。

公开(公告)号：US07420127B2

公开(公告)日：2008-09-02

申请号：US11644143

申请日：2006-12-22

Applicant: Hiroshi Asami ,  Hidetoshi Kusano ,  Yuji Nishitani ,  Ken Orui

Inventor： Hiroshi Asami ,  Hidetoshi Kusano ,  Yuji Nishitani ,  Ken Orui

IPC: H05K1/02

CPC classification number: H05K3/4694 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/49833 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K3/0023 ,  H05K3/205 ,  H05K3/4617 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/09536 ,  H05K2201/09881 ,  H05K2201/09972 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

Abstract: The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.

Abstract translation: 本发明提供一种制造多层布线基板的方法，其可以以细间距保持导体图案的尺寸稳定性，从材料选择的角度解决对工艺的限制，并且进一步降低制造成本，并且 多层布线基板。 形成在由金属制成的支撑片和粘合剂层上的第二布线基板通过使用支撑片部分堆叠在第一布线基板的预定区域上。 在第二布线基板的层叠之后，最后蚀刻并去除支撑片。 第二布线基板仅堆叠在第一布线基板上需要多层的部分上，从而减少第二布线基板的结构材料的量。

公开(公告)号：US07405387B2

公开(公告)日：2008-07-29

申请号：US11646266

申请日：2006-12-28

Applicant: Arthur E. Colvin, Jr. ,  Paul Samuel Zerwekh ,  Jeffrey C. Lesho ,  Robert William Lynn ,  Carrie R. Lorenz ,  Casey J. O'Connor ,  Steven J. Walters

Inventor： Arthur E. Colvin, Jr. ,  Paul Samuel Zerwekh ,  Jeffrey C. Lesho ,  Robert William Lynn ,  Carrie R. Lorenz ,  Casey J. O'Connor ,  Steven J. Walters

IPC: G01J1/16

CPC classification number: A61B5/14556 ,  A61B5/0031 ,  A61B5/14532 ,  A61B5/1459 ,  A61B5/681 ,  G01N21/6428 ,  G01N21/645 ,  G01N2201/1244 ,  H05K1/0306 ,  H05K1/165 ,  H05K3/403 ,  H05K2201/086 ,  H05K2201/09972 ,  H05K2201/10106

Abstract: The present invention provides systems and methods for attenuating the effect of ambient light on optical sensors and for measuring and compensating quantitatively for the ambient light.

Abstract translation: 本发明提供了用于衰减环境光对光学传感器的影响并用于量化和补偿环境光的系统和方法。

公开(公告)号：US20080158840A1

公开(公告)日：2008-07-03

申请号：US11645502

申请日：2006-12-27

Applicant: Yen-Hao Chen ,  Chun-Yu Lai

Inventor： Yen-Hao Chen ,  Chun-Yu Lai

IPC: H05K1/16 ,  H05K1/00

CPC classification number: H05K1/0236 ,  H05K1/0231 ,  H05K1/165 ,  H05K2201/09663 ,  H05K2201/09681 ,  H05K2201/09972

Abstract: A DC power plane structure applied in multi-layer circuit board is provided. The DC power plane structure includes a first circuit area for receiving a DC power, a noise filter with one end electrically connected to a DC power output end of the first circuit area, and a second circuit area which is electrically isolated from the first circuit area. The second circuit area has a band gap structure, and the DC power input end of the band gap structure is electrically connected to the other end of the noise filter for inhibiting high-frequency noise generated between layers of the multi-layer circuit board.

Abstract translation: 提供了一种应用于多层电路板的直流电源平面结构。 直流电源平面结构包括用于接收直流电力的第一电路区域，一端电连接到第一电路区域的直流电力输出端的噪声滤波器，以及与第一电路区域电隔离的第二电路区域 。 第二电路区域具有带隙结构，带隙结构的直流电力输入端电连接到噪声滤波器的另一端，用于抑制在多层电路板的层之间产生的高频噪声。

公开(公告)号：US20070289771A1

公开(公告)日：2007-12-20

申请号：US11755045

申请日：2007-05-30

Applicant: HIDEKI OSAKA ,  YUTAKA UEMATSU ,  EIICHI SUZUKI

Inventor： HIDEKI OSAKA ,  YUTAKA UEMATSU ,  EIICHI SUZUKI

IPC: H05K1/00

CPC classification number: H05K1/0236 ,  H01L23/66 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0231 ,  H05K1/0237 ,  H05K1/141 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/09681 ,  H05K2201/09727 ,  H05K2201/09972 ,  H05K2201/10734 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention realizes high density mounting along with achieving power source sharing by a digital semiconductor element and an analog semiconductor element in a semiconductor device. An power layer for analog is connected to one end of an EBG layer, a power layer for digital is connected to the other end of the EBG layer, ground terminals for the respective elements are connected to a common ground layer, and a ground layer for separating the power layer for analog and the EBG layer from each other is disposed between the power layer for analog and the EBG layer. Thereby, high density mounting is achieved along with reducing interference of power source to an analog chip.

Abstract translation: 本发明通过数字半导体元件和半导体器件中的模拟半导体元件实现电源共享，实现了高密度安装。 用于模拟的功率层连接到EBG层的一端，用于数字的功率层连接到EBG层的另一端，各个元件的接地端子连接到公共接地层，接地层用于 将模拟功率层和EBG层彼此分离设置在用于模拟的功率层和EBG层之间。 因此，实现了高密度安装，同时降低了电源对模拟芯片的干扰。

公开(公告)号：US20070202246A1

公开(公告)日：2007-08-30

申请号：US11790665

申请日：2007-04-26

Applicant: Motoharu Nii

Inventor： Motoharu Nii

IPC: C25D5/02

CPC classification number: C25D21/12 ,  H05K3/0005 ,  H05K3/241 ,  H05K2201/09972

Abstract: The plating method comprises the steps of dividing a region, to be plated, into a group of mesh-like zones, measuring a plating area of each of the zones, comparing the measurement values of the plating areas and judging whether or not the plating area has any variance, and conducting a design change, on patterns contained in this zone, to eliminate the variance.

Abstract translation: 电镀方法包括以下步骤：将要被电镀的区域划分成一组网格区域，测量每个区域的电镀面积，比较电镀区域的测量值，并判断电镀区域 对该区域中包含的模式有任何差异，并进行设计更改，以消除差异。

公开(公告)号：US07259968B2

公开(公告)日：2007-08-21

申请号：US10437619

申请日：2003-05-14

Applicant: Mitchel E. Wright

Inventor： Mitchel E. Wright

IPC: H05K1/11 ,  H05K1/14

CPC classification number: H05K1/0253 ,  H05K1/0224 ,  H05K1/0298 ,  H05K2201/0715 ,  H05K2201/093 ,  H05K2201/0969 ,  H05K2201/09727 ,  H05K2201/09972

Abstract: A multi-layer circuit board includes a first layer having at least first and second conductive traces of different widths and the same impedance. One of a first power plane and first ground plane has a void region such that the first conductive trace is spaced apart from the first power plane by a first thickness, and the second conductive trace is spaced apart from the first ground plane by a second, different thickness.

Abstract translation: 多层电路板包括具有不同宽度和相同阻抗的至少第一和第二导电迹线的第一层。 第一电力平面和第一接地平面中的一个具有空隙区域，使得第一导电迹线与第一电力平面间隔第一厚度，并且第二导电迹线与第一接地平面间隔开第二导电迹线， 不同厚度。

公开(公告)号：US20070147017A1

公开(公告)日：2007-06-28

申请号：US10593374

申请日：2005-03-18

Applicant: Junhyoung Eom

Inventor： Junhyoung Eom

IPC: H05K7/04

CPC classification number: H05K1/141 ,  H05K1/0263 ,  H05K1/144 ,  H05K7/026 ,  H05K2201/09972

Abstract: Disclosed is an integrated electronic module structure for vehicles that is constructed as an integrated unit using one multi-pole connector for one wire harness. The integrated module structure includes a first printed circuit board (PCB) having fuses, relay circuits, etc., mounted thereon, a second PCB having input/output (I/O) terminals, and a PCB connecting unit for electrically connecting the first and second PCBs. The first and second PCBs are connected through the connector to form the integrated electronic module structure.

Abstract translation: 公开了一种用于车辆的集成电子模块结构，其被构造为使用一个线束的一个多极连接器作为集成单元。 集成模块结构包括安装在其上的具有保险丝，继电器电路等的第一印刷电路板（PCB），具有输入/输出（I / O）端子的第二PCB和用于电连接第一和/ 第二块PCB。 第一和第二PCB通过连接器连接以形成集成的电子模块结构。

公开(公告)号：US20070069325A1

公开(公告)日：2007-03-29

申请号：US11516005

申请日：2006-09-05

Applicant: Yasuhisa Yamanaka

Inventor： Yasuhisa Yamanaka

IPC: H01L29/00

CPC classification number: H05K1/0216 ,  H05K1/0218 ,  H05K2201/0723 ,  H05K2201/093 ,  H05K2201/09345 ,  H05K2201/09663 ,  H05K2201/09972

Abstract: Mounting components such as LSIs, which emit noise to the outside and are subjected to the influence of external noise, on the top-most layer and the bottom-most layer respectively, a co-existing layer of the ground region and the power source region has been employed, where a ground region has been provided respectively to the range corresponding to the position the LSIs on the next layer below the top-most layer and the next layer above the bottom-most layer. Accordingly, the number of layers to be laminated to form the multilayer substrate has been reduced, because it is no longer required, unlike the related art, to provide a ground layer where the ground pattern is formed substantially over the entire surface of layer respectively to the next layer below the top-most layer having mounted a LSI thereon and of the next layer above the bottom-most layer having mounting a LSI thereon.

Abstract translation: 分别在最上层和最底层上分别向外部发出噪声并受到外部噪声的影响的诸如LSI的安装部件，接地区域和电源区域的共存层 已经使用了地面区域分别设置在与最上层下面的下一层的LSI的位置相对应的范围和最底层以上的下一层的范围内。 因此，与现有技术不同，由于不再需要层叠以形成多层基板的层的数量，因此提供接地层，其基本上在层的整个表面上分别形成接地图案， 在其上安装有LSI的最上层的下一层和在其上安装有LSI的最底层之上的下一层。