公开(公告)号：US20100007005A1

公开(公告)日：2010-01-14

申请号：US12458217

申请日：2009-07-02

申请人： Tetsuya Akimoto ,  Akimori Hayashi

发明人： Tetsuya Akimoto ,  Akimori Hayashi

IPC分类号： H01L23/52 ,  H01L23/48

CPC分类号： H01L23/50 ,  H01L23/49827 ,  H01L23/66 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48237 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device suppresses a magnetic field caused by a current loop formed by a signal wiring and a return path wiring, to reduce transmission loss of a high-speed signal. The semiconductor device includes a signal current path connected from a signal pad to a first external terminal via a first bonding wire and an interposer, and a current return path connected from a second external terminal provided adjacent to the first external terminal to a second pad provided adjacent to the signal pad via the interposer essentially on the same plane. The signal current path and the current return path are positioned so that they intersect with each other, thereby reversing the direction of a loop through which the current flows, and as a result, magnetic fields caused by the current loop formed by the signal current path and the current return path cancel each other.

摘要翻译： 半导体器件抑制由由信号布线和返回路径布线形成的电流环引起的磁场，以减少高速信号的传输损耗。 半导体器件包括经由第一接合线和插入件从信号焊盘连接到第一外部端子的信号电流路径和从与第一外部端子相邻设置的第二外部端子连接到提供的第二焊盘的电流返回路径 通过内插器基本上在同一平面上与信号垫相邻。 信号电流路径和电流返回路径被定位成使得它们彼此相交，从而反转电流流过的环路的方向，结果是由信号电流路径形成的电流环路引起的磁场 并且当前的返回路径彼此抵消。

公开(公告)号：US20060044735A1

公开(公告)日：2006-03-02

申请号：US11213867

申请日：2005-08-30

申请人： Akimori Hayashi ,  Katsunobu Suzuki ,  Ryuichi Oikawa ,  Makoto Nakagoshi ,  Naoko Sera ,  Tadashi Murai ,  Chiho Ogihara ,  Ryohei Kataoka ,  Koji Kondo ,  Tomohiro Yokochi

发明人： Akimori Hayashi ,  Katsunobu Suzuki ,  Ryuichi Oikawa ,  Makoto Nakagoshi ,  Naoko Sera ,  Tadashi Murai ,  Chiho Ogihara ,  Ryohei Kataoka ,  Koji Kondo ,  Tomohiro Yokochi

IPC分类号： H05K1/00

CPC分类号： H05K3/4632 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0271 ,  H05K1/114 ,  H05K3/4617 ,  H05K2201/0129 ,  H05K2201/0394 ,  H05K2201/068 ,  H05K2201/09063 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/2009 ,  H05K2203/1178 ,  H01L2924/00 ,  H01L2224/0401

摘要： A plurality of film insulators having conductive patterns that are formed on surfaces and conductive vias that pass through the film insulators in the direction of thickness are stacked together and collectively subjected to pressure and heat to be formed as a single unit. On one outermost layer of the multilayer board that has been thus formed, a plurality of connection terminals are exposed to the outside, connection bumps of an LSI chip being secured to these connection terminals. On the outermost layer of the opposite side, a multiplicity of metal pads are provided, and a solder ball is secured on each metal pad to form a ball grid array (BGA) structure for connecting to a motherboard.

摘要翻译： 具有形成在表面上的导电图案的多个膜绝缘体和在厚度方向上穿过膜绝缘体的导电通孔堆叠在一起并且集体地经受压力和热量以形成为单个单元。 在如此形成的多层板的一个最外层上，多个连接端子暴露于外部，LSI芯片的连接凸块固定在这些连接端子上。 在相对侧的最外层，设置多个金属焊盘，并且在每个金属焊盘上固定焊球以形成用于连接到主板的球栅阵列（BGA）结构。

公开(公告)号：US20060068180A1

公开(公告)日：2006-03-30

申请号：US11232078

申请日：2005-09-22

申请人： Koji Kondo ,  Ryohei Kataoka ,  Tomohiro Yokochi ,  Makoto Nakagoshi ,  Tadashi Murai ,  Akimori Hayashi ,  Katsunobu Suzuki

发明人： Koji Kondo ,  Ryohei Kataoka ,  Tomohiro Yokochi ,  Makoto Nakagoshi ,  Tadashi Murai ,  Akimori Hayashi ,  Katsunobu Suzuki

IPC分类号： B32B3/00 ,  B32B37/00

CPC分类号： H05K3/4688 ,  H05K1/0269 ,  H05K1/0373 ,  H05K1/111 ,  H05K3/28 ,  H05K3/285 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/4632 ,  H05K2201/0112 ,  H05K2201/0129 ,  H05K2203/161 ,  Y10T428/24917

摘要： In a printed board having a land as an electrode, a colored thermoplastic resin film is arranged on a land forming surface of a thermoplastic resin member so as to set a difference in light reflectivity between the land and the colored thermoplastic resin film, to be greater than that between the land and the thermoplastic resin member. An opening portion is provided in the colored thermoplastic resin film so that at least a part of the land is exposed from the opening portion. Because the colored thermoplastic resin film is positioned on the circumference portion of the opening portion, the difference in light reflectivity of the land with respect to its circumference portion can be effectively increased. As a result, a recognition ratio of the land can be effectively improved.

摘要翻译： 在具有焊盘作为电极的印刷电路板中，在热塑性树脂部件的焊盘形成面上配置有色热塑性树脂膜，以将焊盘和着色热塑性树脂膜之间的光反射率设定为较大 比土地和热塑性树脂构件之间的距离大。 在有色热塑性树脂膜中设置有开口部，使得至少一部分接地部从开口部露出。 由于着色热塑性树脂膜位于开口部分的圆周部分上，因此可以有效地增加焊盘相对于其周边部分的光反射率差异。 因此，可以有效地提高土地的识别率。

公开(公告)号：US07378745B2

公开(公告)日：2008-05-27

申请号：US11213867

申请日：2005-08-30

申请人： Akimori Hayashi ,  Katsunobu Suzuki ,  Ryuichi Oikawa ,  Makoto Nakagoshi ,  Naoko Sera ,  Tadashi Murai ,  Chiho Ogihara ,  Ryohei Kataoka ,  Koji Kondo ,  Tomohiro Yokochi

发明人： Akimori Hayashi ,  Katsunobu Suzuki ,  Ryuichi Oikawa ,  Makoto Nakagoshi ,  Naoko Sera ,  Tadashi Murai ,  Chiho Ogihara ,  Ryohei Kataoka ,  Koji Kondo ,  Tomohiro Yokochi

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/053 ,  H01L23/12 ,  H01L23/29

CPC分类号： H05K3/4632 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0271 ,  H05K1/114 ,  H05K3/4617 ,  H05K2201/0129 ,  H05K2201/0394 ,  H05K2201/068 ,  H05K2201/09063 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/2009 ,  H05K2203/1178 ,  H01L2924/00 ,  H01L2224/0401

摘要： A plurality of film insulators having conductive patterns that are formed on surfaces and conductive vias that pass through the film insulators in the direction of thickness are stacked together and collectively subjected to pressure and heat to be formed as a single unit. On one outermost layer of the multilayer board that has been thus formed, a plurality of connection terminals are exposed to the outside, connection bumps of an LSI chip being secured to these connection terminals. On the outermost layer of the opposite side, a multiplicity of metal pads are provided, and a solder ball is secured on each metal pad to form a ball grid array (BGA) structure for connecting to a motherboard.

摘要翻译： 具有形成在表面上的导电图案的多个膜绝缘体和在厚度方向上穿过膜绝缘体的导电通孔堆叠在一起并且集体地经受压力和热量以形成为单个单元。 在如此形成的多层板的一个最外层上，多个连接端子暴露于外部，LSI芯片的连接凸块固定在这些连接端子上。 在相对侧的最外层，设置多个金属焊盘，并且在每个金属焊盘上固定焊球以形成用于连接到主板的球栅阵列（BGA）结构。

公开(公告)号：US20120261840A1

公开(公告)日：2012-10-18

申请号：US13531165

申请日：2012-06-22

申请人： Tetsuya Akimoto ,  Akimori Hayashi

发明人： Tetsuya Akimoto ,  Akimori Hayashi

IPC分类号： H01L23/48

CPC分类号： H01L23/50 ,  H01L23/49827 ,  H01L23/66 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48237 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device includes an interposer, a semiconductor chip mounted on the interposer, a first wiring pattern formed on the interposer, the first wiring pattern including a first contact coupled to a bonding wire from the semiconductor chip and a second contact coupled to an external terminal of the interposer, and a second wiring pattern formed adjacent to the first wiring pattern on the interposer, the second wiring pattern including a third contact coupled to another bonding wire from the semiconductor chip and a fourth contact coupled to another external terminal of the interposer. The first contact is closer to the semiconductor chip than the third contact.

摘要翻译： 半导体器件包括插入器，安装在插入件上的半导体芯片，形成在插入件上的第一布线图案，第一布线图案包括耦合到来自半导体芯片的接合线的第一接点和耦合到外部端子的第二接点 以及与所述插入件上的所述第一布线图形相邻的第二布线图案，所述第二布线图案包括与所述半导体芯片的另一个接合线耦合的第三接点，以及耦合到所述插入件的另一外部端子的第四接点。 第一触点比第三触点更靠近半导体芯片。

公开(公告)号：US07728444B2

公开(公告)日：2010-06-01

申请号：US12007352

申请日：2008-01-09

申请人： Akimori Hayashi

发明人： Akimori Hayashi

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H05K1/181 ,  H01L23/49838 ,  H01L23/66 ,  H01L25/18 ,  H01L2924/0002 ,  H05K2201/09227 ,  H05K2201/09254 ,  H05K2201/09627 ,  H05K2201/10159 ,  Y02P70/611 ,  H01L2924/00

摘要： A difference in delay of signal transmission due to the wiring within a board is minimized. A wiring board includes wiring for connecting terminals included in one of a plurality of semiconductor chips to terminals included in another one of the plurality of semiconductor chips, through branch points. Each of the plurality of semiconductor chips includes first and second terminals. Moreover, a first wiring up to the first terminals and a second wiring up to the second terminals are in a positional relationship of being shifted parallel to each other in a planar direction of the wiring board so as not to come into electrical contact with each other. In each of the first and second wirings, a wire is provided between a connection point for the terminal in a first one of the semiconductor chips and a position of a root, a complete binary tree structure in which all leaves are at the same depth from the root is formed, connection points for the terminals in the rest of the semiconductor chips are positioned at the respective leaves, and the paths of wires respectively corresponding to branches at the same depth in the tree structure include vias and the lengths of the paths of wires including the lengths of the vias are equal to each other.

摘要翻译： 由于板内布线引起的信号传输延迟差异最小化。 布线板包括通过分支点将包括在多个半导体芯片之一中的一个的端子连接到包括在多个半导体芯片中的另一个半导体芯片中的端子的布线。 多个半导体芯片中的每一个包括第一和第二端子。 此外，直到第一端子的第一布线和直到第二端子的第二布线处于沿着布线板的平面方向彼此平行移位以便不彼此电接触的位置关系 。 在第一和第二布线中的每一个中，在半导体芯片中的第一个半导体芯片中的端子的连接点和根部之间提供导线，完整的二叉树结构，其中所有的叶子与 形成根部，其余半导体芯片中的端子的连接点位于相应的叶片处，并且分别对应于树结构中相同深度处的分支的线路的路径包括通孔和路径的长度 包括通孔长度的导线彼此相等。

公开(公告)号：US20080164622A1

公开(公告)日：2008-07-10

申请号：US12007352

申请日：2008-01-09

申请人： Akimori Hayashi

发明人： Akimori Hayashi

IPC分类号： H01L23/485

CPC分类号： H05K1/181 ,  H01L23/49838 ,  H01L23/66 ,  H01L25/18 ,  H01L2924/0002 ,  H05K2201/09227 ,  H05K2201/09254 ,  H05K2201/09627 ,  H05K2201/10159 ,  Y02P70/611 ,  H01L2924/00

摘要： A difference in delay of signal transmission due to the wiring within a board is minimized. A wiring board includes wiring for connecting terminals included in one of a plurality of semiconductor chips to terminals included in another one of the plurality of semiconductor chips, through branch points. Each of the plurality of semiconductor chips includes first and second terminals. Moreover, a first wiring up to the first terminals and a second wiring up to the second terminals are in a positional relationship of being shifted parallel to each other in a planar direction of the wiring board so as not to come into electrical contact with each other. In each of the first and second wirings, a wire is provided between a connection point for the terminal in a first one of the semiconductor chips and a position of a root, a complete binary tree structure in which all leaves are at the same depth from the root is formed, connection points for the terminals in the rest of the semiconductor chips are positioned at the respective leaves, and the paths of wires respectively corresponding to branches at the same depth in the tree structure include vias and the lengths of the paths of wires including the lengths of the vias are equal to each other.

摘要翻译： 由于板内布线引起的信号传输延迟差异最小化。 布线板包括通过分支点将包括在多个半导体芯片之一中的一个的端子连接到包括在多个半导体芯片中的另一个半导体芯片中的端子的布线。 多个半导体芯片中的每一个包括第一和第二端子。 此外，直到第一端子的第一布线和直到第二端子的第二布线处于沿着布线板的平面方向彼此平行移位以便不彼此电接触的位置关系 。 在第一和第二布线中的每一个中，在半导体芯片中的第一个半导体芯片中的端子的连接点和根部之间提供导线，完整的二叉树结构，其中所有的叶子与 形成根部，其余半导体芯片中的端子的连接点位于相应的叶片处，并且分别对应于树结构中相同深度处的分支的导线的路径包括通孔和路径的长度 包括通孔长度的导线彼此相等。

公开(公告)号：US07323238B2

公开(公告)日：2008-01-29

申请号：US11232078

申请日：2005-09-22

申请人： Koji Kondo ,  Ryohei Kataoka ,  Tomohiro Yokochi ,  Makoto Nakagoshi ,  Tadashi Murai ,  Akimori Hayashi ,  Katsunobu Suzuki

发明人： Koji Kondo ,  Ryohei Kataoka ,  Tomohiro Yokochi ,  Makoto Nakagoshi ,  Tadashi Murai ,  Akimori Hayashi ,  Katsunobu Suzuki

IPC分类号： B32B3/00

CPC分类号： H05K3/4688 ,  H05K1/0269 ,  H05K1/0373 ,  H05K1/111 ,  H05K3/28 ,  H05K3/285 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/4632 ,  H05K2201/0112 ,  H05K2201/0129 ,  H05K2203/161 ,  Y10T428/24917

摘要： In a printed board having a land as an electrode, a colored thermoplastic resin film is arranged on a land forming surface of a thermoplastic resin member so as to set a difference in light reflectivity between the land and the colored thermoplastic resin film, to be greater than that between the land and the thermoplastic resin member. An opening portion is provided in the colored thermoplastic resin film so that at least a part of the land is exposed from the opening portion. Because the colored thermoplastic resin film is positioned on the circumference portion of the opening portion, the difference in light reflectivity of the land with respect to its circumference portion can be effectively increased. As a result, a recognition ratio of the land can be effectively improved.

摘要翻译： 在具有焊盘作为电极的印刷电路板中，在热塑性树脂部件的焊盘形成面上配置有色热塑性树脂膜，以将焊盘和着色热塑性树脂膜之间的光反射率设定为较大 比土地和热塑性树脂构件之间的距离大。 在有色热塑性树脂膜中设置有开口部，使得至少一部分接地部从开口部露出。 由于着色热塑性树脂膜位于开口部分的圆周部分上，因此可以有效地增加焊盘相对于其周边部分的光反射率差异。 因此，可以有效地提高土地的识别率。