公开(公告)号：US20090161728A1

公开(公告)日：2009-06-25

申请号：US11963897

申请日：2007-12-24

Applicant: Irfan NASIR ,  Kenneth CORNETT ,  Liliana GRAJALES ,  Lih-Tyng HWANG ,  Andreas SCHALLER ,  Aroon TUNGARE

Inventor： Irfan NASIR ,  Kenneth CORNETT ,  Liliana GRAJALES ,  Lih-Tyng HWANG ,  Andreas SCHALLER ,  Aroon TUNGARE

IPC: H04B1/00 ,  H04B7/00 ,  H04L27/28

CPC classification number: H04B1/005 ,  H04L27/2602 ,  H04W88/06

Abstract: A method, apparatus, and electronic device for regulating communication are disclosed. A first radio 304 may execute a coordination communication operation using a coordination protocol. A coordinator layer 230 may determine an optimum protocol for a communication operation based on the coordination communication operation. A second radio 302 may use the optimum protocol.

Abstract translation: 公开了一种用于调节通信的方法，装置和电子设备。 第一无线电304可以使用协调协议执行协调通信操作。 协调器层230可以基于协调通信操作来确定用于通信操作的最佳协议。 第二无线电302可以使用最佳协议。

公开(公告)号：US06891190B2

公开(公告)日：2005-05-10

申请号：US10154013

申请日：2002-05-23

Applicant: Ke Keryn Lian ,  Robert T. Croswell ,  Aroon Tungare ,  Manes Eliacin

Inventor： Ke Keryn Lian ,  Robert T. Croswell ,  Aroon Tungare ,  Manes Eliacin

IPC: H01L21/316 ,  H01L25/04 ,  H01L27/28 ,  H01L51/05 ,  H05K1/18 ,  H01L29/76

CPC classification number: H01L51/0537 ,  H01L21/31691 ,  H01L25/046 ,  H01L27/28 ,  H01L51/0512 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/185 ,  H01L2924/00

Abstract: An organic semiconductor device (11) can be embedded within a printed wiring board (10). In various embodiments, the embedded device (11) can be accompanied by other organic semiconductor devices (31) and/or passive electrical components (26). When so embedded, conductive vias (41, 42, 43) can be used to facilitate electrical connection to the embedded device. In various embodiments, specific categories of materials and/or processing steps are used to facilitate the making of organic semiconductors and/or passive electrical components, embedded or otherwise.

Abstract translation: 有机半导体器件（11）可以嵌入印刷线路板（10）内。 在各种实施例中，嵌入式设备（11）可以伴随有其他有机半导体器件（31）和/或无源电子部件（26）。 当嵌入时，可以使用导电通孔（41,42,43）来促进与嵌入式装置的电连接。 在各种实施例中，使用特定类别的材料和/或处理步骤来促进有机半导体和/或嵌入式或其它方式的无源电组件的制造。

公开(公告)号：US07463113B2

公开(公告)日：2008-12-09

申请号：US11276429

申请日：2006-02-28

Applicant: Aroon Tungare ,  Manes Eliacin ,  Lih-Tyng Hwang ,  Robert Lempkowski ,  Junhua Liu ,  Jovica Savic

Inventor： Aroon Tungare ,  Manes Eliacin ,  Lih-Tyng Hwang ,  Robert Lempkowski ,  Junhua Liu ,  Jovica Savic

IPC: H01P1/10

CPC classification number: H01G5/16 ,  H01G5/011 ,  H01H59/0009

Abstract: A first and second capacitor plate are provided (101 and 102). Each capacitor plate has an opening disposed therethrough with the second capacitor plate being disposed substantially opposite the first capacitor plate. A first electrically conductive path interface is then disposed (103) in one of these openings as is at least a second electrically conductive path interface (104).

Abstract translation: 提供第一和第二电容器板（101和102）。 每个电容器板具有穿过其中的开口，其中第二电容器板与第一电容器板大致相对设置。 然后，至少第二导电路径接口（104）将第一导电路径界面（103）设置在这些开口之一中。

公开(公告)号：US20070135189A1

公开(公告)日：2007-06-14

申请号：US11301426

申请日：2005-12-13

Applicant: Huinan Yu ,  Roger Ady ,  Jason Jordan ,  Aroon Tungare

Inventor： Huinan Yu ,  Roger Ady ,  Jason Jordan ,  Aroon Tungare

IPC: H04B13/00

CPC classification number: H04B13/00 ,  H04M1/0245 ,  H04M1/7253

Abstract: An electronic device (100) having at least a first portion (102) and a second portion (104) is disclosed. The first portion is joined to the second portion by a mechanical connection. The electronic device (100) includes a first communication unit (106) present on the first portion (102), and a second communication unit (108) present on the second portion (104). The first communication unit (106) and the second communication unit (108) provide a first link for internal data communication between the first portion (102) and the second portion (104), when communicatively engaged with each other. Further, at least one of the first communication unit (106) and the second communication unit (108) provide a second link for external data communication with an external device when the first communication unit (106) and the second communication unit (108) are not communicatively engaged with each other.

Abstract translation: 公开了一种具有至少第一部分（102）和第二部分（104）的电子设备（100）。 第一部分通过机械连接连接到第二部分。 电子设备（100）包括存在于第一部分（102）上的第一通信单元（106）和存在于第二部分（104）上的第二通信单元（108）。 当通信地彼此接合时，第一通信单元（106）和第二通信单元（108）提供用于第一部分（102）和第二部分（104）之间的内部数据通信的第一链路。 此外，当第一通信单元（106）和第二通信单元（108）为...时，第一通信单元（106）和第二通信单元（108）中的至少一个提供用于与外部设备的外部数据通信的第二链路 不相互交流。

公开(公告)号：US20050128720A1

公开(公告)日：2005-06-16

申请号：US10736327

申请日：2003-12-15

Applicant: Robert Croswell ,  Gregory Dunn ,  Robert Lempkowski ,  Aroon Tungare ,  Jovica Savic

Inventor： Robert Croswell ,  Gregory Dunn ,  Robert Lempkowski ,  Aroon Tungare ,  Jovica Savic

IPC: H01G20060101 ,  H05K1/16 ,  H05K3/00 ,  H05K3/02 ,  H05K3/42 ,  H05K3/46 ,  H05K7/06

CPC classification number: H05K1/162 ,  H05K3/0029 ,  H05K3/025 ,  H05K3/384 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09718

Abstract: One of a plurality of capacitors embedded in a printed circuit structure includes a first electrode (415) overlaying a first substrate layer (505) of the printed circuit structure, a crystallized dielectric oxide core (405) overlaying the first electrode, a second electrode (615) overlying the crystallized dielectric oxide core, and a high temperature anti-oxidant layer (220) disposed between and contacting the crystallized dielectric oxide core and at least one of the first and second electrodes. The crystallized dielectric oxide core has a thickness that is less than 1 micron and has a capacitance density greater than 1000 pF/mm2. The material and thickness are the same for each of the plurality of capacitors. The crystallized dielectric oxide core may be isolated from crystallized dielectric oxide cores of all other capacitors of the plurality of capacitors.

Abstract translation: 嵌入印刷电路结构中的多个电容器之一包括覆盖印刷电路结构的第一衬底层（505）的第一电极（415），覆盖第一电极的结晶化电介质氧化物芯（405），第二电极 615），以及设置在结晶的电介质氧化物芯和第一和第二电极中的至少一个之间并与其接触的高温抗氧化剂层（220）。 结晶的电介质氧化物芯的厚度小于1微米，电容密度大于1000pF / mm 2。 多个电容器的材料和厚度相同。 结晶的电介质氧化物芯可以与多个电容器的所有其它电容器的结晶的电介质氧化物芯隔离。

公开(公告)号：US20140035830A1

公开(公告)日：2014-02-06

申请号：US13563040

申请日：2012-07-31

Applicant: Yi Wei ,  Amit Pai ,  Aroon Tungare ,  Ron Zancola

Inventor： Yi Wei ,  Amit Pai ,  Aroon Tungare ,  Ron Zancola

IPC: G06F3/041 ,  G09G5/02

CPC classification number: G06F3/0414 ,  G06F3/045 ,  G06F2203/04104

Abstract: A device and method eliminates a shadowing effect on a touch input receiving device. The method includes receiving a touch input on a top layer that includes first conducting lines, a first current passing through the first conducting lines. The method includes determining a location of the touch input as a function of the first current passing through an intermediate layer as a second current to second conducting lines orthogonal to the first conducting lines of a bottom layer. The intermediate layer disposed between the top and bottom sides is configured as a resistive layer applying a resistance value to the first current upon the touch input being received. The first current continues through the first conducting lines along a remainder thereof as a third current after passing through the intermediate layer to eliminate the shadowing effect.

Abstract translation: 一种设备和方法消除了对触摸输入接收设备的阴影效果。 该方法包括在包括第一导线的顶层上接收触摸输入，通过第一导线的第一电流。 该方法包括将触摸输入的位置确定为通过作为第二电流的中间层的第一电流的函数的位置与到底层的第一导电线正交的第二导线。 设置在顶侧和底侧之间的中间层被配置为在接收到触摸输入时对第一电流施加电阻值的电阻层。 第一电流沿其余部分继续穿过第一导线，作为通过中间层之后的第三电流以消除阴影效应。

公开(公告)号：US20060207970A1

公开(公告)日：2006-09-21

申请号：US11084938

申请日：2005-03-21

Applicant: Gregory Dunn ,  Robert Croswell ,  Jaroslaw Magera ,  Jovica Savic ,  Aroon Tungare

Inventor： Gregory Dunn ,  Robert Croswell ,  Jaroslaw Magera ,  Jovica Savic ,  Aroon Tungare

IPC: B44C1/22 ,  C23F1/00

CPC classification number: C23F1/40 ,  C23F1/02 ,  C23F1/32 ,  C23F1/34 ,  H05K1/162 ,  H05K3/0044 ,  H05K3/025 ,  H05K3/06 ,  H05K3/429 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2203/025 ,  H05K2203/0746

Abstract: A method is disclosed for fabricating a patterned embedded capacitance layer. The method includes fabricating (1305, 1310) a ceramic oxide layer (510) overlying a conductive metal layer (515) overlying a printed circuit substrate (505), perforating (1320) the ceramic oxide layer within a region (705), and removing (1325) the ceramic oxide layer and the conductive metal layer in the region by chemical etching of the conductive metal layer. The ceramic oxide layer may be less than 1 micron thick.

Abstract translation: 公开了一种用于制造图案化的嵌入式电容层的方法。 该方法包括制造覆盖在印刷电路衬底（505）上的导电金属层（515）上的陶瓷氧化物层（510），在区域（705）内穿孔（1320）陶瓷氧化物层，以及去除 （1325）通过化学蚀刻导电金属层的区域中的陶瓷氧化物层和导电金属层。 陶瓷氧化物层可以小于1微米厚。

公开(公告)号：US20080013251A1

公开(公告)日：2008-01-17

申请号：US11276429

申请日：2006-02-28

Applicant: Aroon Tungare ,  Manes Eliacin ,  Lih-Tyng Hwang ,  Robert Lempkowski ,  Junhua Liu ,  Jovica Savic

Inventor： Aroon Tungare ,  Manes Eliacin ,  Lih-Tyng Hwang ,  Robert Lempkowski ,  Junhua Liu ,  Jovica Savic

IPC: H01G4/06

CPC classification number: H01G5/16 ,  H01G5/011 ,  H01H59/0009

Abstract: A first and second capacitor plate are provided (101 and 102). Each capacitor plate has an opening disposed therethrough with the second capacitor plate being disposed substantially opposite the first capacitor plate. A first electrically conductive path interface is then disposed (103) in one of these openings as is at least a second electrically conductive path interface (104).

Abstract translation: 提供第一和第二电容器板（101和102）。 每个电容器板具有穿过其中的开口，其中第二电容器板与第一电容器板大致相对设置。 然后，至少第二导电路径接口（104）将第一导电路径界面（103）设置在这些开口之一中。

公开(公告)号：US06992321B2

公开(公告)日：2006-01-31

申请号：US09903784

申请日：2001-07-13

Applicant: Aroon Tungare ,  Tomasz L. Klosowiak

Inventor： Aroon Tungare ,  Tomasz L. Klosowiak

IPC: H01L21/00

CPC classification number: C30B25/02 ,  C30B25/18 ,  C30B29/40 ,  C30B29/403 ,  C30B29/406 ,  C30B29/48 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L41/0815 ,  H01L41/319

Abstract: High quality epitaxial layers of piezoelectric monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the piezoelectric monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying piezoelectric monocrystalline material layer.

公开(公告)号：US20050134141A1

公开(公告)日：2005-06-23

申请号：US11004354

申请日：2004-12-03

Applicant: Jovica Savic ,  Manes Eliacin ,  Junhua Liu ,  Aroon Tungare

Inventor： Jovica Savic ,  Manes Eliacin ,  Junhua Liu ,  Aroon Tungare

IPC: G02B26/08 ,  G02B26/10 ,  H01H57/00 ,  H02N1/00

CPC classification number: H02N1/006 ,  G02B26/0841

Abstract: A meso-electromechanical system (900, 1100) includes a substrate (215), a standoff (405, 1160) disposed on a surface of the substrate, a first electrostatic pattern (205, 1105, 1110, 1115, 1120) disposed on the surface of the substrate, and a glass beam (810). The glass beam (810) has a fixed region (820) attached to the standoff and has a second electrostatic pattern (815, 1205, 1210, 1215, 1220) on a cantilevered location of the glass beam. The second electrostatic pattern is substantially co-extensive with and parallel to the first electrostatic pattern. The second electrostatic pattern has a relaxed separation (925) from the first electrostatic pattern when the first and second electrostatic patterns are in a non-energized state. In some embodiments, a mirror is formed by the electrostatic materials that form the second electrostatic pattern. The glass beam may be patterned using sandblasting (140).

Abstract translation: 中间机电系统（900,1100）包括衬底（215），设置在衬底的表面上的支座（405,1160），设置在衬底上的第一静电图案（205,1105,1110,1115,1120） 基板的表面和玻璃光束（810）。 玻璃束（810）具有附接到支座的固定区域（820），并且在玻璃束的悬臂位置上具有第二静电图案（815,1205,1212,1215,1220）。 第二静电图案与第一静电图案基本上共同并且平行。 当第一静电图案和第二静电图案处于非通电状态时，第二静电图案具有与第一静电图案的松弛分离（925）。 在一些实施例中，由形成第二静电图案的静电材料形成反射镜。 可以使用喷砂将玻璃束图案化（140）。