公开(公告)号：US20130214419A1

公开(公告)日：2013-08-22

申请号：US13398059

申请日：2012-02-16

Applicant: Cheng-Hung Shih ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Yung-Wei Hsieh ,  Ming-Yi Liu

Inventor： Cheng-Hung Shih ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Yung-Wei Hsieh ,  Ming-Yi Liu

IPC: H01L23/48 ,  H01L21/56 ,  H01L21/60

CPC classification number: H01L24/13 ,  H01L21/563 ,  H01L23/293 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83104 ,  H01L2224/8392 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/00014 ,  H01L2924/01079

Abstract: A semiconductor packaging method includes providing a substrate having a plurality of connection pads; mounting a chip on the substrate, wherein the chip comprises a plurality of copper-containing bumps directly coupled to the connection pads, and each of the copper-containing bumps comprises a ring surface; forming an anti-dissociation gel between the substrate and the chip, wherein the anti-dissociation gel comprises a plurality of anti-dissociation substances, and the ring surfaces of the copper-containing bumps are covered by the anti-dissociation substances.

Abstract translation: 半导体封装方法包括提供具有多个连接焊盘的衬底; 将芯片安装在所述基板上，其中所述芯片包括直接耦合到所述连接焊盘的多个含铜凸块，并且所述含铜凸块包括环表面; 在所述基板和所述芯片之间形成抗分解凝胶，其中所述抗分解凝胶包含多个抗分解物质，并且所述含铜凸起的环表面被所述抗分解物质覆盖。

公开(公告)号：US08497579B1

公开(公告)日：2013-07-30

申请号：US13398081

申请日：2012-02-16

Applicant: Cheng-Hung Shih ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Yung-Wei Hsieh ,  Bo-Shiun Jiang

Inventor： Cheng-Hung Shih ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Yung-Wei Hsieh ,  Bo-Shiun Jiang

IPC: H01L23/48

CPC classification number: H01L21/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29393 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81903 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: A semiconductor packaging method includes providing a substrate having a plurality of pads, each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas; forming a conductible gel with anti-dissociation function on the substrate, said conductible gel includes a plurality of conductive particles and a plurality of anti-dissociation substances; mounting a chip on the substrate, said chip comprises a plurality of copper-containing bumps, each of the copper-containing bumps comprises a ring surface and a second coupling surface having a plurality of second conductive contact areas and a plurality of second non-conductive contact areas, wherein the conductive particles are electrically connected with the first conductive contact areas and the second conductive contact areas, said anti-dissociation substances are in contact with the second non-conductive contact area, and the ring surfaces are covered with the anti-dissociation substances.

Abstract translation: 半导体封装方法包括提供具有多个焊盘的衬底，每个焊盘包括具有多个第一导电接触区域和多个第一非导电接触区域的第一耦合表面; 在基板上形成具有抗解离功能的导电凝胶，所述可导电凝胶包括多个导电颗粒和多个抗分解物质; 将芯片安装在基板上，所述芯片包括多个含铜凸块，每个含铜凸块包括环表面和具有多个第二导电接触区域和多个第二非导电性接触区域的第二耦合表面 接触区域，其中所述导电颗粒与所述第一导电接触区域和所述第二导电接触区域电连接，所述抗分解物质与所述第二非导电接触区域接触，并且所述环形表面被所述反 - 解离物质

公开(公告)号：US20130249081A1

公开(公告)日：2013-09-26

申请号：US13426857

申请日：2012-03-22

Applicant: Cheng-Hung Shih ,  Yung-Wei Hsieh ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Hua-An Dai

Inventor： Cheng-Hung Shih ,  Yung-Wei Hsieh ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Hua-An Dai

IPC: H01L23/485 ,  H01L21/768

CPC classification number: H01L23/58 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/034 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05099 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/11906 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05599 ,  H01L2224/05552

Abstract: A method for manufacturing fine-pitch bumps comprises providing a silicon substrate; forming a titanium-containing metal layer having a plurality of first zones and a plurality of second zones on the silicon substrate; forming a photoresist layer on the titanium-containing metal layer; patterning the photoresist layer; forming a plurality of copper bumps having a plurality of first top surfaces and a plurality of first ring surfaces; heating the photoresist layer to form a plurality of body portions and removable portions; etching the photoresist layer; forming a plurality of bump protection layers on the titanium-containing metal layer, the first top surface and the first ring surface, each of the bump protection layers comprises a bump coverage portion; plating a plurality of gold layers at the bump coverage portion; eventually, removing the second zones to enable each of the first zones to form an under bump metallurgy layer.

Abstract translation: 制造细间距凸块的方法包括提供硅衬底; 在硅衬底上形成具有多个第一区和多个第二区的含钛金属层; 在含钛金属层上形成光致抗蚀剂层; 图案化光致抗蚀剂层; 形成具有多个第一顶表面和多个第一环表面的多个铜凸块; 加热光致抗蚀剂层以形成多个主体部分和可移除部分; 蚀刻光致抗蚀剂层; 在所述含钛金属层，所述第一顶表面和所述第一环表面上形成多个凸块保护层，所述凸块保护层中的每一个包括凸起覆盖部分; 在凸点覆盖部分处镀覆多个金层; 最终，移除第二区域以使得每个第一区域形成凸起下的冶金层。

公开(公告)号：US08530344B1

公开(公告)日：2013-09-10

申请号：US13426857

申请日：2012-03-22

Applicant: Cheng-Hung Shih ,  Yung-Wei Hsieh ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Hua-An Dai

Inventor： Cheng-Hung Shih ,  Yung-Wei Hsieh ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Hua-An Dai

IPC: H01L21/44

CPC classification number: H01L23/58 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/034 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05099 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/11906 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05599 ,  H01L2224/05552

Abstract: A method for manufacturing fine-pitch bumps comprises providing a silicon substrate; forming a titanium-containing metal layer having a plurality of first zones and a plurality of second zones on the silicon substrate; forming a photoresist layer on the titanium-containing metal layer; patterning the photoresist layer; forming a plurality of copper bumps having a plurality of first top surfaces and a plurality of first ring surfaces; heating the photoresist layer to form a plurality of body portions and removable portions; etching the photoresist layer; forming a plurality of bump protection layers on the titanium-containing metal layer, the first top surface and the first ring surface, each of the bump protection layers comprises a bump coverage portion; plating a plurality of gold layers at the bump coverage portion; eventually, removing the second zones to enable each of the first zones to form an under bump metallurgy layer.

Abstract translation: 制造细间距凸块的方法包括提供硅衬底; 在硅衬底上形成具有多个第一区和多个第二区的含钛金属层; 在含钛金属层上形成光致抗蚀剂层; 图案化光致抗蚀剂层; 形成具有多个第一顶表面和多个第一环表面的多个铜凸块; 加热光致抗蚀剂层以形成多个主体部分和可移除部分; 蚀刻光致抗蚀剂层; 在所述含钛金属层，所述第一顶表面和所述第一环表面上形成多个凸块保护层，所述凸块保护层中的每一个包括凸起覆盖部分; 在凸点覆盖部分处镀覆多个金层; 最终，移除第二区域以使得每个第一区域形成凸起下的冶金层。

公开(公告)号：US08501614B1

公开(公告)日：2013-08-06

申请号：US13426810

申请日：2012-03-22

Applicant: Cheng-Hung Shih ,  Yung-Wei Hsieh ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Hua-An Dai

Inventor： Cheng-Hung Shih ,  Yung-Wei Hsieh ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Hua-An Dai

IPC: H01L21/44

CPC classification number: H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/034 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05571 ,  H01L2224/05666 ,  H01L2224/11472 ,  H01L2224/11906 ,  H01L2224/13007 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2224/05552

Abstract: A method for manufacturing fine-pitch bumps comprises the steps of providing a silicon substrate; forming a titanium-containing metal layer on the silicon substrate, wherein the titanium-containing metal layer comprises a plurality of first zones and a plurality of second zones; forming a photoresist layer on the titanium-containing metal layer; patterning the photoresist layer to form a plurality of opening slots; forming a plurality of copper bumps at the opening slots, wherein each of the copper bumps comprises a first top surface and a ring surface; heating the photoresist layer to form a plurality of body portions and a plurality of removable portions; etching the photoresist layer; and removing the second zones to enable each of the first zones to form an under bump metallurgy layer having a bearing portion and an extending portion.

Abstract translation: 制造细间距凸块的方法包括以下步骤：提供硅衬底; 在所述硅衬底上形成含钛金属层，其中所述含钛金属层包括多个第一区和多个第二区; 在含钛金属层上形成光致抗蚀剂层; 图案化光致抗蚀剂层以形成多个开口槽; 在开口槽处形成多个铜凸块，其中每个铜凸块包括第一顶表面和环表面; 加热光致抗蚀剂层以形成多个主体部分和多个可移除部分; 蚀刻光致抗蚀剂层; 以及移除所述第二区域以使得所述第一区域中的每一个能够形成具有轴承部分和延伸部分的凸起下金属层。

公开(公告)号：US20130183823A1

公开(公告)日：2013-07-18

申请号：US13352537

申请日：2012-01-18

Applicant: Chih-Ming Kuo ,  Hua-An Dai ,  Cheng-Fan Lin ,  Yie-Chuan Chiu ,  Yung-Wei Hsieh

Inventor： Chih-Ming Kuo ,  Hua-An Dai ,  Cheng-Fan Lin ,  Yie-Chuan Chiu ,  Yung-Wei Hsieh

IPC: H01L21/60

CPC classification number: H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/034 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11472 ,  H01L2224/11906 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2224/05552

Abstract: A bumping process includes providing a silicon substrate, forming a titanium-containing metal layer on the silicon substrate, wherein the titanium-containing metal layer comprises a plurality of first areas and a plurality of second areas, forming a photoresist layer on the titanium-containing metal layer, patterning the photoresist layer to form a plurality of opening slots corresponded to the first areas of the titanium-containing metal layer, forming a plurality of copper bumps at the opening slots, proceeding a heat procedure, forming a plurality of bump isolation layers on the copper bumps, forming a plurality of connective layers on the bump isolation layers, removing the photoresist layer, removing the second areas and enabling each the first areas to form an under bump metallurgy layer.

Abstract translation: 凸起工艺包括提供硅衬底，在硅衬底上形成含钛金属层，其中含钛金属层包括多个第一区域和多个第二区域，在含钛金属层上形成光致抗蚀剂层 金属层，图案化光致抗蚀剂层以形成对应于含钛金属层的第一区域的多个开口槽，在开口槽处形成多个铜凸块，进行热程序，形成多个凸块隔离层 在铜凸块上，在凸块隔离层上形成多个连接层，去除光致抗蚀剂层，去除第二区域，并且使得每个第一区域能够形成凸起下的冶金层。

公开(公告)号：US07564183B2

公开(公告)日：2009-07-21

申请号：US11443051

申请日：2006-05-31

Applicant: Tzeng-Cherng Luo ,  Cheng-Fan Lin ,  Meng-Chieh Liao ,  Chi-Chung Chen ,  Kang Chen

Inventor： Tzeng-Cherng Luo ,  Cheng-Fan Lin ,  Meng-Chieh Liao ,  Chi-Chung Chen ,  Kang Chen

IPC: H01J1/62 ,  H01J63/04

CPC classification number: H01L27/3288 ,  H01L27/3223

Abstract: An organic electroluminescent display panel, which comprises a substrate, at least one display structure area, at least one first dummy area, and at least one second dummy area. The display structure area comprises at least one encapsulation area, at least one pixel area, a first conducting area, a second conducting area, a wiring area, a first connecting area, and a second connecting area. The wiring area and the first dummy area connect the first connecting area, and the two conducting areas and the second dummy area connect the second connecting area. Besides, the first and the second connecting areas overlap a selected part of the encapsulation area of a neighboring display structure area. Accordingly, the number and capacity of display structure areas on the organic electroluminescent display panel are increased to obtain a uniform brightness during a lighting test.

Abstract translation: 一种有机电致发光显示面板，其包括基板，至少一个显示结构区域，至少一个第一虚拟区域和至少一个第二虚拟区域。 显示结构区域包括至少一个封装区域，至少一个像素区域，第一导电区域，第二导电区域，布线区域，第一连接区域和第二连接区域。 布线区域和第一虚拟区域连接第一连接区域，并且两个导电区域和第二虚拟区域连接第二连接区域。 此外，第一和第二连接区域与相邻显示结构区域的封装区域的选定部分重叠。 因此，增加有机电致发光显示面板上的显示结构区域的数量和容量，以在点亮测试期间获得均匀的亮度。

公开(公告)号：US20090091241A1

公开(公告)日：2009-04-09

申请号：US11862134

申请日：2007-09-26

Applicant: Chung Che Tsou ,  Cheng Fan Lin ,  Tzeng Cheng Luo ,  Shin Ju Lin ,  Tzung Zone Li ,  Hai Tang

Inventor： Chung Che Tsou ,  Cheng Fan Lin ,  Tzeng Cheng Luo ,  Shin Ju Lin ,  Tzung Zone Li ,  Hai Tang

IPC: H01J1/62 ,  H01J9/20

CPC classification number: H01L27/322 ,  H01L27/3211 ,  H01L51/5284

Abstract: A full-color OLED display panel comprises a full-color organic light-emitting device and a colored filter device stacked on the light-exit surface of the full-color organic light-emitting device. The full-color organic light-emitting device comprises a first electrode, a plurality of second electrodes, a first light-emitting layer sandwiched between the first electrode and a portion of the second electrodes, and a second light-emitting layer sandwiched between the first electrode and portions of the second electrodes and the first light-emitting layer. The colored filter device comprises a substrate, and a plurality of first color filter portions, a plurality of second color filter portions and a plurality of third color filter portions disposed on the surface of the substrate. The first color filter portions allow a first color light emitted from the first light-emitting layer to pass through, and the second color filter portions and the third color filter portions each allow rays with different wavelengths in a second color light emitted from the second light-emitting layer to pass through.

Abstract translation: 全色OLED显示面板包括全色有机发光装置和堆叠在全色有机发光装置的光出射面上的彩色滤光片装置。 全色有机发光装置包括第一电极，多个第二电极，夹在第一电极和第二电极的一部分之间的第一发光层和夹在第一电极之间的第二发光层 电极以及第二电极和第一发光层的部分。 彩色滤光片装置包括基板和多个第一滤色器部分，多个第二滤色器部分和设置在基板表面上的多个第三滤色器部分。 第一滤色器部分允许从第一发光层发射的第一颜色光通过，并且第二滤色器部分和第三滤色器部分允许在从第二光发射的第二颜色光中具有不同波长的光线 发送层通过。

公开(公告)号：US20130214407A1

公开(公告)日：2013-08-22

申请号：US13398081

申请日：2012-02-16

Applicant: Cheng-Hung Shih ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Yung-Wei Hsieh ,  Bo-Shiun Jiang

Inventor： Cheng-Hung Shih ,  Shu-Chen Lin ,  Cheng-Fan Lin ,  Yung-Wei Hsieh ,  Bo-Shiun Jiang

IPC: H01L23/488 ,  H01L21/60

CPC classification number: H01L21/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29393 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81903 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: A semiconductor packaging method includes providing a substrate having a plurality of pads, each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas; forming a conductible gel with anti-dissociation function on the substrate, said conductible gel includes a plurality of conductive particles and a plurality of anti-dissociation substances; mounting a chip on the substrate, said chip comprises a plurality of copper-containing bumps, each of the copper-containing bumps comprises a ring surface and a second coupling surface having a plurality of second conductive contact areas and a plurality of second non-conductive contact areas, wherein the conductive particles are electrically connected with the first conductive contact areas and the second conductive contact areas, said anti-dissociation substances are in contact with the second non-conductive contact area, and the ring surfaces are covered with the anti-dissociation substances.

公开(公告)号：US20060273711A1

公开(公告)日：2006-12-07

申请号：US11443051

申请日：2006-05-31

Applicant: Tzeng-Cherng Luo ,  Cheng-Fan Lin ,  Meng-Chieh Liao ,  Chi-Chung Chen ,  Kang Chen

Inventor： Tzeng-Cherng Luo ,  Cheng-Fan Lin ,  Meng-Chieh Liao ,  Chi-Chung Chen ,  Kang Chen

IPC: H05B33/08 ,  H05B33/12

CPC classification number: H01L27/3288 ,  H01L27/3223

Abstract: An organic electroluminescent display panel, which comprises a substrate, at least one display structure area, at least one first dummy area, and at least one second dummy area. The display structure area comprises at least one encapsulation area, at least one pixel area, a first conducting area, a second conducting area, a wiring area, a first connecting area, and a second connecting area. The wiring area and the first dummy area connect the first connecting area, and the two conducting areas and the second dummy area connect the second connecting area. Besides, the first and the second connecting areas overlap a selected part of the encapsulation area of a neighboring display structure area. Accordingly, the number and capacity of display structure areas on the organic electroluminescent display panel are increased to obtain a uniform brightness during a lighting test.

Abstract translation: 一种有机电致发光显示面板，其包括基板，至少一个显示结构区域，至少一个第一虚拟区域和至少一个第二虚拟区域。 显示结构区域包括至少一个封装区域，至少一个像素区域，第一导电区域，第二导电区域，布线区域，第一连接区域和第二连接区域。 布线区域和第一虚拟区域连接第一连接区域，并且两个导电区域和第二虚拟区域连接第二连接区域。 此外，第一和第二连接区域与相邻显示结构区域的封装区域的选定部分重叠。 因此，增加有机电致发光显示面板上的显示结构区域的数量和容量，以在点亮测试期间获得均匀的亮度。