公开(公告)号：US08384204B2

公开(公告)日：2013-02-26

申请号：US12683613

申请日：2010-01-07

申请人： Chien Liu ,  Chih-Ming Chung

发明人： Chien Liu ,  Chih-Ming Chung

IPC分类号： H01L23/482 ,  H05K1/09

CPC分类号： H05K3/3452 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/498 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/05572 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48229 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/2081 ,  H05K2203/0315 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A circuit carrier suitable for being connected with a bump is provided. The circuit carrier includes a substrate and at least one bonding pad. The substrate has a bonding pad disposed on a surface thereof for being connected with the bump. A brown-oxide layer is disposed on a surface of the bonding pad.

摘要翻译： 提供适于与凸块连接的电路载体。 电路载体包括衬底和至少一个接合焊盘。 衬底具有设置在其表面上用于与凸块连接的接合焊盘。 在接合焊盘的表面上设置有棕色氧化物层。

公开(公告)号：US20090289339A1

公开(公告)日：2009-11-26

申请号：US12464334

申请日：2009-05-12

申请人： Chia Chien HU ,  Chao Cheng Liu ,  Chien Liu ,  Chih Ming Chung

发明人： Chia Chien HU ,  Chao Cheng Liu ,  Chien Liu ,  Chih Ming Chung

IPC分类号： H01L23/28 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/16 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/83 ,  H01L2924/00

摘要： A semiconductor package includes a carrier, a chip, a stiffener and an encapsulant. The chip is disposed on the carrier. The stiffener is disposed around the chip, directly contacts the carrier, and is mounted on the carrier. The encapsulant is adapted to seal the chip and the stiffener.

摘要翻译： 半导体封装包括载体，芯片，加强件和密封剂。 芯片设置在载体上。 加强件设置在芯片周围，直接接触载体，并安装在载体上。 密封剂适于密封芯片和加强件。

公开(公告)号：US20090289338A1

公开(公告)日：2009-11-26

申请号：US12464315

申请日：2009-05-12

申请人： Chia Chien HU ,  Chao Cheng Liu ,  Chien Liu ,  Chih Ming Chung

发明人： Chia Chien HU ,  Chao Cheng Liu ,  Chien Liu ,  Chih Ming Chung

IPC分类号： H01L23/28 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/16 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/83 ,  H01L2924/00

摘要： A semiconductor package includes a carrier, a chip, a stiffener and an encapsulant. The chip is disposed on the carrier. The stiffener is disposed around the chip, directly contacts the carrier, and is mounted on the carrier. The encapsulant is adapted to seal the chip and the stiffener.

公开(公告)号：US07565737B2

公开(公告)日：2009-07-28

申请号：US11947791

申请日：2007-11-30

申请人： Chih-Ming Chung

发明人： Chih-Ming Chung

IPC分类号： H05K3/30

CPC分类号： H05K1/142 ,  H01L23/49833 ,  H01L2224/16 ,  H01L2924/09701 ,  H05K1/183 ,  H05K2201/0187 ,  H05K2201/10378 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155

摘要： A package substrate for carrying a chip with a plurality of bumps thereon is provided. The package substrate includes a first substrate, and an interposer. The first substrate has a first circuit layer disposed on a surface thereof. The interposer includes a second substrate and a second circuit layer formed thereon. The second circuit layer comprises a plurality of bonding pads and traces. The traces are electrically connected to the corresponding bonding pads. Furthermore, the bonding pads are used for being connected to the bumps. The second circuit layer of the interposer is physically and electrically connected to the first circuit layer of the first substrate, and the second substrate and the first substrate are made of different materials.

摘要翻译： 提供了用于承载具有多个凸块的芯片的封装基板。 封装衬底包括第一衬底和中介层。 第一基板具有设置在其表面上的第一电路层。 插入器包括形成在其上的第二基板和第二电路层。 第二电路层包括多个接合焊盘和迹线。 迹线电连接到相应的焊盘。 此外，接合焊盘用于连接到凸块。 插入器的第二电路层物理地和电连接到第一衬底的第一电路层，第二衬底和第一衬底由不同的材料制成。

公开(公告)号：US20070052082A1

公开(公告)日：2007-03-08

申请号：US11306818

申请日：2006-01-12

申请人： Cheng-Yin Lee ,  Chih-Ming Chung ,  Wen-Pin Huang

发明人： Cheng-Yin Lee ,  Chih-Ming Chung ,  Wen-Pin Huang

IPC分类号： H01L23/02

CPC分类号： H01L25/03 ,  H01L23/3128 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00

摘要： A multi-chip package structure including a carrier, a first chip having an active surface and a rear surface, multiple bumps, a second chip, multiple first bonding wires, a package unit disposed above the first chip, a spacer disposed between the package unit and the first chip, multiple second bonding wires, and an encapsulant is provided. The bumps are disposed between the active surface and the carrier to electrically connect the first chip and the carrier. The second chip is disposed on the rear surface of the first chip. The first bonding wires electrically connect the second chip and the carrier. The second bonding wires electrically connect the package unit and the carrier. The encapsulant is disposed on the carrier to encapsulate the first chip, the second chip, at least a portion of the package unit, the bumps, the spacer, the first bonding wires and the second bonding wires.

摘要翻译： 一种包括载体，具有活性表面的第一芯片和后表面的多芯片封装结构，多个凸点，第二芯片，多个第一接合线，设置在第一芯片上方的封装单元，设置在封装单元之间的间隔件 并提供第一芯片，多个第二接合线和密封剂。 凸起设置在有源表面和载体之间以电连接第一芯片和载体。 第二芯片设置在第一芯片的后表面上。 第一接合线将第二芯片和载体电连接。 第二接合线将封装单元和载体电连接。 密封剂设置在载体上以封装第一芯片，第二芯片，封装单元的至少一部分，凸块，间隔件，第一接合线和第二接合线。

公开(公告)号：US07902650B2

公开(公告)日：2011-03-08

申请号：US12464334

申请日：2009-05-12

申请人： Chia Chien Hu ,  Chao Cheng Liu ,  Chien Liu ,  Chih Ming Chung

发明人： Chia Chien Hu ,  Chao Cheng Liu ,  Chien Liu ,  Chih Ming Chung

IPC分类号： H01L23/02 ,  H01L21/44

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/16 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/83 ,  H01L2924/00

摘要： A semiconductor package includes a carrier, a chip, a stiffener and an encapsulant. The chip is disposed on the carrier. The stiffener is disposed around the chip, directly contacts the carrier, and is mounted on the carrier. The encapsulant is adapted to seal the chip and the stiffener.

摘要翻译： 半导体封装包括载体，芯片，加强件和密封剂。 芯片设置在载体上。 加强件设置在芯片周围，直接接触载体，并安装在载体上。 密封剂适于密封芯片和加强件。

公开(公告)号：US07375435B2

公开(公告)日：2008-05-20

申请号：US10906536

申请日：2005-02-24

申请人： Meng-Jen Wang ,  Chih-Ming Chung

发明人： Meng-Jen Wang ,  Chih-Ming Chung

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/563 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package structure comprising a substrate, a chip, a plurality of bumps, some buffer material and some encapsulation is provided. The substrate has a first surface and a corresponding second surface. The chip has an active surface and a back surface. The bumps are disposed between the active surface of the chip and the first surface of the substrate. The buffer material is disposed on the back surface of the chip. The encapsulation is disposed over the first surface of the substrate to enclose the chip and the buffer material.

摘要翻译： 提供了包括衬底，芯片，多个凸块，一些缓冲材料和一些封装的芯片封装结构。 衬底具有第一表面和相应的第二表面。 芯片具有活性表面和背面。 凸块设置在芯片的有源表面和基板的第一表面之间。 缓冲材料设置在芯片的背面。 封装设置在衬底的第一表面上以包围芯片和缓冲材料。

公开(公告)号：US20070259481A1

公开(公告)日：2007-11-08

申请号：US11778659

申请日：2007-07-17

申请人： Chih-Ming Chung

发明人： Chih-Ming Chung

IPC分类号： H01L21/58

CPC分类号： H01L21/563 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/11822 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/1357 ,  H01L2224/1369 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81355 ,  H01L2224/81801 ,  H01L2224/8192 ,  H01L2224/83191 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/351 ,  H05K3/3436 ,  H05K3/3489 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/05099

摘要： A process for fabricating a chip package structure with the following steps is provided. First, a chip having an active surface is provided. A plurality of solder bumps is disposed on the active surface. Then, a polymer material including flux is placed on the surface of the solder bumps by a dipping process. The chip is disposed on a carrier such that the carrier is in contact with the solder bumps. A reflow process is carried out so that the chip and the carrier are electrically connected through the solder bumps and a plurality of supporting structures made from the polymer material are formed around the junctions between the solder bumps and the carrier. The supporting structures enhance the endurance of the solder bumps to thermal stress and reduce damage due to fatigue.

摘要翻译： 提供了以下步骤制造芯片封装结构的工艺。 首先，提供具有活性表面的芯片。 多个焊料凸块设置在有源表面上。 然后，通过浸渍处理将包含焊剂的聚合物材料放置在焊料凸块的表面上。 芯片设置在载体上，使得载体与焊料凸块接触。 进行回流处理，使得芯片和载体通过焊料凸块电连接，并且由聚合物材料制成的多个支撑结构形成在焊料凸块和载体之间的接合部周围。 支撑结构增强了焊料凸块对热应力的耐久性，并减少了由于疲劳造成的损坏。

公开(公告)号：US07125745B2

公开(公告)日：2006-10-24

申请号：US10833087

申请日：2004-04-28

申请人： Kun-Ching Chen ,  Yi-Chuan Ding ,  Po-Jen Cheng ,  Chih-Ming Chung ,  Yun-Hsiang Tien

发明人： Kun-Ching Chen ,  Yi-Chuan Ding ,  Po-Jen Cheng ,  Chih-Ming Chung ,  Yun-Hsiang Tien

IPC分类号： H01L21/44

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/11 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00

摘要： A multi-chip package substrate for both flip-chip bumping and wire-bonding applications comprises a substrate body having a top surface and a bottom surface. A plurality of bumping pads and a plurality of wire-bonding pads are formed on the top surface. The bumping pads are disposed on the top surface of the substrate body and a pre-solder material is formed on the bumped pads. The wire-bonding pads are disposed on the top surface of the substrate body and a Ni/Au layer is formed on the wire-bonding pads. In order to avoid the bumping pads and the wire-bonding pads from oxidation during packaging processes. The pre-solder material fully covers the bumping pads to avoid the Au intermetallics generated in a plurality of bumps on a bumped chip during packaging processes. The reliability of the multi-chip stacked package for both flip-chip bumping and wire-bonding applications will be greatly improved.

摘要翻译： 用于倒装芯片凸块和引线接合应用的多芯片封装衬底包括具有顶表面和底表面的衬底本体。 多个凸台和多个引线接合垫形成在顶表面上。 凸起垫设置在基板主体的顶表面上，并且在凸起的焊盘上形成预焊材料。 引线接合焊盘设置在基板主体的顶表面上，并且在引线接合焊盘上形成Ni / Au层。 为了避免在包装过程中碰撞垫和引线接合垫发生氧化。 预焊材料完全覆盖凸块，以避免在包装过程中在凸起芯片上的多个凸块中产生的Au金属间化合物。 用于倒装芯片凸块和引线接合应用的多芯片堆叠封装的可靠性将大大提高。

公开(公告)号：US06673656B2

公开(公告)日：2004-01-06

申请号：US10121510

申请日：2002-04-15

申请人： Chih Ming Chung

发明人： Chih Ming Chung

IPC分类号： H01L2150

CPC分类号： H01L23/49816 ,  H01L23/3114 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

摘要： This invention provides a method for manufacturing a semiconductor chip package which mainly utilizes a substrate having a organic surface protection thereon to package a central-pad chip. In the encapsulating process, since the molding flash is completely formed on the surface of the organic surface protection, the molding flash can be easily removed together with the organic surface protection without damaging the substrate surface. This invention further provides a method for manufacturing the substrate.

摘要翻译： 本发明提供一种主要利用其上具有有机表面保护的基板来封装中心焊盘芯片的半导体芯片封装的制造方法。 在封装过程中，由于成型闪蒸完全形成在有机表面保护的表面上，因此可以容易地将成型闪光与有机表面保护一起去除而不损坏基板表面。 本发明还提供了一种制造衬底的方法。