公开(公告)号：US07199450B2

公开(公告)日：2007-04-03

申请号：US10908480

申请日：2005-05-13

申请人： Jon A. Casey ,  Michael Berger ,  Leena P. Buchwalter ,  Donald F. Canaperi ,  Raymond R. Horton ,  Anurag Jain ,  Eric D. Perfecto ,  James A. Tornello

发明人： Jon A. Casey ,  Michael Berger ,  Leena P. Buchwalter ,  Donald F. Canaperi ,  Raymond R. Horton ,  Anurag Jain ,  Eric D. Perfecto ,  James A. Tornello

IPC分类号： H01L29/06 ,  H01L23/58

CPC分类号： H01L23/147 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

摘要： Sealing a via using a soventless, low viscosity, high temperature stable polymer or a high solids content polymer solution of low viscosity, where the polymeric material is impregnated within the via at an elevated temperature. A supply chamber is introduced to administer the polymeric material at an elevated temperature, typically at a temperature high enough to liquefy the polymeric material. The polymeric material is introduced through heated supply lines under force from a pump, piston, or a vacuum held within said supply chamber.

摘要翻译： 使用无粘性，低粘度，高温稳定的聚合物或低粘度的高固含量聚合物溶液密封通孔，其中聚合物材料在高温下浸渍在通孔内。 引入供应室以在升高的温度下施用聚合物材料，通常在高至足以液化聚合物材料的温度下。 聚合物材料通过来自泵，活塞或保持在所述供应室内的真空的力的加热供应管线引入。

公开(公告)号：US20090032920A1

公开(公告)日：2009-02-05

申请号：US12167745

申请日：2008-07-03

申请人： Leena P. Buchwalter ,  Paul S. Andry ,  Matthew J. Farinelli ,  Sherif A. Goma ,  Raymond R. Horton ,  Edmund J. Sprogis

发明人： Leena P. Buchwalter ,  Paul S. Andry ,  Matthew J. Farinelli ,  Sherif A. Goma ,  Raymond R. Horton ,  Edmund J. Sprogis

IPC分类号： H01L23/495 ,  H01L21/00

CPC分类号： H01L21/67092 ,  H01L21/67132 ,  H01L21/6835 ,  H01L21/6836 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2224/11003 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/10253 ,  Y10S414/139 ,  H01L2924/00 ,  H01L2224/0401

摘要： A laser release and glass chip removal process for a integrated circuit module avoiding carrier edge cracking is provided.

摘要翻译： 提供了用于避免载波边缘破裂的集成电路模块的激光释放和玻璃切屑去除工艺。

公开(公告)号：US20120091585A1

公开(公告)日：2012-04-19

申请号：US13312456

申请日：2011-12-06

申请人： Leena P. Buchwalter ,  Paul S. Andry ,  Matthew J. Farinelli ,  Sherif A. Goma ,  Raymond R. Horton ,  Edmund J. Sprogis

发明人： Leena P. Buchwalter ,  Paul S. Andry ,  Matthew J. Farinelli ,  Sherif A. Goma ,  Raymond R. Horton ,  Edmund J. Sprogis

IPC分类号： H01L23/498 ,  H01L23/485

CPC分类号： H01L21/67092 ,  H01L21/67132 ,  H01L21/6835 ,  H01L21/6836 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2224/11003 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/10253 ,  Y10S414/139 ,  H01L2924/00 ,  H01L2224/0401

摘要： A laser release and glass chip removal process for a integrated circuit module avoiding carrier edge cracking is provided.

摘要翻译： 提供了用于避免载波边缘破裂的集成电路模块的激光释放和玻璃切屑去除工艺。

公开(公告)号：US07449067B2

公开(公告)日：2008-11-11

申请号：US10700327

申请日：2003-11-03

申请人： Paul S. Andry ,  Jon A. Casey ,  Raymond R. Horton ,  Chiraq S. Patel ,  Edmund J. Sprogis ,  Brian R. Sundlof

发明人： Paul S. Andry ,  Jon A. Casey ,  Raymond R. Horton ,  Chiraq S. Patel ,  Edmund J. Sprogis ,  Brian R. Sundlof

IPC分类号： B05C1/00 ,  B05C3/00 ,  B05C3/18

CPC分类号： H01L21/486 ,  H01L23/147 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00

摘要： A method for filling vias, and in particular initially blind vias, in a wafer, and various apparatus for performing the method, comprising evacuating air from the vias; trapping at least a portion of the wafer and a paste for filling the vias between two surfaces; and pressurizing the paste to fill the vias.

摘要翻译： 一种用于在晶片中填充通孔，特别是初始盲孔的方法，以及用于执行该方法的各种装置，包括从通孔排出空气; 捕获晶片的至少一部分和用于在两个表面之间填充通孔的糊状物; 并对该糊状物加压以填充通孔。

公开(公告)号：US20120261458A1

公开(公告)日：2012-10-18

申请号：US13089074

申请日：2011-04-18

申请人： Bing Dang ,  Raymond R. Horton ,  Robert J. Polastre

发明人： Bing Dang ,  Raymond R. Horton ,  Robert J. Polastre

IPC分类号： B23K31/12 ,  B23K1/20 ,  B23K31/02

CPC分类号： B23K1/0016 ,  B23K1/008 ,  B23K1/19 ,  B23K1/206 ,  B23K2101/40 ,  H01L2224/81012

摘要： A transfer process for bonding a solderable device to a solderable first substrate having a first oxidized surface comprises placing the solderable device proximate to the first substrate in a reducing chamber, where the first surface cannot be visually observed. We place a second substrate having a second oxidized surface in the chamber in a way to visually observe the second surface. Selecting the first substrate and the second substrate so that the reduction of the second surface correlates with the reduction of the first surface provides an indication of the degree of reduction of the first surface. Introducing a reducing agent into the chamber under reducing conditions reduces the surfaces which we track by irradiating and observing the second surface; evaluate any change in the second surface during irradiation and correlate the change with first surface reduction. When sufficiently reduced, we solder the first substrate to the device.

摘要翻译： 用于将可焊接装置接合到具有第一氧化表面的可焊接的第一基板的转移过程包括将可焊接装置靠近第一基板放置在还原室中，其中第一表面不能被目视观察。 我们以在目视上观察第二表面的方式放置在腔室中具有第二氧化表面的第二衬底。 选择第一基板和第二基板，使得第二表面的减小与第一表面的减小相关，提供第一表面的减小程度的指示。 在还原条件下将还原剂引入到室中通过照射和观察第二表面来减少我们跟踪的表面; 评估照射期间第二表面的任何变化，并将变化与第一表面还原相关联。 当充分减少时，我们将第一个衬底焊接到器件。

公开(公告)号：US20080182361A1

公开(公告)日：2008-07-31

申请号：US12056808

申请日：2008-03-27

申请人： Raymond R. Horton ,  John U. Knickerbocker ,  Edmund J. Sprogis ,  Cornelia K. Tsang

发明人： Raymond R. Horton ,  John U. Knickerbocker ,  Edmund J. Sprogis ,  Cornelia K. Tsang

IPC分类号： H01L21/02

CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/5382 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/15311

摘要： Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein, the at least one interposer structure being configured to allow for one or more of the plurality of decoupling capacitors to be selectively deactivated. In another aspect, a method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein comprises the following step. One or more of the plurality of decoupling capacitors are selectively deactivated.

公开(公告)号：US07282391B1

公开(公告)日：2007-10-16

申请号：US11385121

申请日：2006-03-21

申请人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

发明人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

IPC分类号： H01L21/00 ,  H01L23/48

CPC分类号： H01L24/81 ,  H01L23/544 ,  H01L24/48 ,  H01L24/97 ,  H01L25/50 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/48227 ,  H01L2224/81001 ,  H01L2224/81054 ,  H01L2224/81136 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/20109 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.

摘要翻译： 一种电子潜水及其制造方法。 所述方法包括将放置引导件放置在模块基板的顶表面上，所述放置引导件具有引导开口，所述引导开口从所述放置引导件的顶表面延伸到所述放置引导件的底表面; 将所述放置引导件对准所述模块基板上的集成电路芯片位置; 将所述放置引导件固定到所述模块基板; 将集成电路芯片放置在引导开口中，放置引导开口的侧壁约束集成电路芯片的底表面上的导电接合结构，以与模块基板的顶表面上的导电模块衬底接触焊盘自对准 集成电路芯片位置; 以及在接合之后将结合结构粘合到模块衬底接触焊盘，接合结构和模块衬底接触焊盘，直接物理和电接触。

公开(公告)号：US5205461A

公开(公告)日：1993-04-27

申请号：US524408

申请日：1990-05-16

申请人： Harry R. Bickford ,  Raymond R. Horton ,  Ismail C. Noyan ,  Michael J. Palmer ,  John C. Zyzo

发明人： Harry R. Bickford ,  Raymond R. Horton ,  Ismail C. Noyan ,  Michael J. Palmer ,  John C. Zyzo

IPC分类号： B23K1/012 ,  H01L21/00 ,  H05K3/34

CPC分类号： H01L21/67144 ,  B23K1/012 ,  H05K3/3494

摘要： Method and apparatus for fluxlessly solder bonding a solder mound to a solder wettable surface. A heated gas, preferably a reducing or non-reactive gas, is directed at a solid solder mound. Gas is heated to a temperature sufficient to melt solder mound. The heated gas is directed at the molten solder mound at a momentum sufficient to disperse an oxide layer at the surface of the molten solder mound. Dispersing the oxide layer permits the molten solder to wet the solder wettable surface. The molten solder is cooled to form a solder bond.

摘要翻译： 将焊锡焊料无焊焊接到焊料可润湿表面的方法和装置。 加热气体，优选还原性或非反应性气体，被引导到固体焊料堆。 将气体加热到足以熔化焊料堆的温度。 加热的气体以足以将氧化物层分散在熔融焊料堆的表面的动量指向熔融焊料堆。 分散氧化物层允许熔融焊料润湿焊料可润湿表面。 将熔融的焊料冷却以形成焊料接合。

公开(公告)号：US5038195A

公开(公告)日：1991-08-06

申请号：US477705

申请日：1990-02-09

申请人： William D. Brewer ,  Kurt R. Grebe ,  Raymond R. Horton ,  Linda C. Matthew ,  Ismail C. Noyan ,  Michael J. Palmer ,  Sampath Purushothaman ,  David L. Rath

发明人： William D. Brewer ,  Kurt R. Grebe ,  Raymond R. Horton ,  Linda C. Matthew ,  Ismail C. Noyan ,  Michael J. Palmer ,  Sampath Purushothaman ,  David L. Rath

IPC分类号： H01L21/60 ,  H01L21/48 ,  H01L23/498 ,  H01L23/50 ,  H05K1/00 ,  H05K1/09 ,  H05K3/24

CPC分类号： H05K3/244 ,  H01L21/4846 ,  H01L23/49866 ,  H05K1/09 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0393 ,  Y10T428/1291

摘要： The present invention comprises the use of a copper/nickel containing alloy composition or application of a protective nickel alloy coating to copper current-carrying leads to prevent electrolytic migration between tape automated bonding (TAB) package leads.

公开(公告)号：US07741231B2

公开(公告)日：2010-06-22

申请号：US12056773

申请日：2008-03-27

申请人： Raymond R. Horton ,  John U. Knickerbocker ,  Edmund J. Sprogis ,  Cornelia K. Tsang

发明人： Raymond R. Horton ,  John U. Knickerbocker ,  Edmund J. Sprogis ,  Cornelia K. Tsang

IPC分类号： H01L21/31

CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/5382 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/15311

摘要： Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or mole vias and a plurality of decoupling capacitors integrated therein, the at least one interposer structure being configured to allow for one or more of the plurality of decoupling capacitors to be selectively deactivated. In another aspect, a method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein comprises the following step. One or more of the plurality of decoupling capacitors are selectively deactivated.

摘要翻译： 提供电子器件制造技术。 一方面，提供一种电子设备。 电子设备包括具有一个或多个通孔和集成在其中的多个去耦电容器的至少一个插入器结构，所述至少一个插入器结构被配置为允许选择性地去激活多个去耦电容器中的一个或多个。 在另一方面，一种制造电子器件的方法，包括至少一个具有一个或多个通孔的内插器结构和集成在其中的多个去耦电容器，其包括以下步骤。 选择性地去激活多个去耦电容器中的一个或多个。