公开(公告)号：US09525128B2

公开(公告)日：2016-12-20

申请号：US14225401

申请日：2014-03-25

申请人： Sungyoon Chung ,  Jinhye Bae ,  Hyungjoon Kwon ,  Jongchul Park ,  Wonjun Lee

发明人： Sungyoon Chung ,  Jinhye Bae ,  Hyungjoon Kwon ,  Jongchul Park ,  Wonjun Lee

IPC分类号： H01L43/12 ,  H01L21/321 ,  H01L21/3213

CPC分类号： H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

摘要： A method of manufacturing a semiconductor device may include forming a material layer on a substrate, performing a selective oxidation process to form a capping oxide layer on a first surface of the material layer, wherein a second surface of the material layer is not oxidized, and etching the material layer through the second surface to form a material pattern. An etch rate of the capping oxide layer is less than an etch rate of the material layer. A semiconductor device may include a lower electrode on a substrate, a data storage part on a top surface of the lower electrode, an upper electrode on the data storage part, and a capping oxide layer arranged on at least a portion of a top surface of the upper electrode. The capping oxide layer may include an oxide formed by oxidation of an upper surface of the upper electrode.

摘要翻译： 制造半导体器件的方法可以包括在衬底上形成材料层，进行选择性氧化工艺以在材料层的第一表面上形成覆盖氧化物层，其中材料层的第二表面不被氧化，以及 通过第二表面蚀刻材料层以形成材料图案。 覆盖氧化物层的蚀刻速率小于材料层的蚀刻速率。 半导体器件可以包括在基板上的下电极，在下电极的顶表面上的数据存储部分，数据存储部分上的上电极，以及覆盖氧化物层，其设置在 上电极。 覆盖氧化物层可以包括通过氧化上部电极的上表面形成的氧化物。

公开(公告)号：US20170104152A1

公开(公告)日：2017-04-13

申请号：US15175463

申请日：2016-06-07

申请人： Jinhye BAE ,  Wonjun LEE ,  Yoonsung HAN ,  Hoon HAN ,  Kyu-Man HWANG ,  Yongsun KO

发明人： Jinhye BAE ,  Wonjun LEE ,  Yoonsung HAN ,  Hoon HAN ,  Kyu-Man HWANG ,  Yongsun KO

IPC分类号： H01L43/12 ,  H01L21/66 ,  H01L43/10 ,  H01L43/02 ,  H01L43/08

CPC分类号： H01L43/12 ,  H01L22/12 ,  H01L27/101 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

摘要： Provided is a method of manufacturing a semiconductor device. The method of manufacturing the semiconductor device includes forming magneto tunnel layers, forming a hard mask on the magneto tunnel layers, etching the magneto tunnel layers to form a magneto tunnel junction, wherein etching by-products are formed on sidewalls of the magneto tunnel junction, performing chemical treatment on the etching by-products to convert the etching by-products into a chemical reactant; and inspecting the chemical reactant.

公开(公告)号：US20170092850A1

公开(公告)日：2017-03-30

申请号：US15203008

申请日：2016-07-06

申请人： Wonjun LEE ,  lnseak HWANG ,  Yongsun KO ,  Changkyu LEE ,  Jinhye BAE ,  Hyunchul SHIN ,  Shinhee HAN ,  Yoonsung HAN

发明人： Wonjun LEE ,  lnseak HWANG ,  Yongsun KO ,  Changkyu LEE ,  Jinhye BAE ,  Hyunchul SHIN ,  Shinhee HAN ,  Yoonsung HAN

IPC分类号： H01L43/12 ,  H01L43/02 ,  H01L43/10 ,  H01L43/08

CPC分类号： H01L43/12 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

摘要： Manufacturing a MRAM device may include removing etch residues from a magnetic tunnel junction (MTJ) pattern in the presence of an atmosphere. The removing may include applying a cleaning solution to one or more surfaces of the MTJ pattern. Manufacturing the MRAM device may include removing an oxide layer based on sputter etching of the MTJ pattern. The etch residues may be removed such that the oxide layer is formed. Removing the etch residues may include applying a cleaning solution to the MTJ pattern. The etch residues may be removed in the presence of an atmosphere. The MTJ pattern may be formed based on patterning an MTJ layer in a vacuum state such that the etch residues are formed on a surface of the MTJ pattern.

公开(公告)号：US20140349413A1

公开(公告)日：2014-11-27

申请号：US14225401

申请日：2014-03-25

申请人： Sungyoon CHUNG ,  JINHYE BAE ,  HYUNGJOON KWON ,  JONGCHUL PARK ,  WONJUN LEE

发明人： Sungyoon CHUNG ,  JINHYE BAE ,  HYUNGJOON KWON ,  JONGCHUL PARK ,  WONJUN LEE

IPC分类号： H01L43/12 ,  H01L21/321 ,  H01L21/3213

CPC分类号： H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

摘要： A method of manufacturing a semiconductor device may include forming a material layer on a substrate, performing a selective oxidation process to form a capping oxide layer on a first surface of the material layer, wherein a second surface of the material layer is not oxidized, and etching the material layer through the second surface to form a material pattern. An etch rate of the capping oxide layer is less than an etch rate of the material layer. A semiconductor device may include a lower electrode on a substrate, a data storage part on a top surface of the lower electrode, an upper electrode on the data storage part, and a capping oxide layer arranged on at least a portion of a top surface of the upper electrode. The capping oxide layer may include an oxide formed by oxidation of an upper surface of the upper electrode.

摘要翻译： 制造半导体器件的方法可以包括在衬底上形成材料层，进行选择性氧化工艺以在材料层的第一表面上形成覆盖氧化物层，其中材料层的第二表面不被氧化，以及 通过第二表面蚀刻材料层以形成材料图案。 覆盖氧化物层的蚀刻速率小于材料层的蚀刻速率。 半导体器件可以包括在基板上的下电极，在下电极的顶表面上的数据存储部分，数据存储部分上的上电极，以及覆盖氧化物层，其设置在 上电极。 覆盖氧化物层可以包括通过氧化上部电极的上表面形成的氧化物。

公开(公告)号：US20180211830A1

公开(公告)日：2018-07-26

申请号：US15841946

申请日：2017-12-14

申请人： Hoyoung Kim ,  Hyo-Sun Lee ,  Soojin Kim ,  Keonyoung Kim ,  Jinhye Bae ,  Hoon Han ,  Tae Soo Kwon ,  Jung Hun Lim

发明人： Hoyoung Kim ,  Hyo-Sun Lee ,  Soojin Kim ,  Keonyoung Kim ,  Jinhye Bae ,  Hoon Han ,  Tae Soo Kwon ,  Jung Hun Lim

IPC分类号： H01L21/02 ,  C11D7/26 ,  C11D7/08 ,  C11D7/32 ,  C11D11/00 ,  H01L21/683 ,  H01L23/00

CPC分类号： H01L21/02068 ,  C11D7/08 ,  C11D7/261 ,  C11D7/264 ,  C11D7/266 ,  C11D7/3209 ,  C11D7/3218 ,  C11D11/0047 ,  H01L21/02057 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/30625 ,  H01L21/6835 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/1181 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/3512 ,  H01L2924/37001 ,  H01L2224/11 ,  H01L2224/03

摘要： Embodiments of the inventive concepts provide a method of manufacturing a semiconductor device and a cleaning composition for an adhesive layer. The method includes preparing a semiconductor substrate to which an adhesive layer adheres, removing the adhesive layer from the semiconductor substrate, and applying a cleaning composition to the semiconductor substrate to remove a residue of the adhesive layer. The cleaning composition includes a solvent including a ketone compound and having a content that is equal to or greater than 40 wt % and less than 90 wt %, quaternary ammonium salt, and primary amine.

公开(公告)号：US09735351B2

公开(公告)日：2017-08-15

申请号：US15203008

申请日：2016-07-06

申请人： Wonjun Lee ,  Inseak Hwang ,  Yongsun Ko ,  Changkyu Lee ,  Jinhye Bae ,  Hyunchul Shin ,  Shinhee Han ,  Yoonsung Han

发明人： Wonjun Lee ,  Inseak Hwang ,  Yongsun Ko ,  Changkyu Lee ,  Jinhye Bae ,  Hyunchul Shin ,  Shinhee Han ,  Yoonsung Han

IPC分类号： H01L21/00 ,  H01L43/12 ,  H01L43/08 ,  H01L43/02 ,  H01L43/10

CPC分类号： H01L43/12 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

摘要： Manufacturing a MRAM device may include removing etch residues from a magnetic tunnel junction (MTJ) pattern in the presence of an atmosphere. The removing may include applying a cleaning solution to one or more surfaces of the MTJ pattern. Manufacturing the MRAM device may include removing an oxide layer based on sputter etching of the MTJ pattern. The etch residues may be removed such that the oxide layer is formed. Removing the etch residues may include applying a cleaning solution to the MTJ pattern. The etch residues may be removed in the presence of an atmosphere. The MTJ pattern may be formed based on patterning an MTJ layer in a vacuum state such that the etch residues are formed on a surface of the MTJ pattern.