公开(公告)号：US09882039B2

公开(公告)日：2018-01-30

申请号：US13933668

申请日：2013-07-02

Applicant: M. Asif Khan ,  Vinod Adivarahan

Inventor： M. Asif Khan ,  Vinod Adivarahan

IPC: H01L31/107 ,  H01L29/778 ,  H01L21/02 ,  H01L21/306 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L29/66 ,  H01L29/20

CPC classification number: H01L29/7783 ,  H01L21/02057 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/30621 ,  H01L21/3141 ,  H01L21/31608 ,  H01L21/3185 ,  H01L29/2003 ,  H01L29/66462

Abstract: Fabrication methods of a high frequency (sub-micron gate length) operation of AlInGaN/InGaN/GaN MOS-DHFET, and the HFET device resulting from the fabrication methods, are generally disclosed. The method of forming the HFET device generally includes a novel double-recess etching and a pulsed deposition of an ultra-thin, high-quality silicon dioxide layer as the active gate-insulator. The methods of the present invention can be utilized to form any suitable field effect transistor (FET), and are particular suited for forming high electron mobility transistors (HEMT).

公开(公告)号：US20100102359A1

公开(公告)日：2010-04-29

申请号：US12515997

申请日：2007-12-17

Applicant: M. Asif Khan ,  Vinod Adivarahan

Inventor： M. Asif Khan ,  Vinod Adivarahan

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/7783 ,  H01L21/02057 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/30621 ,  H01L21/3141 ,  H01L21/31608 ,  H01L21/3185 ,  H01L29/2003 ,  H01L29/66462

Abstract: Fabrication methods of a high frequency (sub-micron gate length) operation of AlInGaN/InGaN/GaN MOS-DHFET, and the HFET device resulting from the fabrication methods, are generally disclosed. The method of forming the HFET device generally includes a novel double-recess etching and a pulsed deposition of an ultra-thin, high-quality silicon dioxide layer as the active gate-insulator. The methods of the present invention can be utilized to form any suitable field effect transistor (FET), and are particular suited for forming high electron mobility transistors (HEMT).

Abstract translation: 通常公开了AlInGaN / InGaN / GaN MOS-DHFET的高频（亚微米栅极长度）操作和由制造方法产生的HFET器件的制造方法。 形成HFET器件的方法通常包括新颖的双凹槽蚀刻和作为有源栅绝缘体的超薄，高质量二氧化硅层的脉冲沉积。 本发明的方法可用于形成任何合适的场效应晶体管（FET），并且特别适于形成高电子迁移率晶体管（HEMT）。

公开(公告)号：US20140015011A1

公开(公告)日：2014-01-16

申请号：US13933668

申请日：2013-07-02

Applicant: M. Asif Khan ,  Vinod Adivarahan

Inventor： M. Asif Khan ,  Vinod Adivarahan

IPC: H01L29/778

CPC classification number: H01L29/7783 ,  H01L21/02057 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/30621 ,  H01L21/3141 ,  H01L21/31608 ,  H01L21/3185 ,  H01L29/2003 ,  H01L29/66462

Abstract: Fabrication methods of a high frequency (sub-micron gate length) operation of AlInGaN/InGaN/GaN MOS-DHFET, and the HFET device resulting from the fabrication methods, are generally disclosed. The method of forming the HFET device generally includes a novel double-recess etching and a pulsed deposition of an ultra-thin, high-quality silicon dioxide layer as the active gate-insulator. The methods of the present invention can be utilized to form any suitable field effect transistor (FET), and are particular suited for forming high electron mobility transistors (HEMT).

Abstract translation: 通常公开了AlInGaN / InGaN / GaN MOS-DHFET的高频（亚微米栅极长度）操作和由制造方法产生的HFET器件的制造方法。 形成HFET器件的方法通常包括新颖的双凹槽蚀刻和作为有源栅绝缘体的超薄，高质量二氧化硅层的脉冲沉积。 本发明的方法可用于形成任何合适的场效应晶体管（FET），并且特别适于形成高电子迁移率晶体管（HEMT）。

公开(公告)号：US20100032647A1

公开(公告)日：2010-02-11

申请号：US12480304

申请日：2009-06-08

Applicant: M. Asif Khan ,  Qhalid Fareed ,  Vinod Adivarahan

Inventor： M. Asif Khan ,  Qhalid Fareed ,  Vinod Adivarahan

IPC: H01L33/00

CPC classification number: H01L33/12 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02647 ,  H01L33/007 ,  H01L33/06 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32

Abstract: An ultraviolet light emitting semiconductor chip, its use in a LED, and methods of its fabrication are disclosed. The semiconductor chip can include a buffer layer of AlxGa1-xN, where 0

Abstract translation: 公开了一种紫外光发射半导体芯片，其在LED中的应用及其制造方法。 半导体芯片可以包括Al x Ga 1-x N的缓冲层，其中0

公开(公告)号：US4616248A

公开(公告)日：1986-10-07

申请号：US735928

申请日：1985-05-20

Applicant: M. Asif Khan ,  Richard G. Schulze

Inventor： M. Asif Khan ,  Richard G. Schulze

IPC: H01L31/00 ,  H01J1/34 ,  H01L27/14

CPC classification number: H01J1/34 ,  H01J2201/3423

Abstract: A high efficiency UV responsive negative electron affinity photocathode with the long wavelength cutoff tunable over the wavelength from .about.200 to .about.300 nm based on Al.sub.x Ga.sub.1-x N. Negative electron affinity photocathodes for sharply enhanced photoemission yield can be formed by applying a layer of cesium to the surface of Al.sub.x Ga.sub.1-x N for which the Fermi energy level is appropriately positioned.

Abstract translation: 基于AlxGa1-xN，具有长波长截止频率的高效紫外响应负电子亲和光电阴极可调谐于波长从差分200到差分300nm。 可以通过在适当定位费米能级的Al x Ga 1-x N的表面上施加一层铯来形成用于急剧增强的光电子产率的负电子亲和光电阴极。

公开(公告)号：US08476125B2

公开(公告)日：2013-07-02

申请号：US12515997

申请日：2007-12-17

Applicant: M. Asif Khan ,  Vinod Adivarahan

Inventor： M. Asif Khan ,  Vinod Adivarahan

IPC: H01L21/338

CPC classification number: H01L29/7783 ,  H01L21/02057 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/30621 ,  H01L21/3141 ,  H01L21/31608 ,  H01L21/3185 ,  H01L29/2003 ,  H01L29/66462

Abstract: Fabrication methods of a high frequency (sub-micron gate length) operation of AlInGaN/InGaN/GaN MOS-DHFET, and the HFET device resulting from the fabrication methods, are generally disclosed. The method of forming the HFET device generally includes a novel double-recess etching and a pulsed deposition of an ultra-thin, high-quality silicon dioxide layer as the active gate-insulator. The methods of the present invention can be utilized to form any suitable field effect transistor (FET), and are particular suited for forming high electron mobility transistors (HEMT).

Abstract translation: 通常公开了AlInGaN / InGaN / GaN MOS-DHFET的高频（亚微米栅极长度）操作和由制造方法产生的HFET器件的制造方法。 形成HFET器件的方法通常包括新颖的双凹槽蚀刻和作为有源栅绝缘体的超薄，高质量二氧化硅层的脉冲沉积。 本发明的方法可用于形成任何合适的场效应晶体管（FET），并且特别适于形成高电子迁移率晶体管（HEMT）。

公开(公告)号：US08338273B2

公开(公告)日：2012-12-25

申请号：US12515991

申请日：2007-12-17

Applicant: M. Asif Khan ,  Vinod Adivarahan

Inventor： M. Asif Khan ,  Vinod Adivarahan

IPC: H01L21/28

CPC classification number: H01L21/02647 ,  C30B25/04 ,  C30B29/403 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262

Abstract: An epitaxy procedure for growing extremely low defect density non-polar and semi-polar III-nitride layers over a base layer, and the resulting structures, is generally described. In particular, a pulsed selective area lateral overgrowth of a group III nitride layer can be achieved on a non-polar and semi-polar base layer. By utilizing the novel P-MOCVD or PALE and lateral over growth over selected area, very high lateral growth conditions can be achieved at relatively lower growth temperature which does not affect the III-N surfaces.

Abstract translation: 通常描述了用于在基层上生长极低缺陷密度非极性和半极性III族氮化物层的外延程序，以及所得结构。 特别地，可以在非极性和半极性基底层上实现III族氮化物层的脉冲选择区域横向过度生长。 通过利用新的P-MOCVD或PALE和选择区域的侧向生长，可以在不影响III-N表面的相对较低的生长温度下实现非常高的横向生长条件。

公开(公告)号：US20100140745A1

公开(公告)日：2010-06-10

申请号：US12515991

申请日：2007-12-17

Applicant: M. Asif Khan ,  Vinod Adivarahan

Inventor： M. Asif Khan ,  Vinod Adivarahan

IPC: H01L29/20 ,  C30B25/04

CPC classification number: H01L21/02647 ,  C30B25/04 ,  C30B29/403 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262

Abstract: An epitaxy procedure for growing extremely low defect density non-polar and semi-polar III-nitride layers over a base layer, and the resulting structures, is generally described. In particular, a pulsed selective area lateral overgrowth of a group III nitride layer can be achieved on a non-polar and semi-polar base layer. By utilizing the novel P-MOCVD or PALE and lateral over growth over selected area, very high lateral growth conditions can be achieved at relatively lower growth temperature which does not affect the III-N surfaces.

Abstract translation: 通常描述了用于在基层上生长极低缺陷密度非极性和半极性III族氮化物层的外延程序，以及所得到的结构。 特别地，可以在非极性和半极性基底层上实现III族氮化物层的脉冲选择区域横向过度生长。 通过利用新的P-MOCVD或PALE和选择区域的侧向生长，可以在不影响III-N表面的相对较低的生长温度下实现非常高的横向生长条件。

公开(公告)号：US09331240B2

公开(公告)日：2016-05-03

申请号：US12480304

申请日：2009-06-08

Applicant: M. Asif Khan ,  Qhalid Fareed ,  Vinod Adivarahan

Inventor： M. Asif Khan ,  Qhalid Fareed ,  Vinod Adivarahan

IPC: H01L33/12 ,  H01L21/02 ,  H01L33/00 ,  H01L33/20

CPC classification number: H01L33/12 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02647 ,  H01L33/007 ,  H01L33/06 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32

Abstract: An ultraviolet light emitting semiconductor chip, its use in a LED, and methods of its fabrication are disclosed. The semiconductor chip can include a buffer layer of AlxGa1-xN, where 0

Abstract translation: 公开了一种紫外光发射半导体芯片，其在LED中的应用及其制造方法。 该半导体芯片可以包括Al x Ga 1-x N的缓冲层，其中0

公开(公告)号：US08318562B2

公开(公告)日：2012-11-27

申请号：US12061358

申请日：2008-04-02

Applicant: M. Asif Khan ,  Vinod Adivarahan ,  Qhalid Fareed ,  Grigory Simin ,  Naveen Tipirneni

Inventor： M. Asif Khan ,  Vinod Adivarahan ,  Qhalid Fareed ,  Grigory Simin ,  Naveen Tipirneni

IPC: H01L21/336

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/66462

Abstract: Methods of achieving high breakdown voltages in semiconductor devices by suppressing the surface flashover using high dielectric strength insulating encapsulation material are generally described. In one embodiment of the present invention, surface flashover in AlGaN/GaN heterostructure field-effect transistors (HFETs) is suppressed by using high dielectric strength insulating encapsulation material. Surface flashover in as-fabricated III-Nitride based HFETs limits the operating voltages at levels well below the breakdown voltages of GaN.

Abstract translation: 一般来说，通过使用高介电强度绝缘包封材料抑制表面闪络来实现半导体器件中的高击穿电压的方法。 在本发明的一个实施例中，通过使用高介电强度绝缘封装材料来抑制AlGaN / GaN异质结构场效应晶体管（HFET）中的表面闪络。 基于III-Nitride的HFET的表面闪络将工作电压限制在远低于GaN击穿电压的水平。