Substrates for Electronic Circuitry Type Applications
    5.
    发明申请
    Substrates for Electronic Circuitry Type Applications 审中-公开
    电子电路类型应用基板

    公开(公告)号:US20100263919A1

    公开(公告)日:2010-10-21

    申请号:US12086296

    申请日:2006-12-28

    IPC分类号: H05K1/09 H05K1/00

    摘要: An electronic type substrate having 40 to 97 weight-percent polymer and 3 to 60 weight-percent auto-catalytic crystalline filler. An interconnect or a conductor trace is created in the substrate by: i. drilling or ablating with a high energy electromagnetic source, such as a laser, thereby selectively activating the multi cation crystal filler along the surface created by the drilling or ablating step; and ii. metalizing by electroless and/or electrolytic plating into the drilled or ablated portion of the substrate, where the metal layer is formed in a contacting relationship with the activated multi cation crystal filler at the interconnect boundary without a need for a separate metallization seed layer or pre-dip.

    摘要翻译: 具有40至97重量%聚合物和3至60重量%自催化结晶填料的电子型基材。 通过以下方式在衬底中形成互连或导体迹线:i。 用诸如激光器的高能电磁源进行钻孔或烧蚀,从而沿着由钻孔或烧蚀步骤产生的表面选择性地激活多阳离子晶体填料; 和ii。 通过无电镀和/或电解电镀金属化到衬底的钻孔或烧蚀部分中,其中金属层在互连边界处与活化的多阳离子晶体填料形成接触关系,而不需要单独的金属化种子层或预先 -蘸。

    MULTILAYER FILM FOR ELECTRONIC CIRCUITRY APPLICATIONS AND METHODS RELATING THERETO
    9.
    发明申请
    MULTILAYER FILM FOR ELECTRONIC CIRCUITRY APPLICATIONS AND METHODS RELATING THERETO 审中-公开
    电子电路用多层薄膜及其相关方法

    公开(公告)号:US20130011645A1

    公开(公告)日:2013-01-10

    申请号:US13348180

    申请日:2012-01-11

    IPC分类号: B32B27/08

    摘要: The present disclosure relates to a multilayer film for electronic circuitry applications, having advantageous barrier properties against unwanted electron and electromagnetic wave interference, and also protection against dirt or other similar-type unwanted foreign matter interference. The multilayer films of the present disclosure have at least three layers. The first outer layer contains a base polymer, a carbon black filler or pigment and a dielectric filler. The core layer is a polymer with less than 5 weight percent filler. The second outer is similar to the first outer layer and contains a base polymer, a low conductivity carbon black filler or pigment and a dielectric filler. The two outer layers can be the same or different. Optionally, additional layers can also be used between the two outer layers.

    摘要翻译: 本公开涉及一种用于电子电路应用的多层膜,其具有防止不需要的电子和电磁波干扰的有利的屏障特性,以及防止灰尘或其它类似类型的不需要的异物干扰。 本公开的多层膜具有至少三层。 第一外层包含基础聚合物,炭黑填料或颜料和介电填料。 芯层是具有小于5重量%填料的聚合物。 第二外层类似于第一外层,并且包含基础聚合物,低导电性炭黑填料或颜料和介电填料。 两个外层可以相同或不同。 任选地,也可以在两个外层之间使用附加层。