公开(公告)号：US20100032310A1

公开(公告)日：2010-02-11

申请号：US12291356

申请日：2008-11-07

Applicant: Jonathan Reid ,  Bryan Buckalew ,  Zhian He ,  Seyang Park ,  Seshasayee Varadarajan ,  Bryan Pennington ,  Thomas Ponnuswamy ,  Patrick Breiling ,  Glenn Ibarreta ,  Steven Mayer

Inventor： Jonathan Reid ,  Bryan Buckalew ,  Zhian He ,  Seyang Park ,  Seshasayee Varadarajan ,  Bryan Pennington ,  Thomas Ponnuswamy ,  Patrick Breiling ,  Glenn Ibarreta ,  Steven Mayer

IPC: C25D3/00 ,  C25D17/00

CPC classification number: C25D17/008 ,  C25D7/123 ,  C25D17/001 ,  C25D17/007 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76873

Abstract: An apparatus for electroplating a layer of metal on the surface of a wafer includes an ionically resistive ionically permeable element located in close proximity of the wafer (preferably within 5 mm of the wafer surface) which serves to modulate ionic current at the wafer surface, and a second cathode configured to divert a portion of current from the wafer surface. The ionically resistive ionically permeable element in a preferred embodiment is a disk made of a resistive material having a plurality of perforations formed therein, such that perforations do not form communicating channels within the body of the disk. The provided configuration effectively redistributes ionic current in the plating system allowing plating of uniform metal layers and mitigating the terminal effect.

Abstract translation: 用于在晶片表面上电镀一层金属的装置包括位于晶片附近（优选地在晶片表面的5mm内）的离子电离性离子渗透元件，其用于调节晶片表面处的离子电流，以及 第二阴极，被配置为使来自晶片表面的一部分电流转向。 在优选实施例中的离子电阻性离子渗透元件是由电阻材料制成的盘，其中形成有多个穿孔，使得穿孔在盘的主体内不形成连通通道。 所提供的配置有效地重新分布电镀系统中的离子电流，允许电镀均匀的金属层并减轻终端效应。

公开(公告)号：US20140197037A1

公开(公告)日：2014-07-17

申请号：US13744335

申请日：2013-01-17

Applicant: Bryan L. Buckalew ,  Steven T. Mayer ,  Thomas Ponnuswamy ,  David Porter

Inventor： Bryan L. Buckalew ,  Steven T. Mayer ,  Thomas Ponnuswamy ,  David Porter

IPC: H05K3/00

CPC classification number: H01L24/11 ,  C25D3/38 ,  C25D3/60 ,  C25D5/10 ,  C25D5/50 ,  C25D17/00 ,  H01L21/2885 ,  H01L21/6723 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03462 ,  H01L2224/03848 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05647 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13111 ,  H01L2224/16503 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12044 ,  H01L2924/3656 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00

Abstract: A method of treating a copper containing structure on a substrate is disclosed. The method includes electrodepositing the copper containing structure on a substrate, annealing the copper containing structure, and forming an interface between a pad of the copper containing structure and a solder structure after anneal. The interface can have improved resistance to interfacial voiding. The copper containing structure is configured to deliver current between one or more ports and one or more solder structures in the integrated circuit package. Annealing the copper containing structure can move impurities and vacancies to the surface of the copper containing structure for subsequent removal.

Abstract translation: 公开了一种在衬底上处理含铜结构的方法。 该方法包括在基板上电沉积含铜结构，退火含铜结构，并在退火后形成含铜结构的焊盘和焊料结构之间的界面。 界面可以改善对界面空隙的抵抗力。 含铜结构被配置为在集成电路封装中的一个或多个端口与一个或多个焊料结构之间输送电流。 退火含铜结构可以将杂质和空位移动到含铜结构的表面以便随后除去。

公开(公告)号：US20110076390A1

公开(公告)日：2011-03-31

申请号：US12571162

申请日：2009-09-30

Applicant: Frank M. Cerio, JR. ,  Shigeru Mizuno ,  Jonathan Reid ,  Thomas Ponnuswamy

Inventor： Frank M. Cerio, JR. ,  Shigeru Mizuno ,  Jonathan Reid ,  Thomas Ponnuswamy

IPC: B05D5/00 ,  B05D7/22 ,  C25D5/02

CPC classification number: C23C18/165 ,  C23C18/161 ,  C23C18/1651 ,  C23C18/1692 ,  C23C18/38 ,  C25D5/02 ,  C25D5/10 ,  C25D5/38 ,  C25D5/50 ,  H01L21/28556 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76883

Abstract: Methods are provided for multi-step Cu metal plating on a continuous Ru metal film in recessed features found in advanced integrated circuits. The use of a continuous Ru metal film prevents formation of undesirable micro-voids during Cu metal filling of high-aspect-ratio recessed features, such as trenches and vias, and enables formation of large Cu metal grains that include a continuous Cu metal layer plated onto the continuous Ru metal film. The large Cu grains lower the electrical resistivity of the Cu filled recessed features and increase the reliability of the integrated circuit.

Abstract translation: 提供了在先进集成电路中发现的凹陷特征中的连续Ru金属膜上的多步Cu金属电镀方法。 使用连续的Ru金属膜可防止在高纵横比凹陷特征（例如沟槽和通孔）的Cu金属填充期间形成不期望的微孔，并且能够形成大的Cu金属晶粒，其包括连续的Cu金属层电镀 到连续的Ru金属膜上。 大的Cu晶粒降低了Cu填充凹陷特征的电阻率，增加了集成电路的可靠性。

公开(公告)号：US20130292254A1

公开(公告)日：2013-11-07

申请号：US13852767

申请日：2013-03-28

Applicant: Santosh Kumar ,  Bryan L. Buckalew ,  Steven T. Mayer ,  Thomas Ponnuswamy ,  Chad Michael Hosack ,  Robert Rash ,  Lee Peng Chua ,  David Porter

Inventor： Santosh Kumar ,  Bryan L. Buckalew ,  Steven T. Mayer ,  Thomas Ponnuswamy ,  Chad Michael Hosack ,  Robert Rash ,  Lee Peng Chua ,  David Porter

IPC: C25D17/00

CPC classification number: B08B3/022 ,  B08B3/041 ,  C25D7/12 ,  C25D17/00 ,  C25D17/001 ,  C25D21/00 ,  C25D21/12 ,  H01L21/67051

Abstract: Disclosed herein are methods of cleaning a lipseal and/or cup bottom of an electroplating device by removing metal deposits accumulated in prior electroplating operations. The methods may include orienting a nozzle such that it is pointed substantially at the inner circular edge of the lipseal and/or cup bottom, and dispensing a stream of cleaning solution from the nozzle such that the stream contacts the inner circular edge of the lipseal and/or cup bottom while they are being rotated, removing metal deposits. In some embodiments, the stream has a velocity component against the rotational direction of the lipseal and/or cup bottom. In some embodiments, the deposits may include a tin/silver alloy. Also disclosed herein are cleaning apparatuses for mounting in electroplating devices and for removing electroplated metal deposits from their lipseals and/or cup bottoms. In some embodiments, the cleaning apparatuses may include a jet nozzle.

Abstract translation: 本文公开了通过去除在现有电镀操作中积累的金属沉积物来清洁电镀装置的唇密封和/或杯底的方法。 所述方法可以包括使喷嘴定向成使得其基本上指向唇密封件和/或杯底部的内圆形边缘，并且从喷嘴分配清洁溶液流，使得流接触唇塞的内圆形边缘，并且 /或杯底，同时旋转，去除金属沉积物。 在一些实施例中，流具有抵抗唇密封和/或杯底的旋转方向的速度分量。 在一些实施例中，沉积物可以包括锡/银合金。 本文还公开了用于安装在电镀装置中并用于从其密封件和/或杯底部去除电镀金属沉积物的清洁装置。 在一些实施例中，清洁设备可以包括喷嘴。

公开(公告)号：US08308931B2

公开(公告)日：2012-11-13

申请号：US12291356

申请日：2008-11-07

Applicant: Jonathan Reid ,  Bryan Buckalew ,  Zhian He ,  Seyang Park ,  Seshasayee Varadarajan ,  Bryan Pennington ,  Thomas Ponnuswamy ,  Patrick Breling ,  Glenn Ibarreta ,  Steven Mayer

Inventor： Jonathan Reid ,  Bryan Buckalew ,  Zhian He ,  Seyang Park ,  Seshasayee Varadarajan ,  Bryan Pennington ,  Thomas Ponnuswamy ,  Patrick Breling ,  Glenn Ibarreta ,  Steven Mayer

IPC: C25D21/12 ,  C25D7/12 ,  C25D3/38

CPC classification number: C25D17/008 ,  C25D7/123 ,  C25D17/001 ,  C25D17/007 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76873

Abstract: An apparatus for electroplating a layer of metal on the surface of a wafer includes an ionically resistive ionically permeable element located in close proximity of the wafer (preferably within 5 mm of the wafer surface) which serves to modulate ionic current at the wafer surface, and a second cathode configured to divert a portion of current from the wafer surface. The ionically resistive ionically permeable element in a preferred embodiment is a disk made of a resistive material having a plurality of perforations formed therein, such that perforations do not form communicating channels within the body of the disk. The provided configuration effectively redistributes ionic current in the plating system allowing plating of uniform metal layers and mitigating the terminal effect.

Abstract translation: 用于在晶片表面上电镀一层金属的装置包括位于晶片附近（优选地在晶片表面的5mm内）的离子电离性离子渗透元件，其用于调节晶片表面处的离子电流，以及 第二阴极，被配置为使来自晶片表面的一部分电流转向。 在优选实施例中的离子电阻性离子渗透元件是由电阻材料制成的盘，其中形成有多个穿孔，使得穿孔在盘的主体内不形成连通通道。 所提供的配置有效地重新分布电镀系统中的离子电流，允许电镀均匀的金属层并减轻终端效应。

公开(公告)号：US08076241B2

公开(公告)日：2011-12-13

申请号：US12571162

申请日：2009-09-30

Applicant: Frank M. Cerio, Jr. ,  Shigeru Mizuno ,  Jonathan Reid ,  Thomas Ponnuswamy

Inventor： Frank M. Cerio, Jr. ,  Shigeru Mizuno ,  Jonathan Reid ,  Thomas Ponnuswamy

IPC: H01L21/44

CPC classification number: C23C18/165 ,  C23C18/161 ,  C23C18/1651 ,  C23C18/1692 ,  C23C18/38 ,  C25D5/02 ,  C25D5/10 ,  C25D5/38 ,  C25D5/50 ,  H01L21/28556 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76883

Abstract: Methods are provided for multi-step Cu metal plating on a continuous Ru metal film in recessed features found in advanced integrated circuits. The use of a continuous Ru metal film prevents formation of undesirable micro-voids during Cu metal filling of high-aspect-ratio recessed features, such as trenches and vias, and enables formation of large Cu metal grains that include a continuous Cu metal layer plated onto the continuous Ru metal film. The large Cu grains lower the electrical resistivity of the Cu filled recessed features and increase the reliability of the integrated circuit.

Abstract translation: 提供了在先进集成电路中发现的凹陷特征中的连续Ru金属膜上的多步Cu金属电镀方法。 使用连续的Ru金属膜可防止在高纵横比凹陷特征（例如沟槽和通孔）的Cu金属填充期间形成不期望的微孔，并且能够形成大的Cu金属晶粒，其包括连续的Cu金属层电镀 到连续的Ru金属膜上。 大的Cu晶粒降低了Cu填充凹陷特征的电阻率，增加了集成电路的可靠性。

公开(公告)号：US07964506B1

公开(公告)日：2011-06-21

申请号：US12075023

申请日：2008-03-06

Applicant: Thomas Ponnuswamy ,  John Sukamto ,  Jonathan Reid ,  Steve Mayer

Inventor： Thomas Ponnuswamy ,  John Sukamto ,  Jonathan Reid ,  Steve Mayer

IPC: H01L21/44

CPC classification number: H01L21/76873 ,  C25D3/38 ,  C25D5/18 ,  C25D5/50 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76864 ,  H01L2221/1089

Abstract: A two-step semiconductor electroplating process deposits copper onto wafers coated with a semi-noble metal in manner that is uniform across the wafer and free of voids after a post electrofill anneal. A seed-layer plating bath nucleates copper uniformly and conformably at a high density in a very thin film using a unique pulsed waveform. The wafer is then annealed before a second bath fills the features. The seed-layer anneal improves adhesion and stability of the semi-noble to copper interface, and the resulting copper interconnect stays void-free after a post electrofill anneal.

Abstract translation: 两步半导体电镀工艺将铜沉积在涂覆有半贵金属的晶片上，其方式在晶片上是均匀的，并且在后电沉积退火之后没有空隙。 种子层电镀槽使用独特的脉冲波形在非常薄的薄膜中以均匀且均匀的方式使铜成核铜。 然后在第二浴填充特征之前对晶片进行退火。 种子层退火提高了半贵金属对铜界面的粘附性和稳定性，并且所得的铜互连在后电沉积退火之后保持无空隙。

公开(公告)号：US07247554B2

公开(公告)日：2007-07-24

申请号：US10600039

申请日：2003-06-20

Applicant: Oliver Chyan ,  Thomas Ponnuswamy

Inventor： Oliver Chyan ,  Thomas Ponnuswamy

IPC: H01L21/4763

CPC classification number: H01L21/76843 ,  H01L21/76864 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention generally relates to methods used for fabricating integrated circuits (“ICs”), using Ruthenium (“Ru”) and its oxides and/or Iridium (“Ir”) and its oxides as the diffusion barrier to contain and control copper (“Cu”) interconnects. The invention also covers ICs incorporating such materials in the diffusion barrier to contain and control the Cu interconnects. The present invention advantageously provides better integration and fabrication of advanced IC chips with sub-micron features.

Abstract translation: 本发明一般涉及使用钌（“Ru”）及其氧化物和/或铱（“Ir”）及其氧化物作为扩散屏障来制备集成电路（“IC”）的方法，以包含和控制铜（ “Cu”）互连。 本发明还包括将这种材料结合在扩散阻挡层中以包含和控制Cu互连的IC。 本发明有利地提供具有亚微米特征的先进IC芯片的更好的集成和制造。