公开(公告)号：US09117836B2

公开(公告)日：2015-08-25

申请号：US13349430

申请日：2012-01-12

申请人： Naoki Tega ,  Yasuhiro Shimamoto ,  Yuki Mori ,  Hirotaka Hamamura ,  Hiroyuki Okino ,  Digh Hisamoto

发明人： Naoki Tega ,  Yasuhiro Shimamoto ,  Yuki Mori ,  Hirotaka Hamamura ,  Hiroyuki Okino ,  Digh Hisamoto

IPC分类号： H01L21/28 ,  H01L29/66 ,  H01L29/45 ,  H01L29/78 ,  H01L21/04 ,  H01L29/16 ,  H01L29/423 ,  H01L29/51

CPC分类号： H01L29/7802 ,  H01L21/0475 ,  H01L21/0485 ,  H01L29/1608 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/45 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66068 ,  H01L29/7813

摘要： A SiC MOSFET has a subject that resistance in the source region is increased when annealing for metal silicidation is performed to a source region before forming the gate insulating film, the metal silicide layer of the source region is oxidized by an oxidizing treatment (including oxynitriding treatment) when the gate insulating film is formed. When a metal silicide layer to be formed on the surface of a SiC epitaxial substrate is formed before forming a gate insulating film interface layer (oxide film), and an anti-oxidation film for the metal silicide is formed on the metal silicide layer, it is possible to suppress oxidation of the metal silicide layer by the oxidizing treatment upon forming the gate insulating film interface layer and the resistance of the source region can be decreased without lowering the channel mobility.

摘要翻译： SiC MOSFET具有在形成栅极绝缘膜之前对源极区域进行金属硅化退火时源极区域的电阻增加的对象，源极区域的金属硅化物层通过氧化处理（包括氮氧化处理）被氧化 ）形成栅极绝缘膜。 当在形成栅极绝缘膜界面层（氧化物膜）之前形成在SiC外延基板的表面上形成的金属硅化物层时，在金属硅化物层上形成用于金属硅化物的抗氧化膜， 可以通过在形成栅极绝缘膜界面层时的氧化处理来抑制金属硅化物层的氧化，并且可以降低源极区域的电阻而不降低沟道迁移率。

公开(公告)号：US09096748B2

公开(公告)日：2015-08-04

申请号：US13702047

申请日：2011-06-09

申请人： Yutaka Eguchi ,  Shinichi Shibayama ,  Yuki Mori ,  Kaori Komatsu ,  Hajime Matsuura

发明人： Yutaka Eguchi ,  Shinichi Shibayama ,  Yuki Mori ,  Kaori Komatsu ,  Hajime Matsuura

IPC分类号： C08L23/10 ,  B32B25/08 ,  B32B27/08 ,  B32B27/22 ,  B32B27/28 ,  B32B27/32 ,  C08L53/02 ,  C08L83/04 ,  B60R13/02

CPC分类号： C08L23/10 ,  B32B25/08 ,  B32B27/08 ,  B32B27/22 ,  B32B27/28 ,  B32B27/32 ,  B60R13/0256 ,  C08L53/025 ,  C08L83/04 ,  Y10T428/249992 ,  Y10T428/31507 ,  Y10T428/31663

摘要： An object of the present invention is to provide a thermoplastic elastomer composition having high molding fluidity, mechanical physical properties, and resistance to wear and providing a good appearance and feeling, and molded products using the same.

摘要翻译： 本发明的目的是提供一种具有高成型流动性，机械物理性能，耐磨性和提供良好外观和感觉的热塑性弹性体组合物，以及使用其的成型制品。

公开(公告)号：US20120217513A1

公开(公告)日：2012-08-30

申请号：US13349430

申请日：2012-01-12

申请人： Naoki TEGA ,  Yasuhiro Shimamoto ,  Yuki Mori ,  Hirotaka Hamamura ,  Hiroyuki Okino ,  Digh Hisamoto

发明人： Naoki TEGA ,  Yasuhiro Shimamoto ,  Yuki Mori ,  Hirotaka Hamamura ,  Hiroyuki Okino ,  Digh Hisamoto

IPC分类号： H01L21/28 ,  H01L29/12

CPC分类号： H01L29/7802 ,  H01L21/0475 ,  H01L21/0485 ,  H01L29/1608 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/45 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66068 ,  H01L29/7813

摘要： A SiC MOSFET has a subject that resistance in the source region is increased when annealing for metal silicidation is performed to a source region before forming the gate insulating film, the metal silicide layer of the source region is oxidized by an oxidizing treatment (including oxynitriding treatment) when the gate insulating film is formed. When a metal silicide layer to be formed on the surface of a SiC epitaxial substrate is formed before forming a gate insulating film interface layer (oxide film), and an anti-oxidation film for the metal silicide is formed on the metal silicide layer, it is possible to suppress oxidation of the metal silicide layer by the oxidizing treatment upon forming the gate insulating film interface layer and the resistance of the source region can be decreased without lowering the channel mobility.

摘要翻译： SiC MOSFET具有在形成栅极绝缘膜之前对源极区域进行金属硅化退火时源极区域的电阻增加的对象，源极区域的金属硅化物层通过氧化处理（包括氮氧化处理）被氧化 ）形成栅极绝缘膜。 当在形成栅极绝缘膜界面层（氧化物膜）之前形成在SiC外延基板的表面上形成的金属硅化物层时，在金属硅化物层上形成用于金属硅化物的抗氧化膜， 可以通过在形成栅极绝缘膜界面层时的氧化处理来抑制金属硅化物层的氧化，并且可以降低源极区域的电阻而不降低沟道迁移率。

公开(公告)号：US20120161186A1

公开(公告)日：2012-06-28

申请号：US13393408

申请日：2010-10-22

申请人： Kousuke Katabe ,  Yuki Mori ,  Akira Miyake ,  Shingo Matsuura ,  Masayuki Mori

发明人： Kousuke Katabe ,  Yuki Mori ,  Akira Miyake ,  Shingo Matsuura ,  Masayuki Mori

IPC分类号： H01L33/50

CPC分类号： H01L33/60 ,  H01L33/507 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/181 ,  H01L2924/00012

摘要： A light-emitting device includes a substrate mounted with a light-emitting element, and a frame disposed on the substrate. The frame includes a first frame portion disposed on the substrate and surrounding the light-emitting element, and having an inner wall surface substantially perpendicular to an upper surface of the substrate, an upper end of the inner wall surface being positioned at a level higher than that of an upper surface of the light-emitting element, and a second frame portion surrounding the inner wall surface of the first frame portion when viewed in a plan view, and having an inner periphery which is so shaped as to extend at an outward incline from a lower end of the inner periphery to an upper thereof. The light-emitting device includes a wavelength converter supported on the frame and opposed to the substrate with a gap.

摘要翻译： 发光装置包括安装有发光元件的基板和设置在基板上的框架。 所述框架包括设置在所述基板上并围绕所述发光元件的第一框架部分，并且具有基本上垂直于所述基板的上表面的内壁表面，所述内壁表面的上端定位在高于 发光元件的上表面以及围绕第一框架部分的内壁表面的平面图中的第二框架部分，并且具有内周，该内周被成形为在向外倾斜 从内周的下端到其上部。 发光装置包括支撑在框架上并与间隙相对的基板的波长转换器。

公开(公告)号：US20090200570A1

公开(公告)日：2009-08-13

申请号：US11718217

申请日：2005-10-27

申请人： Yuki Mori ,  Fumiaki Sekine

发明人： Yuki Mori ,  Fumiaki Sekine

IPC分类号： H01L33/00

CPC分类号： H01L33/642 ,  H01L23/055 ,  H01L23/3107 ,  H01L33/62 ,  H01L33/647 ,  H01L2224/16 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041

摘要： A light-emitting apparatus with improved dissipation efficiency of heat transmitted to a specific electrode of a light-emitting device is provided. A light-emitting device mounting substrate used for the light emitting apparatus include a base body (1) which mounts thereon a light-emitting device (3); a first electrically conductive path (L1) formed within the base body (1), one end thereof being electrically connected to a first electrode (3a) of the light-emitting device (3) and the other end thereof being led out to a surface of the base body (1); and a second electrically conductive path (L2) formed in the base body (1), one end thereof being electrically connected to a second electrode (3b) of the light-emitting device (3), and the other end thereof being formed on the surface of the base body (1). The first electrically conductive path (L1) is made smaller in thermal resistance than the second electrically conductive path (L2).

摘要翻译： 提供了一种具有改善的散热效率的发光装置，其传输到发光装置的特定电极。 用于发光装置的发光装置安装基板包括安装在其上的发光装置（3）的基体（1）。 形成在所述基体（1）内的第一导电路径（L1），其一端电连接到所述发光装置（3）的第一电极（3a），并且其另一端被引出到 的基体（1）; 以及形成在所述基体（1）中的第二导电路径（L2），其一端电连接到所述发光装置（3）的第二电极（3b），并且其另一端形成在所述基体 基体（1）的表面。 第一导电路径（L1）的热阻比第二导电路径（L2）小。

公开(公告)号：US20090040224A1

公开(公告)日：2009-02-12

申请号：US12068075

申请日：2008-02-01

申请人： Takeo Igarashi ,  Yuki Mori

发明人： Takeo Igarashi ,  Yuki Mori

IPC分类号： G06T15/20

CPC分类号： G06T19/00 ,  G06T2219/021

摘要： In a computer 20 with a three-dimensional shape conversion program installed therein, a coordinate processing unit 21 obtains two-dimensional coordinate data of a contour stroke SS input through the user's operation of a mouse 50 or another suitable input unit. A 2D/3D modeling unit 22 performs two-dimensional modeling based on the obtained two-dimensional coordinate data and thereby generates two-dimensional model data regarding a two-dimensional pattern, while performing three-dimensional modeling based on the generated two-dimensional model data and generates three-dimensional model data regarding a three-dimensional shape obtained by expanding the two-dimensional pattern. A 2D model data regulator 23 adjusts the two-dimensional model data to make a corresponding contour of the three-dimensional shape defined by the three-dimensional model data substantially consistent with the input contour stroke SS.

摘要翻译： 在其中安装有三维形状转换程序的计算机20中，坐标处理单元21获得通过用户对鼠标50或另一适当输入单元的操作输入的轮廓行程SS的二维坐标数据。 2D / 3D建模单元22基于所获得的二维坐标数据执行二维建模，从而生成关于二维图案的二维模型数据，同时基于生成的二维模型进行三维建模 数据并生成关于通过扩展二维图案而获得的三维形状的三维模型数据。 2D模型数据调节器23调整二维模型数据，以使得由三维模型数据定义的三维形状的对应轮廓基本上与输入轮廓行程SS一致。

公开(公告)号：US20080112165A1

公开(公告)日：2008-05-15

申请号：US11940769

申请日：2007-11-15

申请人： Yuki MORI ,  Akira Miyake ,  Shingo Matsuura ,  Kousuke Katabe

发明人： Yuki MORI ,  Akira Miyake ,  Shingo Matsuura ,  Kousuke Katabe

IPC分类号： F21V13/04 ,  F21V7/04

CPC分类号： F21V5/007 ,  F21K9/68 ,  F21Y2105/10 ,  F21Y2115/10

摘要： A lighting apparatus includes a substrate, a plurality of light-emitting chips and a light-emitting member. The substrate has a layer including a base material and a medium. The base material is formed of an inorganic material and includes a plurality of cells. The medium is provided in the cells and has a refractive index lower than that of the inorganic material. The light-emitting chips are made of a semiconductor material and mounted on the substrate. The light-emitting member includes a fluorescent material and is provided above the light-emitting chips.

摘要翻译： 照明装置包括基板，多个发光芯片和发光部件。 基板具有包括基材和介质的层。 基材由无机材料形成，并且包括多个单元。 介质设置在电池中，折射率低于无机材料的折射率。 发光芯片由半导体材料制成并安装在基板上。 发光构件包括荧光材料，并且设置在发光芯片的上方。

公开(公告)号：US07868345B2

公开(公告)日：2011-01-11

申请号：US11718217

申请日：2005-10-27

申请人： Yuki Mori ,  Fumiaki Sekine

发明人： Yuki Mori ,  Fumiaki Sekine

IPC分类号： H01L33/00

CPC分类号： H01L33/642 ,  H01L23/055 ,  H01L23/3107 ,  H01L33/62 ,  H01L33/647 ,  H01L2224/16 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041

摘要： A light-emitting apparatus with improved dissipation efficiency of heat transmitted to a specific electrode of a light-emitting device is provided. A light-emitting device mounting substrate used for the light emitting apparatus include a base body (1) which mounts thereon a light-emitting device (3); a first electrically conductive path (L1) formed within the base body (1), one end thereof being electrically connected to a first electrode (3a) of the light-emitting device (3) and the other end thereof being led out to a surface of the base body (1); and a second electrically conductive path (L2) formed in the base body (1), one end thereof being electrically connected to a second electrode (3b) of the light-emitting device (3), and the other end thereof being formed on the surface of the base body (1). The first electrically conductive path (L1) is made smaller in thermal resistance than the second electrically conductive path (L2).

摘要翻译： 提供了一种具有改善的散热效率的发光装置，其传输到发光装置的特定电极。 用于发光装置的发光装置安装基板包括安装在其上的发光装置（3）的基体（1）。 形成在所述基体（1）内的第一导电路径（L1），其一端电连接到所述发光装置（3）的第一电极（3a），并且其另一端被引出到 的基体（1）; 以及形成在所述基体（1）中的第二导电路径（L2），其一端电连接到所述发光装置（3）的第二电极（3b），并且其另一端形成在所述基体 基体（1）的表面。 第一导电路径（L1）的热阻比第二导电路径（L2）小。

公开(公告)号：US20060203590A1

公开(公告)日：2006-09-14

申请号：US11341717

申请日：2006-01-30

申请人： Yuki Mori ,  Renichi Yamada ,  Shuichi Tsukada ,  Kiyonori Oyu

发明人： Yuki Mori ,  Renichi Yamada ,  Shuichi Tsukada ,  Kiyonori Oyu

IPC分类号： G11C7/00

CPC分类号： G11C29/50 ,  G11C11/401 ,  G11C29/50016

摘要： The present invention enables screening of the so-called variable retention time (VRT) failure, namely a retention failure occurring in a DRAM due to fluctuation of a data retention time like a random telegraph noise. A pause/refresh test for checking a data retention function is repeated at all memory cells of a chip so that memory cells at which the retention failure due to random fluctuation of the data retention capability over time may occur is subjected to screening.

摘要翻译： 本发明能够筛选所谓的可变保留时间（VRT）故障，即由于诸如随机电报噪声的数据保留时间的波动而在DRAM中发生的保留故障。 在芯片的所有存储单元上重复用于检查数据保留功能的暂停/刷新测试，使得可能发生由于数据保留能力的随机波动而发生的保留故障的存储单元被进行筛选。

公开(公告)号：US20050186407A1

公开(公告)日：2005-08-25

申请号：US11064784

申请日：2005-02-23

申请人： Yuki Mori ,  Akira Miyake

发明人： Yuki Mori ,  Akira Miyake

IPC分类号： B32B3/00 ,  H01L23/498 ,  H05K1/03 ,  H05K3/46

CPC分类号： C04B35/63 ,  B32B18/00 ,  B32B2311/04 ,  B32B2311/06 ,  B32B2311/08 ,  B32B2311/09 ,  B32B2311/12 ,  C04B35/632 ,  C04B35/634 ,  C04B2235/3206 ,  C04B2235/3217 ,  C04B2235/3222 ,  C04B2235/3231 ,  C04B2235/3244 ,  C04B2235/3418 ,  C04B2235/3463 ,  C04B2235/3481 ,  C04B2235/365 ,  C04B2235/48 ,  C04B2235/6025 ,  C04B2235/604 ,  C04B2235/96 ,  C04B2237/403 ,  C04B2237/407 ,  C04B2237/408 ,  C04B2237/62 ,  C04B2237/704 ,  H01L23/49883 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/4629 ,  H05K2201/09881 ,  Y10T428/24926 ,  H01L2924/00

摘要： In manufacturing a ceramic multi-layer wiring substrate which is formed by stacking a plurality of ceramic layers and which includes an internal wiring, a ceramic paste is printed using a screen printing process on a part of a ceramic green sheet to be a ceramic layer having the internal wiring formed thereon which part does not include the internal wiring, to form between the ceramic layers a ceramic filling layer including a same ceramic component as that in the ceramic layers which ceramic filling layer is not formed on the internal wiring. The ceramic paste includes a ceramic component, an acrylic resin, and a cellulose resin, and loss factor tan δ of the paste represented by (loss modulus)/(storage modulus) in a dry condition after printing is equal to or greater than loss factor tan δ of a conductor paste layer to be the internal wiring in a dry condition.

摘要翻译： 在制造通过堆叠多个陶瓷层并且包括内部布线形成的陶瓷多层布线基板时，通过丝网印刷方法将陶瓷浆料印刷在陶瓷生片的一部分上，作为具有 在其上形成的部分不包括内部布线的内部布线，在陶瓷层之间形成陶瓷填充层，陶瓷填充层包括与内部布线中没有形成陶瓷填充层的陶瓷层相同的陶瓷成分。 陶瓷膏包括陶瓷成分，丙烯酸树脂和纤维素树脂，印刷后的干燥条件下（损耗模量）/（储能模量）表示的糊剂的损失因子tanδ等于或大于损耗因子 导体糊层的tanδ在干燥条件下成为内部布线。