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    Method of making circuitized substrate with improved impedance control circuitry, electrical assembly and information handling system
    1.
    发明授权
    Method of making circuitized substrate with improved impedance control circuitry, electrical assembly and information handling system 失效
    具有改进的阻抗控制电路，电气组装和信息处理系统的电路化衬底的方法

    公开(公告)号：US07589283B2

    公开(公告)日：2009-09-15

    申请号：US11889668

    申请日：2007-08-15

    申请人： Charles E. Danoski ,  Irving Memis ,  Steven G. Rosser

    发明人： Charles E. Danoski ,  Irving Memis ,  Steven G. Rosser

    IPC分类号： H05K1/16

    CPC分类号： H01L23/66 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K1/0298 ,  H05K1/112 ,  H05K2201/093 ,  H05K2201/09627 ,  H05K2201/09663 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155

    摘要： A method of making a circuitized substrate designed to substantially eliminate impedance disruptions during passage of signals through signal lines of the substrate's circuitry. The produced substrate includes a first conductive layer with a plurality of conductors on which an electrical component may be positioned and electrically coupled. The pads are coupled to signal lines (e.g., using thru-holes) further within the substrate and these signal lines are further coupled to a second plurality of conductive pads located even further within the substrate. The signal lines are positioned so as to lie between the substrate's first conductive layer and a voltage plane within a third conductive layer below the second conductive layer including the signal lines. A second voltage plane may be used adjacent the first voltage plane of the third conductive layer. Thru-holes may also be used to couple the signal lines coupled to the first conductors to a second plurality of conductors which form part of the third conductive layer. An electrical assembly and information handling system (e.g., computer) utilizing the substrate are also disclosed.

    摘要翻译： 制造电路化衬底的方法被设计为基本上消除信号通过衬底电路的信号线时的阻抗中断。 所生产的衬底包括具有多个导体的第一导电层，电组件可在其上定位并电耦合。 这些焊盘在衬底内进一步耦合到信号线（例如，使用通孔），并且这些信号线还被进一步耦合到位于衬底内的另外多个导电衬垫。 信号线被定位成位于衬底的第一导电层和位于包括信号线的第二导电层下面的第三导电层内的电压平面之间。 可以在第三导电层的第一电压平面附近使用第二电压平面。 通孔也可用于将耦合到第一导体的信号线耦合到形成第三导电层的一部分的第二多个导体。 还公开了利用该基板的电组件和信息处理系统（例如，计算机）。

    Circuitized substrate with improved impedance control circuitry, method of making same, electrical assembly and information handling system utilizing same
    2.
    发明授权
    Circuitized substrate with improved impedance control circuitry, method of making same, electrical assembly and information handling system utilizing same 有权
    具有改进的阻抗控制电路的电路化衬底，其制造方法，使用其的电组件和信息处理系统

    公开(公告)号：US07294791B2

    公开(公告)日：2007-11-13

    申请号：US10953923

    申请日：2004-09-29

    申请人： Charles E. Danoski ,  Irving Memis ,  Steven G. Rosser

    发明人： Charles E. Danoski ,  Irving Memis ,  Steven G. Rosser

    IPC分类号： H01R12/04 ,  H05K1/11

    CPC分类号： H01L23/66 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K1/0298 ,  H05K1/112 ,  H05K2201/093 ,  H05K2201/09627 ,  H05K2201/09663 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155

    摘要： A circuitized substrate designed to substantially eliminate impedance disruptions during passage of signals through signal lines of the substrate's circuitry. The substrate includes a first conductive layer with a plurality of conductors on which an electrical component may be positioned and electrically coupled. The pads are coupled to signal lines (e.g., using thru-holes) further within the substrate and these signal lines are further coupled to a second plurality of conductive pads located even further within the substrate. The signal lines are positioned so as to lie between the substrate's first conductive layer and a voltage plane within a third conductive layer below the second conductive layer including the signal lines. A second voltage plane may be used adjacent the first voltage plane of the third conductive layer. Thru-holes may also be used to couple the signal lines coupled to the first conductors to a second plurality of conductors which form part of the third conductive layer. A method of making the substrate, and an electrical assembly and information handling system (e.g., computer) utilizing the substrate are also disclosed.

    摘要翻译： 电路化基板被设计为基本上消除信号通过基板电路的信号线时的阻抗中断。 衬底包括具有多个导体的第一导电层，电组件可以在其上定位和电耦合。 这些焊盘在衬底内进一步耦合到信号线（例如，使用通孔），并且这些信号线还被进一步耦合到位于衬底内的另外多个导电衬垫。 信号线被定位成位于衬底的第一导电层和位于包括信号线的第二导电层下面的第三导电层内的电压平面之间。 可以在第三导电层的第一电压平面附近使用第二电压平面。 通孔也可用于将耦合到第一导体的信号线耦合到形成第三导电层的一部分的第二多个导体。 还公开了制造衬底的方法，以及利用衬底的电组件和信息处理系统（例如，计算机）。

    Vents with signal image for signal return path
    9.
    发明授权
    Vents with signal image for signal return path 有权
    具有信号图像的通风口用于信号返回路径

    公开(公告)号：US07351917B2

    公开(公告)日：2008-04-01

    申请号：US11251745

    申请日：2005-10-17

    申请人： Timothy W. Budell ,  Thomas P. Comino ,  Todd W. Davies ,  Ross W. Keesler ,  Steven G. Rosser ,  David B. Stone

    发明人： Timothy W. Budell ,  Thomas P. Comino ,  Todd W. Davies ,  Ross W. Keesler ,  Steven G. Rosser ,  David B. Stone

    IPC分类号： H01R12/04 ,  H05K1/11

    CPC分类号： H05K1/0224 ,  H05K1/0253 ,  H05K2201/0715 ,  H05K2201/093 ,  H05K2201/09672 ,  H05K2201/09681 ,  H05K2201/0969 ,  H05K2203/1178 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

    摘要： A method, structure, and method of design relating an electrical structure that includes a metal voltage plane laminated to a dielectric substrate. A determination is made as to where to place an opening for venting gases generated during fabrication of the dielectric laminate. An identification is made of a problematic opening in the metal voltage plane that is above or below a corresponding metal signal line within the dielectric laminate, such that an image of a portion of the corresponding metal signal line projects across the problematic opening. An electrically conductive strip is positioned across the problematic opening, such that the strip includes the image. In fabrication, the dielectric substrate having the metal signal line therein is provided. The metal voltage plane is laminated to the dielectric substrate. The opening in the metal voltage plane is formed such that the strip is across the opening and includes the image.

    摘要翻译： 一种设计的方法，结构和方法，涉及包括层叠在电介质基板上的金属电压平面的电结构。 确定在电介质层压板的制造过程中产生的排出气体的位置在何处放置。 识别金属电压平面中的有问题的开口，其高于或低于介电层压板内的对应金属信号线，使得相应的金属信号线的一部分的图像跨越有问题的开口突出。 导电条被放置在有问题的开口处，使得条带包括图像。 在制造中，提供其中具有金属信号线的电介质基片。 金属电压平面层压到电介质基片上。 金属电压平面中的开口形成为使得条带穿过开口并且包括图像。

    Vents with signal image for signal return path
    10.
    发明授权
    Vents with signal image for signal return path 失效
    具有信号图像的通风口用于信号返回路径

    公开(公告)号：US06977345B2

    公开(公告)日：2005-12-20

    申请号：US10042031

    申请日：2002-01-08

    申请人： Timothy W. Budell ,  Thomas P. Comino ,  Todd W. Davies ,  Ross W. Keesler ,  Steven G. Rosser ,  David B. Stone

    发明人： Timothy W. Budell ,  Thomas P. Comino ,  Todd W. Davies ,  Ross W. Keesler ,  Steven G. Rosser ,  David B. Stone

    IPC分类号： H05K1/02 ,  H05K1/00

    CPC分类号： H05K1/0224 ,  H05K1/0253 ,  H05K2201/0715 ,  H05K2201/093 ,  H05K2201/09672 ,  H05K2201/09681 ,  H05K2201/0969 ,  H05K2203/1178 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

    摘要： A method, structure, and method of design relating an electrical structure that includes a metal voltage plane laminated to a dielectric substrate. A determination is made as to where to place an opening for venting gases generated during fabrication of the dielectric laminate. An identification is made of a problematic opening in the metal voltage plane that is above or below a corresponding metal signal line within the dielectric laminate, such that an image of a portion of the corresponding metal signal line projects across the problematic opening. An electrically conductive strip is positioned across the problematic opening, such that the strip includes the image. In fabrication, the dielectric substrate having the metal signal line therein is provided. The metal voltage plane is laminated to the dielectric substrate. The opening in the metal voltage plane is formed such that the strip is across the opening and includes the image.

    摘要翻译： 一种设计的方法，结构和方法，涉及包括层叠在电介质基板上的金属电压平面的电结构。 确定在电介质层压板的制造过程中产生的排出气体的位置在何处放置。 识别金属电压平面中的有问题的开口，其高于或低于介电层压板内的对应金属信号线，使得相应的金属信号线的一部分的图像跨越有问题的开口突出。 导电条被放置在有问题的开口处，使得条带包括图像。 在制造中，提供其中具有金属信号线的电介质基片。 金属电压平面层压到电介质基片上。 金属电压平面中的开口形成为使得条带穿过开口并且包括图像。