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    High temperature superconductor/diamond composite article, and method of making the same
    1.
    发明授权
    High temperature superconductor/diamond composite article, and method of making the same 失效
    高温超导体/金刚石复合制品及其制造方法

    公开(公告)号：US5122509A

    公开(公告)日：1992-06-16

    申请号：US516156

    申请日：1990-04-30

    申请人： Charles P. Beetz, Jr. ,  Peter S. Kirlin

    发明人： Charles P. Beetz, Jr. ,  Peter S. Kirlin

    IPC分类号： H01L39/24

    CPC分类号： H01L39/2461 ,  Y10S428/93 ,  Y10S505/701 ,  Y10S505/702 ,  Y10S505/703 ,  Y10S505/704 ,  Y10T428/30 ,  Y10T428/31504 ,  Y10T428/31678

    摘要： A multilayer superconducting thin film composite article, comprising a carbon-containing substrate, and an interlayer comprising a material selected from the group consisting of zirconium, yttrium, niobium, and carbides and oxides thereof, platinum, iridium, gold, palladium, and silver, and an overlayer comprising an HTSC material. The carbon-containing substrate preferably comprises diamond and the interlayer preferably comprises a zirconium carbide sub-layer at the interface with the substrate, an intermediate sub-layer of zirconium metal, and an outer sub-layer of zirconium oxide at the interface with the HTSC material overlayer. The superconducting thin film material may comprise a copper oxide HTSC material, with YBaCuO, TlBaCaCuO, and BiSrCaCuO HTSC materials being preferred. The interlayer accommodates formation of the superconducting film in an oxic environment at elevated temperature without destruction of the substrate, while at the same time protecting the HTSC material in the overlayer from deleterious reaction with the substrate which otherwise may cause the HTSC material or precursor thereof to be highly resistive, i.e., non-superconducting, in character. The invention thus permits the fabrication of devices incorporating HTSC films with carbon-containing substrates such as diamond, including high operating temperature bolometers, and high power, high speed switching devices.

    摘要翻译： 一种多层超导薄膜复合制品，包括含碳基底和包含选自锆，钇，铌及其碳化物及其氧化物，铂，铱，金，钯和银的材料的中间层， 以及包括HTSC材料的覆盖层。 含碳基板优选地包括金刚石，并且中间层优选地包括与基板的界面处的碳化锆子层，锆金属的中间子层和在与HTSC的界面处的氧化锆的外部子层 材料覆盖层 超导薄膜材料可以包含氧化铜HTSC材料，优选YBaCuO，TlBaCaCuO和BiSrCaCuO HTSC材料。 中间层可以在氧化环境中在升高的温度环境中形成超导膜而不损坏衬底，同时保护覆盖层中的HTSC材料免受与衬底的有害反应，否则可能导致HTSC材料或其前体 具有高电阻性，即非超导性。 因此，本发明允许制造包含HTSC膜的装置，其中包含诸如金刚石等含碳基板，包括高工作温度测辐射热计和大功率高速开关装置。

    Magnetic memory having shape anisotropic magnetic elements
    2.
    发明授权
    Magnetic memory having shape anisotropic magnetic elements 失效
    具有形状各向异性磁性元件的磁记忆体

    公开(公告)号：US5741435A

    公开(公告)日：1998-04-21

    申请号：US512555

    申请日：1995-08-08

    申请人： Charles P. Beetz, Jr. ,  John Steinbeck ,  Robert W. Boerstler ,  David R. Winn

    发明人： Charles P. Beetz, Jr. ,  John Steinbeck ,  Robert W. Boerstler ,  David R. Winn

    IPC分类号： G11C11/14 ,  H01F1/00 ,  H01F1/03 ,  B41B27/10 ,  G11C11/414 ,  H01L21/8229 ,  H01L21/8239

    CPC分类号： B82Y25/00 ,  G11C11/14 ,  H01F1/0063 ,  H01F1/0306 ,  Y10S428/90 ,  Y10T428/12465 ,  Y10T428/12951

    摘要： A static magnetic memory includes a layer having a plurality of vertically oriented and shape-anisotropic elongated ferromagnetic particles. A plurality of writing conductors are adjacent the layer, and the conductors selectively apply magnetic fields to selected regions of the layer by directing electrical current to magnetize the particles in an up or down direction. Static reading means detect the direction of magnetization. The particles may include a soft magnet portion and a hard magnet portion. In another preferred embodiment, a material and a method of making same includes providing a matrix full of elongated holes, depositing a first magnetic material having a first coercivity into the holes, and then depositing a second magnetic material having a second coercivity into the holes to form a composite elongated particle in each hole.

    摘要翻译： 静磁存储器包括具有多个垂直取向和形状各向异性的细长铁磁颗粒的层。 多个写入导体与层相邻，并且导体通过引导电流在上或下方向上磁化颗粒而选择性地将磁场施加到层的选定区域。 静态读数意味着检测磁化方向。 颗粒可以包括软磁体部分和硬磁体部分。 在另一优选实施例中，材料及其制造方法包括提供充满细长孔的矩阵，将具有第一矫顽力的第一磁性材料沉积到孔中，然后将具有第二矫顽力的第二磁性材料沉积到孔中 在每个孔中形成复合细长颗粒。

    Method of making single crystal semiconductor substrate articles and semiconductor device
    4.
    发明授权
    Method of making single crystal semiconductor substrate articles and semiconductor device 失效
    制造单晶半导体衬底制品和半导体器件的方法

    公开(公告)号：US5030583A

    公开(公告)日：1991-07-09

    申请号：US607568

    申请日：1990-11-01

    申请人： Charles P. Beetz, Jr.

    发明人： Charles P. Beetz, Jr.

    IPC分类号： C30B25/02 ,  H01L21/20 ,  H01L21/205 ,  H01L21/308 ,  H01L21/36 ,  H01L29/16 ,  H01L29/24 ,  H01L29/812

    CPC分类号： H01L29/1602 ,  C30B25/02 ,  C30B29/04 ,  H01L21/02376 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02521 ,  H01L21/02527 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/3081 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/24 ,  H01L29/8126 ,  Y10S117/913 ,  Y10S148/105 ,  Y10S148/135 ,  Y10S148/14 ,  Y10S438/964 ,  Y10S438/974

    摘要： A textured substrate is disclosed which is amenable to deposition thereon of epitaxial single crystal films of materials such as diamond, cubic boron nitride, boron phosphide, beta-silicon carbide, and gallium nitride. The textured substrate comprises a base having a generally planar main top surface from which upwardly extends a regular array of posts, the base being formed of single crystal material which is crystallographically compatible with epitaxial single crystal materials to be deposited thereon. The single crystal epitaxial layers are formed on top surfaces of the posts which preferably have a quardrilateral cross-section, e.g., a square cross-section whose sides are from about 0.5 to about 20 micrometers in length, to accommodate the formation of substantially defect-free, single crystal epitaxial layers thereon. The single crystal epitaxial layer may be selectively doped to provide for p-type and p.sup.+ doped regions thereof, to accommodate fabrication of semiconductor devices such as field effect transistors.

    摘要翻译： 公开了一种纹理化的衬底，其适于在其上沉积诸如金刚石，立方氮化硼，磷化硼，β-碳化硅和氮化镓的材料的外延单晶膜。 纹理化衬底包括具有大致平坦的主顶表面的基座，从该顶部表面向上延伸规则的柱阵列，该基底由与要沉积在其上的外延单晶材料晶体学兼容的单晶材料形成。 单晶外延层形成在柱的顶表面上，其优选地具有侧面横截面，例如其侧面的长度为约0.5至约20微米的正方形横截面，以适应基本缺陷的形成， 自由的单晶外延层。 可以选择性地掺杂单晶外延层以提供其p型和p +掺杂区域，以适应诸如场效应晶体管的半导体器件的制造。

    Micro-dynode integrated electron multiplier
    5.
    发明授权
    Micro-dynode integrated electron multiplier 失效
    微倍增极集成电子倍增器

    公开(公告)号：US06384519B1

    公开(公告)日：2002-05-07

    申请号：US08960759

    申请日：1997-10-30

    申请人： Charles P. Beetz, Jr. ,  John Steinbeck ,  Robert W. Boertsler ,  David R. Winn

    发明人： Charles P. Beetz, Jr. ,  John Steinbeck ,  Robert W. Boertsler ,  David R. Winn

    IPC分类号： H01J4320

    CPC分类号： H01J43/246 ,  H01J43/22

    摘要： A microdynode electron multiplier provides numerous microchannels extending parallel to one another through a layered structure incorporating insulating spacer layers and dynode layers which either incorporate a conductive electrode layer or are contiguous with a conductive electrode layer. The dynode layers include materials with high electron emissivity. The dynode layers can be biased to different electrical potentials to provide a potential gradient along the length of each microchannel. Multi-stage electron multiplication provides high gain. The device desirably is formed as a monolithic, sealed structure with a cathode structure such as a photocathode and an anode structure. The device can provide a multi pixel imaging device of extremely high sensitivity and resolution.

    摘要翻译： 微型电子电子倍增器通过结合有绝缘间隔层和倍增极层的分层结构彼此平行延伸，提供了许多微通道，其中结合有导电电极层或与导电电极层邻接。 倍增极层包括具有高电子发射率的材料。 倍增极层可以被偏置到不同的电势以沿着每个微通道的长度提供电位梯度。 多级电子倍增提供高增益。 该装置理想地形成为具有诸如光电阴极和阳极结构的阴极结构的整体式密封结构。 该器件可以提供极高灵敏度和分辨率的多像素成像设备。

    N-type semiconducting diamond, and method of making the same
    6.
    发明授权
    N-type semiconducting diamond, and method of making the same 失效
    N型半导体金刚石及其制造方法

    公开(公告)号：US5051785A

    公开(公告)日：1991-09-24

    申请号：US369763

    申请日：1989-06-22

    申请人： Charles P. Beetz, Jr. ,  Douglas C. Gordon ,  Duncan W. Brown

    发明人： Charles P. Beetz, Jr. ,  Douglas C. Gordon ,  Duncan W. Brown

    IPC分类号： C30B25/02 ,  H01L21/205 ,  H01L29/16 ,  H01L29/167 ,  H01L33/00 ,  H01L33/34

    CPC分类号： H01L33/343 ,  C30B25/02 ,  C30B29/04 ,  H01L21/0237 ,  H01L21/02527 ,  H01L21/02576 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/1602 ,  H01L29/167 ,  H01L33/0054

    摘要： N-type semiconducting diamond is disclosed, which is intrinsically, i.e., at the time of diamond formation, doped with n-type dopant atoms. Such diamond is advantageously formed by chemical vapor deposition from a source gas mixture comprising a carbon source compound for the diamond, and a volatile precursor compound for the n-type impurity species, so that the n-type impurity atoms are doped in the diamond film in situ during its formation. By such in situ formation technique, shallow n-type impurity atoms, e.g., lithium, arsenic, phosphorous, scandium, antimony, bismuth, and the like, may be incorporated into the crystal lattice in a uniform manner, and without the occurrence of gross lattice asperities and other lattice damage artifacts which result from ion implanation techniques. A corresponding chemical vapor deposition method of forming the n-type semiconducting diamond is disclosed. The n-type semiconducting diamond of the invention may be usefully employed in the formation of diamond-based transistor devices comprising pn diamond junctions, and in other microelectronic device applications.

    摘要翻译： 公开了N型半导体金刚石，其固有地，即在金刚石形成时，掺杂有n型掺杂剂原子。 这种金刚石有利地通过来自包含用于金刚石的碳源化合物的源气体混合物和用于n型杂质物质的挥发性前体化合物的源气体混合物的化学气相沉积形成，使得n型杂质原子掺杂在金刚石膜 在其形成期间的原位。 通过这种原位形成技术，可以以均匀的方式将浅的n型杂质原子，例如锂，砷，磷，钪，锑，铋等掺入晶格中，而不会发生粗 晶格粗糙度和离子注入技术产生的其他晶格损伤伪像。 公开了形成n型半导体金刚石的相应的化学气相沉积方法。 本发明的n型半导体金刚石可有效地用于形成包括pn金刚石结的金刚石基晶体管器件和其它微电子器件应用中。

    Single crystal semiconductor substrate articles and semiconductor devices comprising same
    7.
    发明授权
    Single crystal semiconductor substrate articles and semiconductor devices comprising same 失效
    单晶半导体衬底制品和包括其的半导体器件

    公开(公告)号：US5006914A

    公开(公告)日：1991-04-09

    申请号：US278964

    申请日：1988-12-02

    申请人： Charles P. Beetz, Jr.

    发明人： Charles P. Beetz, Jr.

    IPC分类号： C30B25/02 ,  H01L21/20 ,  H01L21/205 ,  H01L21/308 ,  H01L21/36 ,  H01L29/16 ,  H01L29/24 ,  H01L29/812

    CPC分类号： H01L29/1602 ,  C30B25/02 ,  C30B29/04 ,  H01L21/02376 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02521 ,  H01L21/02527 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/3081 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/24 ,  H01L29/8126

    摘要： A textured substrate is disclosed which is amenable to deposition thereon of epitaxial single crystal films of materials such as diamond, cubic boron nitride, boron phosphide, beta-silicon carbide, and gallium nitride. The textured substrate comprises a base having a generally planar main top surface from which upwardly extends a regular array of posts, the base being formed of single crystal material which is crystallographically compatible with epitaxial single crystal materials to be deposited thereon. The single crystal epitaxial layers are formed on top surfaces of the posts which preferably have a quadrilateral cross-section, e.g., a square cross-section whose sides are from about 0.5 to about 20 micrometers in length, to accommodate the formation of substantially defect-free, single crystal epitaxial layers thereon. The single crystal epitaxial layer may be selectively doped to provide for p-type and p.sup.+ doped regions thereof, to accommodate fabrication of semiconductor devices such as field effect transistors.

    摘要翻译： 公开了一种纹理化的衬底，其适于在其上沉积诸如金刚石，立方氮化硼，磷化硼，β-碳化硅和氮化镓的材料的外延单晶膜。 纹理化衬底包括具有大致平坦的主顶表面的基座，从该顶部表面向上延伸规则的柱阵列，该基底由与要沉积在其上的外延单晶材料晶体学兼容的单晶材料形成。 单晶外延层形成在柱的顶表面上，其优选地具有四边形横截面，例如其长度为约0.5至约20微米的正方形横截面，以适应基本缺陷的形成， 自由的单晶外延层。 可以选择性地掺杂单晶外延层以提供其p型和p +掺杂区域，以适应诸如场效应晶体管的半导体器件的制造。

    Process for producing macroscopic cavities beneath the surface of a silicon wafer
    8.
    发明授权
    Process for producing macroscopic cavities beneath the surface of a silicon wafer 失效
    用于在硅晶片表面下方产生宏观空腔的方法

    公开(公告)号：US06750153B2

    公开(公告)日：2004-06-15

    申请号：US10001358

    申请日：2001-10-24

    申请人： Charles P. Beetz, Jr. ,  Robert W. Boerstler

    发明人： Charles P. Beetz, Jr. ,  Robert W. Boerstler

    IPC分类号： H01L21302

    CPC分类号： H01L21/3063 ,  H01L21/308

    摘要： A silicon element having macrocavities beneath its exterior surface is fabricated by electrochemical etching of a p-type silicon wafer. Etching at a high current density results in the formation of deep macrocavities overhung by a layer of crystalline silicon. The process works with both aqueous and non-aqueous electrolytes.

    摘要翻译： 通过p型硅晶片的电化学蚀刻来制造在其外表面下方具有宏观腔的硅元件。 在高电流密度下进行蚀刻可形成由一层晶体硅覆盖的深宏观形状。 该方法与水性和非水电解质一起使用。