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1.发明授权Unique feature design enabling structural integrity for advanced low K semiconductor chips 有权独特的功能设计使得先进的低K半导体芯片具有结构完整性公开(公告)号：US06650010B2
公开(公告)日：2003-11-18
申请号：US10078174
申请日：2002-02-15
IPC分类号： H01L2312
CPC分类号： H01L22/32 , H01L23/5226 , H01L23/5329 , H01L24/05 , H01L2224/0401 , H01L2224/04042 , H01L2224/05096 , H01L2224/05554 , H01L2224/06131 , H01L2224/06155 , H01L2924/12044
摘要： A mesh-like reinforcing structure to inhibit delamination and cracking is fabricated in a multilayer semiconductor device using low-k dielectric materials and copper-based metallurgy. The mesh-like interconnection structure comprises conductive pads interconnected by conductive lines at each wiring level with each pad conductively connected to its adjacent pad at the next wiring level by a plurality of conductive vias. The conductive pads, lines and vias are fabricated during the normal BEOL wiring level integration process. The reinforcing structure provides both vertical and horizontal reinforcement and may be fabricated on the periphery of the active device region or within open regions of the device that are susceptible to delamination and cracking.
摘要翻译： 在使用低k介电材料和铜基冶金的多层半导体器件中制造用于抑制分层和破裂的网状增强结构。 网状互连结构包括在每个布线层处由导线互连的导电焊盘，每个焊盘通过多个导电通孔在下一个布线电平下与其相邻的焊盘导电连接。 导电焊盘，线路和通孔在正常的BEOL布线级整合过程中制造。 加强结构提供垂直和水平加强件，并且可以在活动装置区域的周边或在易于分层和破裂的装置的开放区域内制造。
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2.发明授权Unique feature design enabling structural integrity for advanced low k semiconductor chips 有权独特的功能设计使先进的低k半导体芯片具有结构完整性公开(公告)号：US06815346B2
公开(公告)日：2004-11-09
申请号：US10437208
申请日：2003-05-13
IPC分类号： H01L2144
CPC分类号： H01L22/32 , H01L23/5226 , H01L23/5329 , H01L24/05 , H01L2224/0401 , H01L2224/04042 , H01L2224/05096 , H01L2224/05554 , H01L2224/06131 , H01L2224/06155 , H01L2924/12044
摘要： A mesh-like reinforcing structure to inhibit delamination and cracking is fabricated in a multilayer semiconductor device using low-k dielectric materials and copper-based metallurgy. The mesh-like interconnection structure comprises conductive pads interconnected by conductive lines at each wiring level with each pad conductively connected to its adjacent pad at the next wiring level by a plurality of conductive vias. The conductive pads, lines and vias are fabricated during the normal BEOL wiring level integration process. The reinforcing structure provides both vertical and horizontal reinforcement and may be fabricated on the periphery of the active device region or within open regions of the device that are susceptible to delamination and cracking.
摘要翻译： 在使用低k介电材料和铜基冶金的多层半导体器件中制造用于抑制分层和破裂的网状增强结构。 网状互连结构包括在每个布线层处由导线互连的导电焊盘，每个焊盘通过多个导电通孔在下一个布线电平下与其相邻的焊盘导电连接。 导电焊盘，线路和通孔在正常的BEOL布线级整合过程中制造。 加强结构提供垂直和水平加强件，并且可以在活动装置区域的周边或在易于分层和破裂的装置的开放区域内制造。
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公开(公告)号：US07678673B2
公开(公告)日：2010-03-16
申请号：US11832368
申请日：2007-08-01
申请人： Elbert Huang , William F. Landers , Michael Lane , Eric G. Liniger , Xiao H. Liu , David L. Questad , Thomas M. Shaw
发明人： Elbert Huang , William F. Landers , Michael Lane , Eric G. Liniger , Xiao H. Liu , David L. Questad , Thomas M. Shaw
CPC分类号： H01L21/78 , H01L23/562 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method of strengthening a structure, to heal the imperfection of the structure, to reinforce the structure, and thus strengthening the dielectric without compromising the desirable low dielectric constant of the structure. The inventive method includes the steps of providing a semiconductor structure having at least one interconnect structure; dicing the interconnect structure; applying at least one infiltrant into the interconnect structure; and infiltrating the infiltrant to infiltrate into the interconnect structure.
摘要翻译： 本发明提供了一种加强结构的方法，以治愈结构的缺陷，加强结构，从而加强电介质，而不影响结构的理想的低介电常数。 本发明的方法包括提供具有至少一个互连结构的半导体结构的步骤; 切割互连结构; 将至少一个渗透剂施加到所述互连结构中; 并渗透渗透剂渗透到互连结构中。
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公开(公告)号：US20090035480A1
公开(公告)日：2009-02-05
申请号：US11832368
申请日：2007-08-01
申请人： Elbert Huang , William F. Landers , Michael Lane , Eric G. Liniger , Xiao H. Liu , David L. Questad , Thomas M. Shaw
发明人： Elbert Huang , William F. Landers , Michael Lane , Eric G. Liniger , Xiao H. Liu , David L. Questad , Thomas M. Shaw
CPC分类号： H01L21/78 , H01L23/562 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method of strengthening a structure, to heal the imperfection of the structure, to reinforce the structure, and thus strengthening the dielectric without compromising the desirable low dielectric constant of the structure. The inventive method includes the steps of providing a semiconductor structure having at least one interconnect structure; dicing the interconnect structure; applying at least one infiltrant into the interconnect structure; and infiltrating the infiltrant to infiltrate into the interconnect structure.
摘要翻译： 本发明提供了一种加强结构的方法，以治愈结构的缺陷，加强结构，从而加强电介质，而不影响结构的理想的低介电常数。 本发明的方法包括提供具有至少一个互连结构的半导体结构的步骤; 切割互连结构; 将至少一个渗透剂施加到所述互连结构中; 并渗透渗透剂渗透到互连结构中。
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5.发明授权Multi-functional structure for enhanced chip manufacturibility and reliability for low k dielectrics semiconductors and a crackstop integrity screen and monitor 失效多功能结构，用于增强低k电介质半导体的芯片制造和可靠性，以及裂纹完整性屏幕和监视器公开(公告)号：US07098676B2
公开(公告)日：2006-08-29
申请号：US10338931
申请日：2003-01-08
申请人： William F. Landers , Thomas M. Shaw , Diana Llera-Hurlburt , Scott W. Crowder , Vincent J. McGahay , Sandra G. Malhotra , Charles R. Davis , Ronald D. Goldblatt , Brett H. Engel
发明人： William F. Landers , Thomas M. Shaw , Diana Llera-Hurlburt , Scott W. Crowder , Vincent J. McGahay , Sandra G. Malhotra , Charles R. Davis , Ronald D. Goldblatt , Brett H. Engel
CPC分类号： H01L23/585 , H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： An on-chip redundant crack termination barrier structure, or crackstop, provides a barrier for preventing defects, cracks, delaminations, and moisture/oxidation contaminants from reaching active circuit regions. Conductive materials in the barrier structure design permits wiring the barriers out to contact pads and device pins for coupling a monitor device to the chip for monitoring barrier integrity.
摘要翻译： 片上冗余裂纹终止阻挡结构或裂缝挡板为防止缺陷，裂纹，脱层和水分/氧化污染物到达有源电路区域提供了屏障。 阻挡结构设计中的导电材料允许将屏障布线到接触垫和器件引脚上，用于将监测器件耦合到芯片以监测屏障完整性。
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公开(公告)号：US07294565B2
公开(公告)日：2007-11-13
申请号：US10676172
申请日：2003-10-01
申请人： Lloyd G. Burrell , Charles R. Davis , Ronald D. Goldblatt , William F. Landers , Sanjay C. Mehta
发明人： Lloyd G. Burrell , Charles R. Davis , Ronald D. Goldblatt , William F. Landers , Sanjay C. Mehta
CPC分类号： H01L24/05 , H01L23/3192 , H01L23/53223 , H01L24/03 , H01L2224/04042 , H01L2224/0501 , H01L2224/05022 , H01L2224/05082 , H01L2224/05124 , H01L2224/05155 , H01L2224/05644 , H01L2224/45124 , H01L2224/48744 , H01L2924/00014 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/48
摘要： A method for sealing an exposed surface of a wire bond pad with a material that is capable of preventing a possible chemical attack during electroless deposition of Ni/Au pad metallurgy is provided. Specifically, the present invention provides a method whereby a TiN/Ti or TiN/Al cap is used as a protective coating covering exposed surfaces of a wire bond pad. The TiN/Ti or TiN/Al cap is not affected by alkaline chemistries used in forming the Ni/Au metallization, yet it provides a sufficient electrical pathway connecting the bond pads to the Ni/Au pad metallization.
摘要翻译： 提供了一种通过能够防止在Ni / Au焊盘冶金的无电沉积期间可能的化学侵蚀的材料来密封引线接合焊盘的暴露表面的方法。 具体地说，本发明提供了一种TiN / Ti或TiN / Al帽作为覆盖引线接合焊盘露出表面的保护涂层的方法。 TiN / Ti或TiN / Al帽不受用于形成Ni / Au金属化的碱性化学物质的影响，但它提供了将接合焊盘连接到Ni / Au焊盘金属化的足够的电通路。
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公开(公告)号：US08546961B2
公开(公告)日：2013-10-01
申请号：US12987202
申请日：2011-01-10
申请人： Mukta G. Farooq , Troy L. Graves-Abe , Robert Hannon , Emily R. Kinser , William F. Landers , Kevin S. Petrarca , Richard P. Volant , Kevin R. Winstel
发明人： Mukta G. Farooq , Troy L. Graves-Abe , Robert Hannon , Emily R. Kinser , William F. Landers , Kevin S. Petrarca , Richard P. Volant , Kevin R. Winstel
IPC分类号： H01L23/544 , H01L21/02
CPC分类号： H01L21/76898 , H01L21/8221 , H01L23/544 , H01L24/83 , H01L24/92 , H01L24/94 , H01L25/0657 , H01L2223/54426 , H01L2224/29187 , H01L2224/2919 , H01L2224/32145 , H01L2224/8385 , H01L2224/83896 , H01L2224/9202 , H01L2224/94 , H01L2225/06541 , H01L2225/06593 , H01L2924/14 , H01L2924/1431 , H01L2924/1434 , H01L2924/1436 , H01L2224/83
摘要： Disclosed are a structure including alignment marks and a method of forming alignment marks in three dimensional (3D) structures. The method includes forming apertures in a first surface of a first semiconductor substrate; joining the first surface of the first semiconductor substrate to a first surface of a second semiconductor substrate; thinning the first semiconductor on a second surface of the first semiconductor substrate to provide optical contrast between the apertures and the first semiconductor substrate; and aligning a feature on the second surface of the first semiconductor substrate using the apertures as at least one alignment mark.
摘要翻译： 公开了包括对准标记的结构和在三维（3D）结构中形成对准标记的方法）。 该方法包括在第一半导体衬底的第一表面中形成孔; 将第一半导体衬底的第一表面接合到第二半导体衬底的第一表面; 在第一半导体衬底的第二表面上使第一半导体薄化以提供孔和第一半导体衬底之间的光学对比度; 以及使用所述孔将所述第一半导体衬底的所述第二表面上的特征对准为至少一个对准标记。
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8.发明授权Method for fabricating last level copper-to-C4 connection with interfacial cap structure 有权用于制造具有界面盖结构的最后一级铜对C4连接的方法公开(公告)号：US07863183B2
公开(公告)日：2011-01-04
申请号：US11306983
申请日：2006-01-18
IPC分类号： H01L21/4763
CPC分类号： H01L21/288 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05147 , H01L2224/05575 , H01L2224/05599 , H01L2224/1148 , H01L2224/13007 , H01L2224/13022 , H01L2224/13111 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/01015
摘要： The present invention relates to a method for fabricating a semiconductor device with a last level copper-to-C4 connection that is essentially free of aluminum. Specifically, the last level copper-to-C4 connection comprises an interfacial cap structure containing CoWP, NiMoP, NiMoB, NiReP, NiWP, and combinations thereof. Preferably, the interfacial cap structure comprises at least one CoWP layer. Such a CoWP layer can be readily formed over a last level copper interconnect by a selective electroless plating process.
摘要翻译： 本发明涉及一种用于制造具有基本上不含铝的最后一级铜对C4连接的半导体器件的方法。 具体地说，最后一级的铜对C4连接包括含有CoWP，NiMoP，NiMoB，NiReP，NiWP及其组合的界面盖结构。 优选地，界面帽结构包括至少一个CoWP层。 这种CoWP层可以通过选择性无电镀方法容易地在最后一级铜互连上形成。
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公开(公告)号：US06296717B1
公开(公告)日：2001-10-02
申请号：US09330657
申请日：1999-06-11
IPC分类号： C23G136
CPC分类号： B24B37/042 , H01L21/30625
摘要： An in-situ method for regenerating a chemical-mechanical polishing pad which includes the steps of: forming the polishing pad by dispensing liquid moldable material, such as wax, polymers or water, on a polishing surface and solidifying the liquid material by reducing the temperature, allowing the moldable material to harden; distributing slurry material on the polishing pad; polishing the surface of a semiconductor wafer with a combination of the slurry material and the polishing pad; and regenerating in-situ the polishing pad. This method quickly, easily and repeatably, resurfaces and refreshes the surface on which the a semiconductor wafer is polished. The polishing pad may also include abrasives embedded therein to enhance its polishing capabilities.
摘要翻译： 一种用于再生化学机械抛光垫的原位方法，其包括以下步骤：通过在抛光表面上分配液体可模制材料（例如蜡，聚合物或水）形成抛光垫，并通过降低温度来固化液体材料 ，使可模塑材料硬化; 在抛光垫上分配浆料; 用浆料和抛光垫的组合抛光半导体晶片的表面; 并原位再生抛光垫。 该方法快速，容易和重复地重现和刷新其上抛光半导体晶片的表面。 抛光垫还可以包括嵌入其中的磨料以增强其抛光能力。
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10.发明授权Apparatus and method for controlling polishing of integrated circuit substrates 有权用于控制集成电路基板的抛光的装置和方法
公开(公告)号：US6102776A
公开(公告)日：2000-08-15
申请号：US225597
申请日：1999-01-06
申请人： Karl E. Boggs , Kenneth M. Davis , William F. Landers , Robert M. Merkling, Jr. , Michael L. Passow , Jeremy K. Stephens
发明人： Karl E. Boggs , Kenneth M. Davis , William F. Landers , Robert M. Merkling, Jr. , Michael L. Passow , Jeremy K. Stephens
IPC分类号： B24B37/013 , B24B49/04 , B24B49/10 , B24B49/00 , B24B51/00
CPC分类号： B24B37/013 , B24B49/04 , B24B49/10
摘要： A system for polishing a surface. The surface is positioned in contact with a rotating table having a polishing slurry or compound applied to a table surface. The pattern formed in the polishing compound as the table is rotated is monitored, and when the pattern dimensions reach a predetermined size, indicating a polished end point, the polisher ends polishing.
摘要翻译： 用于抛光表面的系统。 表面定位成与具有施加到台面的抛光浆料或化合物的旋转台接触。 监视在作为工作台的抛光组合物中形成的图案旋转，并且当图案尺寸达到预定尺寸时，指示抛光的终点，抛光机结束抛光。
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