公开(公告)号：US08664040B2

公开(公告)日：2014-03-04

申请号：US13331061

申请日：2011-12-20

申请人： Chen-Hua Yu ,  Chung-Shi Liu ,  Chun-Cheng Lin ,  Meng-Tse Chen ,  Ming-Da Cheng

发明人： Chen-Hua Yu ,  Chung-Shi Liu ,  Chun-Cheng Lin ,  Meng-Tse Chen ,  Ming-Da Cheng

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/31 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/14 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00

摘要： A method includes performing an etching step on a package. The package includes a package component, a connector on a top surface of the package component, a die bonded to the top surface of the package component, and a molding material molded over the top surface of the package component. The molding material covers the connector, wherein a portion of the molding material covering the connector is removed by the etching step, and the connector is exposed.

摘要翻译： 一种方法包括对包装进行蚀刻步骤。 该包装包括包装部件，在包装部件的顶表面上的连接器，结合到包装部件的顶表面的管芯，以及模制在包装部件的顶表面上的模制材料。 成型材料覆盖连接器，其中通过蚀刻步骤去除覆盖连接器的成型材料的一部分，并且连接器被暴露。

公开(公告)号：US20130062761A1

公开(公告)日：2013-03-14

申请号：US13228768

申请日：2011-09-09

申请人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

发明人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

IPC分类号： H01L23/498 ,  H01L21/56

CPC分类号： H01L25/0657 ,  H01L21/52 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06515 ,  H01L2224/09181 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/73259 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15322 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2924/00

摘要： Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL.

公开(公告)号：US08884431B2

公开(公告)日：2014-11-11

申请号：US13228768

申请日：2011-09-09

申请人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

发明人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/683 ,  H01L23/498 ,  H01L21/56 ,  H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10 ,  H01L25/03 ,  H01L21/768

CPC分类号： H01L25/0657 ,  H01L21/52 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06515 ,  H01L2224/09181 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/73259 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15322 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2924/00

摘要： Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL.

摘要翻译： 公开了用于半导体器件的封装方法和结构。 在一个实施例中，封装的半导体器件包括具有第一表面和与第一表面相对的第二表面的再分配层（RDL）。 至少一个集成电路耦合到RDL的第一表面，并且多个金属凸块耦合到RDL的第二表面。 模制化合物设置在RDL的至少一个集成电路和第一表面上。

公开(公告)号：US20130154086A1

公开(公告)日：2013-06-20

申请号：US13331061

申请日：2011-12-20

申请人： Chen-Hua Yu ,  Chung-Shi Liu ,  Chun-Cheng Lin ,  Meng-Tse Chen ,  Ming-Da Cheng

发明人： Chen-Hua Yu ,  Chung-Shi Liu ,  Chun-Cheng Lin ,  Meng-Tse Chen ,  Ming-Da Cheng

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/31 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/14 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00

摘要： A method includes performing an etching step on a package. The package includes a package component, a connector on a top surface of the package component, a die bonded to the top surface of the package component, and a molding material molded over the top surface of the package component. The molding material covers the connector, wherein a portion of the molding material covering the connector is removed by the etching step, and the connector is exposed.

摘要翻译： 一种方法包括对包装进行蚀刻步骤。 该包装包括包装部件，在包装部件的顶表面上的连接器，结合到包装部件的顶表面的管芯，以及模制在包装部件的顶表面上的模制材料。 成型材料覆盖连接器，其中通过蚀刻步骤去除覆盖连接器的成型材料的一部分，并且连接器被暴露。

公开(公告)号：US09030022B2

公开(公告)日：2015-05-12

申请号：US13280157

申请日：2011-10-24

申请人： Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/10

CPC分类号： H01L25/50 ,  H01L21/31105 ,  H01L21/565 ,  H01L22/12 ,  H01L22/20 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/1131 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A device includes a package component having conductive features on a top surface, and a polymer region molded over the top surface of the first package component. A plurality of openings extends from a top surface of the polymer region into the polymer region, wherein each of the conductive features is exposed through one of the plurality of openings. The plurality of openings includes a first opening having a first horizontal size, and a second opening having a second horizontal size different from the first horizontal size.

摘要翻译： 一种器件包括在顶表面上具有导电特征的封装元件和模塑在第一封装元件的顶表面上的聚合物区域。 多个开口从聚合物区域的顶表面延伸到聚合物区域中，其中每个导电特征通过多个开口中的一个露出。 多个开口包括具有第一水平尺寸的第一开口和具有不同于第一水平尺寸的第二水平尺寸的第二开口。

公开(公告)号：US20130115735A1

公开(公告)日：2013-05-09

申请号：US13289719

申请日：2011-11-04

申请人： Meng-Tse Chen ,  Hsiu-Jen Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Meng-Tse Chen ,  Hsiu-Jen Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L21/98 ,  B29C35/08

CPC分类号： H01L24/97 ,  B29C33/68 ,  B29C43/18 ,  H01L21/563 ,  H01L21/566 ,  H01L2224/16225 ,  H01L2924/01322 ,  H01L2924/181 ,  H01L2924/00

摘要： Methods and apparatus for a forming molded underfills. A method is disclosed including loading a flip chip substrate into a selected one of the upper mold chase and lower mold chase of a mold press at a first temperature; positioning a molded underfill material in the at least one of the upper and lower mold chases while maintaining the first temperature which is lower than a melting temperature of the molded underfill material; forming a sealed mold cavity and creating a vacuum in the mold cavity; raising the temperature of the molded underfill material to a second temperature greater than the melting point to cause the molded underfill material to flow over the flip chip substrate forming an underfill layer and forming an overmolded layer; and cooling the flip chip substrate to a third temperature substantially lower than the melting temperature of the molded underfill material. An apparatus is disclosed.

摘要翻译： 用于成型模制底部填料的方法和装置。 公开了一种方法，其包括在第一温度下将倒装芯片衬底加载到模压机的上模追逐和下模追逐中的所选择的一个中; 将模制的底部填充材料定位在上模具和下模具中的至少一个中，同时保持低于模制的底部填充材料的熔融温度的第一温度; 形成密封的模腔并在模腔中产生真空; 将模制的底部填充材料的温度提高到大于熔点的第二温度，以使模制的底部填充材料在形成底部填充层的倒装芯片衬底上流动并形成包覆成型层; 并将所述倒装芯片基板冷却至基本上低于所述模制底部填充材料的熔融温度的第三温度。 公开了一种装置。

公开(公告)号：US20130095611A1

公开(公告)日：2013-04-18

申请号：US13276143

申请日：2011-10-18

申请人： Kuei-Wei Huang ,  Wei-Hung Lin ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Meng-Tse Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Kuei-Wei Huang ,  Wei-Hung Lin ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Meng-Tse Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L21/56

摘要： Packaging methods for semiconductor devices are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates.

摘要翻译： 公开了半导体器件的封装方法。 在一个实施例中，封装半导体器件的方法包括提供包括多个封装衬底的工件。 在多个包装基板之间移除一部分工件。 模具附接到多个封装基板中的每一个。

公开(公告)号：US09312214B2

公开(公告)日：2016-04-12

申请号：US13240629

申请日：2011-09-22

申请人： Meng-Tse Chen ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Meng-Tse Chen ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/498 ,  H01L21/60 ,  H01L21/50 ,  H01L21/56 ,  H01L21/48 ,  H01L21/683 ,  H01L23/00

CPC分类号： H01L23/49816 ,  H01L21/486 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2924/12042 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method includes applying a polymer-comprising material over a carrier, and forming a via over the carrier. The via is located inside the polymer-comprising material, and substantially penetrates through the polymer-comprising material. A first redistribution line is formed on a first side of the polymer-comprising material. A second redistribution line is formed on a second side of the polymer-comprising material opposite to the first side. The first redistribution line is electrically coupled to the second redistribution line through the via.

摘要翻译： 一种方法包括在载体上涂覆含聚合物的材料，并在载体上形成通孔。 通孔位于含聚合物的材料的内部，并且基本上穿透包含聚合物的材料。 在包含聚合物的材料的第一面上形成第一再分配线。 第二再分配线形成在与第一侧相对的含聚合物材料的第二侧上。 第一再分配线通过通孔电耦合到第二再分配线。

公开(公告)号：US20130099385A1

公开(公告)日：2013-04-25

申请号：US13280157

申请日：2011-10-24

申请人： Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/538 ,  H01L21/66

CPC分类号： H01L25/50 ,  H01L21/31105 ,  H01L21/565 ,  H01L22/12 ,  H01L22/20 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/1131 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A device includes a package component having conductive features on a top surface, and a polymer region molded over the top surface of the first package component. A plurality of openings extends from a top surface of the polymer region into the polymer region, wherein each of the conductive features is exposed through one of the plurality of openings. The plurality of openings includes a first opening having a first horizontal size, and a second opening having a second horizontal size different from the first horizontal size.

公开(公告)号：US20140048934A1

公开(公告)日：2014-02-20

申请号：US13586564

申请日：2012-08-15

申请人： Meng-Tse Chen ,  Jung Wei Cheng ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Meng-Tse Chen ,  Jung Wei Cheng ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/498 ,  H01L21/56

CPC分类号： H01L21/563 ,  H01L2224/16225

摘要： A semiconductor device assembly includes a substrate having an area of the surface treated to form a surface roughness. A die is mounted on the substrate by a plurality of coupling members. An underfill substantially fills a gap disposed between the substrate and the die, wherein a fillet width of the underfill is substantially limited to the area of surface roughness.

摘要翻译： 半导体器件组件包括具有被处理以形成表面粗糙度的表面区域的衬底。 模具通过多个联接构件安装在基板上。 底部填充物基本上填充设置在基底和模具之间的间隙，其中底部填充物的圆角宽度基本上限于表面粗糙度的面积。