利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

15 条记录 (耗时 0.019 秒)

    Plated nickel-gold/dielectric interface for passivated MMICs
    1.
    发明授权
    Plated nickel-gold/dielectric interface for passivated MMICs 失效
    镀镍镍/电介质界面，用于钝化MMIC

    公开(公告)号：US5861341A

    公开(公告)日：1999-01-19

    申请号：US680453

    申请日：1996-07-15

    申请人： Cheng P. Wen ,  Wah S. Wong ,  Arlene E. Arthur

    发明人： Cheng P. Wen ,  Wah S. Wong ,  Arlene E. Arthur

    IPC分类号： H01L23/66 ,  H01L21/441

    CPC分类号： H01L23/66 ,  H01L2924/0002

    摘要： A thin film (at least one atomic layer to about 400 .ANG.) of nickel is electrolytically plated on top of electrolytically-plated gold electrodes in GaAs monolithic microwave integrated circuits (MMICs) without any additional photoresist masking step. The thin electrolytically-plated nickel film improves adhesion of a passivating dielectric layer (e.g., silicon dioxide, silicon nitride, and silicon oxynitride) formed on the electrolytically-plated gold electrodes. The electrolytically-plated nickel film can be removed locally to facilitate the fabrication of plated silver bumps (for off-chip electrical connections and thermal paths) on passivated flip chip MMICs.

    摘要翻译： 在GaAs单片微波集成电路（MMIC）中的电解电镀金电极的顶部上电解电镀镍（至少一个原子层至约400）的镍膜，而无需任何额外的光刻胶掩模步骤。 薄的电解镍膜改善了在电解镀金的金电极上形成的钝化介质层（例如，二氧化硅，氮化硅和氮氧化硅）的粘附性。 可以局部去除电解镍膜，以便于在钝化倒装芯片MMIC上制造电镀银凸块（片外电连接和热路径）。

    Beam lead mixer diode
    3.
    发明授权
    Beam lead mixer diode 失效
    光束混合二极管

    公开(公告)号：US4855796A

    公开(公告)日：1989-08-08

    申请号：US871236

    申请日：1986-06-06

    申请人： Wah S. Wong ,  Cheng P. Wen ,  Jen K. Kung

    发明人： Wah S. Wong ,  Cheng P. Wen ,  Jen K. Kung

    IPC分类号： H01L21/329 ,  H01L23/482 ,  H01L29/41 ,  H01L29/872

    CPC分类号： H01L21/263 ,  H01L23/4822 ,  H01L24/01 ,  H01L29/41 ,  H01L29/66212 ,  H01L29/872 ,  H01L2924/12032 ,  H01L2924/3011

    摘要： A beam lead diode configuration is described, employing a planar proton bombarded conversion region and a low-permittivity dielectric separator. The diode enjoys the mechanical ruggedness of the conventional planar diodes and the electrical performance of conventional mesa-type diodes. The diode structure results in the absence of N-type mesa structures on the substrate, allowing fabrication by relatively low-cost, high-yield photolithographic processes.

    摘要翻译： 使用平面质子轰击转换区和低介电常数介质分离器来描述束引线二极管配置。 二极管具有常规平面二极管的机械坚固性和常规台面型二极管的电性能。 二极管结构导致在衬底上不存在N型台面结构，允许通过相对低成本的高产量光刻工艺制造。

    Flip chip microwave module and fabrication method
    5.
    发明授权
    Flip chip microwave module and fabrication method 失效
    倒装微波模块及其制作方法

    公开(公告)号：US5877560A

    公开(公告)日：1999-03-02

    申请号：US803655

    申请日：1997-02-21

    申请人： Cheng P. Wen ,  Kuo-Hsin Li ,  Wah S. Wong

    发明人： Cheng P. Wen ,  Kuo-Hsin Li ,  Wah S. Wong

    IPC分类号： H01L23/66 ,  H05K3/34 ,  H01L23/488 ,  H01L23/50 ,  H05K1/18

    CPC分类号： H01L23/66 ,  H05K3/3452 ,  H01L2924/00013 ,  H01L2924/0002 ,  H05K2201/2081 ,  H05K2203/0315

    摘要： A monolithic flip chip microwave integrated circuit module formed using titanium coated copper circuitry and a processing method. A dam is formed on a substrate by forming a thin protective layer such as titanium or other metal on a copper layer formed on a surface of the substrate to which a monolithic microwave integrated circuit is to be attached. The protective layer is oxidized upon exposure to air. Vias or openings are then formed in the oxidized protective layer. Solder is disposed in the openings in the oxidized protective layer, and is confined to the openings while solder is reflowed to attach the integrated circuit to the substrate. The oxidized protective layer serves a dual function that provides both a solder dam and a protective coating for the underlying copper circuitry. Copper surfaces not covered by the oxidized protective layer may be environmentally protected by depositing a thin layer containing electroless plated nickel and electroless plated gold.

    摘要翻译： 使用镀钛铜电路形成的单片倒装芯片微波集成电路模块及其加工方法。 通过在形成有单片微波集成电路的基板的表面上形成的铜层上形成诸如钛或其它金属的薄保护层，在基板上形成堤坝。 保护层在暴露于空气中时被氧化。 然后在氧化保护层中形成通孔或开口。 焊料设置在氧化保护层的开口中，并且被限制在开口处，而焊料被回流以将集成电路附接到衬底。 氧化保护层具有双重功能，同时为下面的铜电路提供焊接和保护涂层。 未被氧化保护层覆盖的铜表面可以通过沉积含有无电镀镍和无电镀金的薄层来进行环境保护。

    Flip chip high power monolithic integrated circuit thermal bumps
    7.
    发明授权
    Flip chip high power monolithic integrated circuit thermal bumps 失效
    倒装芯片大功率单片集成电路热凸块

    公开(公告)号：US5708283A

    公开(公告)日：1998-01-13

    申请号：US771458

    申请日：1996-12-20

    申请人： Cheng P. Wen ,  Wah S. Wong ,  William D. Gray

    发明人： Cheng P. Wen ,  Wah S. Wong ,  William D. Gray

    IPC分类号： H01L21/60 ,  H01L23/482 ,  H01L23/485 ,  H01L23/66 ,  H01L23/367

    CPC分类号： H01L24/10 ,  H01L23/4821 ,  H01L23/66 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15787 ,  H01L2924/30107

    摘要： A high power, flip-chip microwave monolithic integrated circuit (MMIC) assembly (30) has a high power microwave monolithic integrated circuit (MMIC) having a surface with an active area (72) in which heat is generated. The assembly also has a host substrate (34). A thermally conductive bump (51) formed over the surface of the MMIC has a first portion (51') in close proximity to and in thermal communication with the active area (72) of the MMIC and a second portion (51") which is in close proximity to and in thermal communication with the host substrate (34). The second portion (51") of the thermal bump (51) has a greater cross-sectional area than the first portion (51'). A multi-layer, multi-exposure method of manufacturing the improved thermal bump (51) includes several steps. A plating membrane (80) is formed on a surface of the MMIC (32). A first layer of negative photoresist is applied to the surface of the plating membrane (80), and is exposed with a first masked pattern of light. A second layer of negative photoresist is applied on top of the first layer of photoresist. The second layer of negative photoresist is exposed with a second masked pattern of light. Unexposed areas of the first and second layers of photoresist form a "T" shape. The first and second layers of photoresist are developed with a photoresist developer, thereby leaving a "T"-shaped via in the photoresist. An electrically and thermally conductive metal is plated onto the plating membrane and into the via to form a substantially "T"-shaped bump (51), which is then attached to a host substrate. The resulting bump has greater cross-sectional area at the host substrate than at the MMIC (32).

    摘要翻译： 高功率，倒装芯片微波单片集成电路（MMIC）组件（30）具有高功率微波单片集成电路（MMIC），其具有其中产生热的有源区域（72）的表面。 组件还具有主体衬底（34）。 形成在MMIC的表面上的导热凸块（51）具有与MMIC的有源区域（72）紧密并且与热连通的第一部分（51'）和第二部分（51“），第二部分 与主机基板（34）紧密接触并与其进行热连通。 热凸块（51）的第二部分（51“）具有比第一部分（51'）更大的横截面面积。 制造改进的热凸块（51）的多层多曝光方法包括几个步骤。 在MMIC（32）的表面上形成电镀膜（80）。 将第一层负性光致抗蚀剂施加到镀膜（80）的表面，并以第一掩蔽图案曝光。 在第一层光致抗蚀剂的顶部上施加第二层负性光致抗蚀剂。 用第二掩模图案曝光第二层负性光致抗蚀剂。 第一和第二层光致抗蚀剂的未曝光区域形成“T”形。 光致抗蚀剂的第一层和第二层用光致抗蚀剂显影剂显影，从而在光致抗蚀剂中留下“T”形通孔。 将导电和导电的金属镀在镀膜上并通入通孔中，以形成基本上“T”形的凸块（51），然后将其附着到主体衬底上。 所得到的凸起在主体衬底处具有比在MMIC（32）处具有更大的横截面面积。

    Flip chip high power monolithic integrated circuit thermal bumps and fabrication method
    8.
    发明授权
    Flip chip high power monolithic integrated circuit thermal bumps and fabrication method 失效
    倒装芯片高功率单片集成电路热凸块及制作方法

    公开(公告)号：US5616517A

    公开(公告)日：1997-04-01

    申请号：US616414

    申请日：1996-03-15

    申请人： Cheng P. Wen ,  Wah S. Wong ,  William D. Gray

    发明人： Cheng P. Wen ,  Wah S. Wong ,  William D. Gray

    IPC分类号： H01L21/60 ,  H01L23/482 ,  H01L23/485 ,  H01L23/66 ,  H01L21/44

    CPC分类号： H01L24/10 ,  H01L23/4821 ,  H01L23/66 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15787 ,  H01L2924/30107

    摘要： A high power, flip-chip microwave monolithic integrated circuit (MMIC) assembly (30) has a high power microwave monolithic integrated circuit (MMIC) having a surface with an active area (72) in which heat is generated. The assembly also has a host substrate (34). A thermally conductive bump (51) formed over the surface of the MMIC has a first portion (51') in close proximity to and in thermal communication with the active area (72) of the MMIC and a second portion (51") which is in close proximity to and in thermal communication with the host substrate (34). The second portion (51") of the thermal bump (51) has a greater cross-sectional area than the first portion (51'). A multi-layer, multi-exposure method of manufacturing the improved thermal bump (51) includes several steps. A plating membrane (80) is formed on a surface of the MMIC (32). A first layer of negative photoresist is applied to the surface of the plating membrane (80), and is exposed with a first masked pattern of light. A second layer of negative photoresist is applied on top of the first layer of photoresist. The second layer of negative photoresist is exposed with a second masked pattern of light. Unexposed areas of the first and second layers of photoresist form a "T" shape. The first and second layers of photoresist are developed with a photoresist developer, thereby leaving a "T"-shaped via in the photoresist. An electrically and thermally conductive metal is plated onto the plating membrane and into the via to form a substantially "T"-shaped bump (51), which is then attached to a host substrate. The resulting bump has greater cross-sectional area at the host substrate than at the MMIC (32).

    摘要翻译： 高功率，倒装芯片微波单片集成电路（MMIC）组件（30）具有高功率微波单片集成电路（MMIC），其具有其中产生热的有源区域（72）的表面。 组件还具有主体衬底（34）。 形成在MMIC的表面上的导热凸块（51）具有与MMIC的有源区域（72）紧密并且与热连通的第一部分（51'）和第二部分（51“），第二部分 与主机基板（34）紧密接触并与其进行热连通。 热凸块（51）的第二部分（51“）具有比第一部分（51'）更大的横截面面积。 制造改进的热凸块（51）的多层多曝光方法包括几个步骤。 在MMIC（32）的表面上形成电镀膜（80）。 将第一层负性光致抗蚀剂施加到镀膜（80）的表面，并以第一掩蔽图案曝光。 在第一层光致抗蚀剂的顶部上施加第二层负性光致抗蚀剂。 用第二掩模图案曝光第二层负性光致抗蚀剂。 第一和第二层光致抗蚀剂的未曝光区域形成“T”形。 光致抗蚀剂的第一层和第二层用光致抗蚀剂显影剂显影，从而在光致抗蚀剂中留下“T”形通孔。 将导电和导电的金属镀在镀膜上并通入通孔中，以形成基本上“T”形的凸块（51），然后将其附着到主体衬底上。 所得到的凸起在主体衬底处具有比在MMIC（32）处具有更大的横截面面积。

    Enhancement mode normally-off gallium nitride heterostructure field effect transistor
    9.
    发明授权
    Enhancement mode normally-off gallium nitride heterostructure field effect transistor 有权
    增强型常闭氮化镓异质结场场效应晶体管

    公开(公告)号：US08728884B1

    公开(公告)日：2014-05-20

    申请号：US12510687

    申请日：2009-07-28

    申请人： Tahir Hussain ,  Miroslav Micovic ,  Wah S. Wong ,  Shawn D. Burnham

    发明人： Tahir Hussain ,  Miroslav Micovic ,  Wah S. Wong ,  Shawn D. Burnham

    IPC分类号： H01L21/338

    CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/66462

    摘要： A method of fabricating a normally “off” GaN heterostructure field effect transistor having a source and a drain including depositing a passivation layer patterned to cover a channel region between a source and a drain, forming a first opening in the passivation layer, the first opening for defining a gate area in the channel region and the first opening having a first length dimension along a direction of current flow between the source and the drain, and implanting ions in an implant area within the gate area, wherein the implant area has a second length dimension along the direction of current flow shorter than the first length dimension.

    摘要翻译： 一种制造具有源极和漏极的正常“关闭”GaN异质结构场效应晶体管的方法，包括沉积图案化以覆盖源极和漏极之间的沟道区域的钝化层，在钝化层中形成第一开口，第一开口 用于在所述沟道区域中限定栅极区域，并且所述第一开口沿着所述源极和漏极之间的电流流动的方向具有第一长度尺寸，以及将离子注入所述栅极区域内的注入区域中，其中所述植入区域具有第二 沿着电流流动方向的长度尺寸短于第一长度尺寸。