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    Methods of fabricating semiconductor device having a metal gate pattern
    5.
    发明申请
    Methods of fabricating semiconductor device having a metal gate pattern 有权
    制造具有金属栅极图案的半导体器件的方法

    公开(公告)号：US20090250752A1

    公开(公告)日：2009-10-08

    申请号：US12457323

    申请日：2009-06-08

    申请人： Ja-Hum Ku ,  Chang-Won Lee ,  Seong-Jun Heo ,  Sun-Pil Youn ,  Sung-Man Kim

    发明人： Ja-Hum Ku ,  Chang-Won Lee ,  Seong-Jun Heo ,  Sun-Pil Youn ,  Sung-Man Kim

    IPC分类号： H01L29/94 ,  H01L29/78

    CPC分类号： H01L21/823437 ,  H01L21/28247 ,  H01L29/4941 ,  H01L29/6656

    摘要： A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

    摘要翻译： 提供一种制造具有金属栅极图案的半导体器件的方法，其中使用覆盖层来控制氧化过程中金属栅极图案的部分的相对氧化率。 覆盖层可以是多层结构，并且可以被蚀刻以在金属栅极图案的侧壁上形成绝缘间隔物。 封盖层允许使用选择性氧化工艺，其可以是在富H2气氛中使用H 2 O和H 2的分压的湿式氧化工艺，以氧化基板和金属栅极图案的部分，同时抑制 可以包括在金属栅极图案中的金属层的氧化。 这允许对硅衬底的蚀刻损伤和金属栅极图案的边缘减小，同时基本上保持栅极绝缘层的原始厚度和金属层的导电性。

    Methods of forming semiconductor devices having metal gate electrodes and related devices
    7.
    发明申请
    Methods of forming semiconductor devices having metal gate electrodes and related devices 审中-公开
    形成具有金属栅电极的半导体器件和相关器件的方法

    公开(公告)号：US20060186491A1

    公开(公告)日：2006-08-24

    申请号：US11384789

    申请日：2006-03-20

    申请人： Hee-Sook Park ,  Sun-Pil Youn ,  Chang-Won Lee

    发明人： Hee-Sook Park ,  Sun-Pil Youn ,  Chang-Won Lee

    IPC分类号： H01L29/94 ,  H01L21/3205

    CPC分类号： H01L21/28114 ,  H01L21/28061 ,  H01L29/42376 ,  H01L29/4933 ,  H01L29/517 ,  H01L29/6659 ,  H01L29/7833

    摘要： Methods of forming semiconductor devices and the devices so formed include forming an oxidation barrier pattern to cover sidewalls of a metal-containing pattern. The metal-containing pattern is located on a gate polysilicon layer and includes a metal silicide pattern, a metal barrier pattern and a gate metal pattern which are sequentially stacked. An oxide layer is not formed between the metal barrier pattern and the gate polysilicon pattern. Furthermore, a metal silicide pattern located between the metal barrier pattern and the gate polysilicon pattern functions not only as an ohmic layer decreasing a contact resistance between the metal barrier pattern and the gate polysilicon pattern but also as an oxidation barrier to prevent a metal such as tungsten from being oxidized. Therefore, semiconductor devices have improved operational speed and/or reliability.

    摘要翻译： 形成半导体器件的方法和如此形成的器件包括形成氧化阻挡图案以覆盖含金属图案的侧壁。 含金属图案位于栅极多晶硅层上，并且包括依次层叠的金属硅化物图案，金属阻挡图案和栅极金属图案。 在金属阻挡图案和栅极多晶硅图案之间不形成氧化物层。 此外，位于金属阻挡图案和栅极多晶硅图案之间的金属硅化物图案不仅用作降低金属阻挡图案和栅极多晶硅图案之间的接触电阻的欧姆层，而且还作为防止金属如 钨被氧化。 因此，半导体器件具有改进的操作速度和/或可靠性。

    Method of forming a gate of a semiconductor device
    9.
    发明申请
    Method of forming a gate of a semiconductor device 有权
    形成半导体器件的栅极的方法

    公开(公告)号：US20060110900A1

    公开(公告)日：2006-05-25

    申请号：US11283121

    申请日：2005-11-18

    申请人： Sun-Pil Youn ,  Chang-Won Lee ,  Woong-Hee Sohn ,  Gil-Heyun Choi ,  Jong-Ryeol Yoo ,  Jang-Hee Lee ,  Jae-Hwa Park ,  Dong-Chan Lim ,  Byung-Hak Lee ,  Hee-Sook Park

    发明人： Sun-Pil Youn ,  Chang-Won Lee ,  Woong-Hee Sohn ,  Gil-Heyun Choi ,  Jong-Ryeol Yoo ,  Jang-Hee Lee ,  Jae-Hwa Park ,  Dong-Chan Lim ,  Byung-Hak Lee ,  Hee-Sook Park

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/28247 ,  H01L21/28044 ,  H01L29/4925

    摘要： In a method for forming a gate in a semiconductor device, a first preliminary gate structure is formed on a substrate. The first preliminary gate structure includes a gate oxide layer, a polysilicon layer pattern and a tungsten layer pattern sequentially stacked on the substrate. A primary oxidation process is performed using oxygen radicals at a first temperature for adjusting a thickness of the gate oxide layer to form a second preliminary gate structure having tungsten oxide. The tungsten oxide is reduced to a tungsten material using a gas containing hydrogen to form a gate structure. The tungsten oxide may not be formed on the gate structure so that generation of the whiskers may be suppressed. Thus, a short between adjacent wirings may not be generated.

    摘要翻译： 在半导体器件中形成栅极的方法中，在衬底上形成第一预栅极结构。 第一预选栅极结构包括依次层叠在基板上的栅极氧化物层，多晶硅层图案和钨层图案。 在第一温度下使用氧自由基进行一次氧化处理，以调节栅极氧化物层的厚度以形成具有氧化钨的第二初步栅极结构。 使用含氢气体将钨氧化物还原成钨材料以形成栅极结构。 在栅极结构上可能不形成氧化钨，从而可以抑制晶须的产生。 因此，可能不会产生相邻布线之间的短路。