公开(公告)号：US09087837B2

公开(公告)日：2015-07-21

申请号：US13572833

申请日：2012-08-13

申请人： Doo Hwan Lee ,  Tae Sung Jeong ,  Yul Kyo Chung

发明人： Doo Hwan Lee ,  Tae Sung Jeong ,  Yul Kyo Chung

IPC分类号： H01L23/28 ,  H01L21/52 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L23/538 ,  H01L21/768 ,  H01L23/544 ,  H01L21/54 ,  H01L21/78

CPC分类号： H01L21/52 ,  H01L21/54 ,  H01L21/561 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/544 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2224/19 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/00

摘要： Disclosed herein are a semiconductor package and a method of manufacturing the same, the semiconductor package including: a molding member having a cavity formed therein; a device mounted in the cavity; an insulating member formed inside the cavity and on and/or beneath the molding member and the device; a circuit layer formed on the insulating member, and including vias and connection pads electrically connected with the device; a solder resist layer formed on the circuit layer, and having openings exposing upper portions of the connection pads; and solder balls formed in the openings.

摘要翻译： 这里公开了一种半导体封装及其制造方法，所述半导体封装包括：模制构件，其中形成有空腔; 安装在腔体中的装置; 绝缘构件，其形成在所述空腔内并且在所述模制构件和所述装置之上和/或之下; 形成在所述绝缘构件上的电路层，并且包括与所述装置电连接的通孔和连接垫; 形成在电路层上的阻焊层，并且具有暴露连接焊盘的上部的开口; 以及形成在开口中的焊球。

公开(公告)号：US20130320516A1

公开(公告)日：2013-12-05

申请号：US13572833

申请日：2012-08-13

申请人： Doo Hwan Lee ,  Tae Sung Jeong ,  Yul Kyo Chung

发明人： Doo Hwan Lee ,  Tae Sung Jeong ,  Yul Kyo Chung

IPC分类号： H01L21/52 ,  H01L21/54 ,  H01L23/24 ,  H01L21/60 ,  H01L23/498 ,  H01L23/055

CPC分类号： H01L21/52 ,  H01L21/54 ,  H01L21/561 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/544 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2224/19 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/00

摘要： Disclosed herein are a semiconductor package and a method of manufacturing the same, the semiconductor package including: a molding member having a cavity formed therein; a device mounted in the cavity; an insulating member formed inside the cavity and on and/or beneath the molding member and the device; a circuit layer formed on the insulating member, and including vias and connection pads electrically connected with the device; a solder resist layer formed on the circuit layer, and having openings exposing upper portions of the connection pads; and solder balls formed in the openings.

摘要翻译： 这里公开了一种半导体封装及其制造方法，所述半导体封装包括：模制构件，其中形成有空腔; 安装在腔体中的装置; 绝缘构件，其形成在所述空腔内并且在所述模制构件和所述装置之上和/或之下; 形成在所述绝缘构件上的电路层，并且包括与所述装置电连接的通孔和连接垫; 形成在电路层上的阻焊层，并且具有暴露连接焊盘的上部的开口; 以及形成在开口中的焊球。

公开(公告)号：US08802999B2

公开(公告)日：2014-08-12

申请号：US13478802

申请日：2012-05-23

申请人： Jong In Ryu ,  Yul Kyo Chung ,  Tae Sung Jeong

发明人： Jong In Ryu ,  Yul Kyo Chung ,  Tae Sung Jeong

IPC分类号： H05K1/09

CPC分类号： H05K1/185 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/12042 ,  H01L2924/19105 ,  H05K3/3436 ,  H05K2201/10477 ,  H05K2203/1461 ,  H01L2924/00

摘要： An embedded printed circuit board (PCB) includes: a copper foil laminate; an internal electronic component inserted into the copper foil laminate; a first circuit pattern formed on a surface of the internal electronic component; and a second circuit pattern formed on the copper foil laminate.

摘要翻译： 嵌入式印刷电路板（PCB）包括：铜箔层压板; 插入铜箔层压体中的内部电子部件; 形成在所述内部电子部件的表面上的第一电路图案; 以及形成在铜箔层叠体上的第二电路图案。

公开(公告)号：US20120017435A1

公开(公告)日：2012-01-26

申请号：US13200983

申请日：2011-10-06

申请人： Seung Hyun Sohn ,  Yul Kyo Chung ,  Byoung Chan Kim ,  Moon Il Kim ,  Kwan Kyu Kim ,  Yee Na Shin

发明人： Seung Hyun Sohn ,  Yul Kyo Chung ,  Byoung Chan Kim ,  Moon Il Kim ,  Kwan Kyu Kim ,  Yee Na Shin

IPC分类号： H05K3/30

CPC分类号： H05K1/185 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K3/025 ,  H05K3/4602 ,  H05K2201/10674 ,  H05K2203/0152 ,  H05K2203/063 ,  H05K2203/1152 ,  H05K2203/1469 ,  Y10T29/49124 ,  Y10T29/4913 ,  H01L2924/00

摘要： A method of manufacturing a PCB having electronic components embedded therein, including: preparing a copper foil layer including a thin copper foil coated with a resin layer; fixing electronic components onto the resin layer; forming a core layer in which the electronic components are embedded; forming internal layer circuits which are electrically connected to the electronic components; forming an insulating layer on the internal layer circuits; and forming external layer circuits on the insulating layer such that the external layer circuits are electrically connected to the internal layer circuits.

摘要翻译： 一种制造其中嵌有电子元件的PCB的方法，包括：制备包括涂覆有树脂层的薄铜箔的铜箔层; 将电子部件固定到树脂层上; 形成其中嵌入有电子部件的芯层; 形成电连接到所述电子部件的内层电路; 在内层电路上形成绝缘层; 以及在所述绝缘层上形成外层电路，使得所述外层电路电连接到所述内层电路。

公开(公告)号：US08049117B2

公开(公告)日：2011-11-01

申请号：US12466841

申请日：2009-05-15

申请人： Jung Won Lee ,  Yul Kyo Chung ,  In Hyung Lee

发明人： Jung Won Lee ,  Yul Kyo Chung ,  In Hyung Lee

IPC分类号： H05K1/16

CPC分类号： H05K1/162 ,  H01G4/33 ,  H01G13/00 ,  H01L21/4857 ,  H01L23/50 ,  H01L2924/0002 ,  H05K2201/0108 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2203/016 ,  H05K2203/107 ,  Y10T29/43 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method for manufacturing a printed circuit board with a capacitor embedded therein which has a dielectric film using laser lift off, and a capacitor manufactured thereby. In the method, a dielectric film is formed on a transparent substrate and heat-treated. A first conductive layer is formed on the heat-treated dielectric film. A laser beam is irradiated onto a stack formed, from below the transparent substrate, to separate the transparent substrate from the stack. After the transparent substrate is separated from the stack, a second conductive layer is formed with a predetermined pattern on the dielectric film. Also, an insulating layer and a third conductive layer are formed on the first and second conductive layers to alternate with each other in a predetermined number.

摘要翻译： 一种制造其中嵌有电容器的印刷电路板的方法，其中具有使用激光剥离的电介质膜，以及由此制造的电容器。 在该方法中，在透明基板上形成电介质膜并进行热处理。 在热处理电介质膜上形成第一导电层。 将激光束照射到从透明基板的下方形成的堆叠上，以将透明基板与堆叠分离。 在将透明基板与堆叠体分离之后，在电介质膜上形成具有预定图案的第二导电层。 此外，绝缘层和第三导电层形成在第一和第二导电层上，以预定数量相互交替。

公开(公告)号：US07845073B2

公开(公告)日：2010-12-07

申请号：US12000125

申请日：2007-12-10

申请人： In Hyung Lee ,  Yul Kyo Chung ,  Bae Kyun Kim ,  Seung Eun Lee ,  Jung Won Lee

发明人： In Hyung Lee ,  Yul Kyo Chung ,  Bae Kyun Kim ,  Seung Eun Lee ,  Jung Won Lee

IPC分类号： H05K3/02 ,  H05K3/10

CPC分类号： H05K1/162 ,  H01G4/005 ,  H01G4/33 ,  H05K3/046 ,  H05K2201/0108 ,  H05K2201/0175 ,  H05K2203/016 ,  H05K2203/0528 ,  H05K2203/0537 ,  H05K2203/107 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155

摘要： A method of manufacturing a circuit board embedding a thin film capacitor, the method including: forming a sacrificial layer on a first substrate; forming a dielectric layer on the sacrificial layer; forming a first electrode layer on the dielectric layer; disposing the first substrate on the second substrate in such a way that the first electrode layer is bonded to a top of a second substrate; decomposing the sacrificial layer by irradiating a laser beam onto the sacrificial layer through the first substrate; separating the first substrate from the second substrate; and forming a second electrode layer on the dielectric layer.

摘要翻译： 一种制造嵌入薄膜电容器的电路板的方法，所述方法包括：在第一基板上形成牺牲层; 在所述牺牲层上形成介电层; 在所述电介质层上形成第一电极层; 将第一基板设置在第二基板上，使得第一电极层接合到第二基板的顶部; 通过经由所述第一基板将激光束照射到所述牺牲层上来分解所述牺牲层; 将第一基板与第二基板分离; 以及在所述电介质层上形成第二电极层。

公开(公告)号：US07812465B2

公开(公告)日：2010-10-12

申请号：US12232528

申请日：2008-09-18

申请人： Jae Kul Lee ,  Yul Kyo Chung

发明人： Jae Kul Lee ,  Yul Kyo Chung

IPC分类号： H01L23/544

CPC分类号： H01L23/544 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/02 ,  H01L24/16 ,  H01L24/25 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/19 ,  H01L2224/83121 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/0269 ,  H05K1/185 ,  H05K3/4602 ,  H05K3/4679 ,  H05K2201/09918

摘要： Disclosed is a semiconductor chip having an alignment mark which is formed on the surface of the semiconductor chip where no external connection bump is formed, and which has the position information of the external connection bump. A method of manufacturing the semiconductor chip having an alignment mark is also provided. Because the semiconductor chip includes the alignment mark having the position information of the external connection bump, the external connection bump is matched with a via which is formed in the external circuit layer of a printed circuit board including the semiconductor chip, thus improving electrical connection with the printed circuit board, and increasing the reliability of the printed circuit board including the semiconductor chip.

摘要翻译： 公开了一种具有对准标记的半导体芯片，其形成在半导体芯片的没有形成外部连接凸块的表面上，并具有外部连接凸块的位置信息。 还提供了具有对准标记的制造半导体芯片的方法。 由于半导体芯片包括具有外部连接凸块的位置信息的对准标记，所以外部连接凸块与形成在包括半导体芯片的印刷电路板的外部电路层中的通路匹配，从而改善与 印刷电路板，并且增加包括半导体芯片的印刷电路板的可靠性。

公开(公告)号：US20090315194A1

公开(公告)日：2009-12-24

申请号：US12232528

申请日：2008-09-18

申请人： Jae Kul Lee ,  Yul Kyo Chung

发明人： Jae Kul Lee ,  Yul Kyo Chung

IPC分类号： H01L23/544 ,  H01L21/76

CPC分类号： H01L23/544 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/02 ,  H01L24/16 ,  H01L24/25 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/19 ,  H01L2224/83121 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/0269 ,  H05K1/185 ,  H05K3/4602 ,  H05K3/4679 ,  H05K2201/09918

摘要： Disclosed is a semiconductor chip having an alignment mark which is formed on the surface of the semiconductor chip where no external connection bump is formed, and which has the position information of the external connection bump. A method of manufacturing the semiconductor chip having an alignment mark is also provided. Because the semiconductor chip includes the alignment mark having the position information of the external connection bump, the external connection bump is matched with a via which is formed in the external circuit layer of a printed circuit board including the semiconductor chip, thus improving electrical connection with the printed circuit board, and increasing the reliability of the printed circuit board including the semiconductor chip.

摘要翻译： 公开了一种具有对准标记的半导体芯片，其形成在半导体芯片的没有形成外部连接凸块的表面上，并具有外部连接凸块的位置信息。 还提供了具有对准标记的制造半导体芯片的方法。 由于半导体芯片包括具有外部连接凸块的位置信息的对准标记，所以外部连接凸块与形成在包括半导体芯片的印刷电路板的外部电路层中的通路匹配，从而改善与 印刷电路板，并且增加包括半导体芯片的印刷电路板的可靠性。

公开(公告)号：US20090208640A1

公开(公告)日：2009-08-20

申请号：US12432221

申请日：2009-04-29

申请人： Won Hoon SONG ,  Yul Kyo Chung ,  Sung Taek Lim

发明人： Won Hoon SONG ,  Yul Kyo Chung ,  Sung Taek Lim

IPC分类号： B05D5/12 ,  C23C14/34

CPC分类号： H01L21/02197 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/02282 ,  H01L21/31683 ,  H01L21/31691 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0179

摘要： The invention relates to a fabrication method of a composite metal oxide dielectric film containing at least two metallic elements on a substrate, and a composite metal oxide dielectric film fabricated thereby. The method includes: forming an amorphous film containing at least one of the metallic elements; preparing a hydrothermal solution where a precursor of the remaining element of the metallic elements is mixed; immersing the amorphous film into the hydrothermal solution; and hydrothermally treating the amorphous film so that the remaining one of the metallic elements is synthesized to the amorphous film, thereby forming a crystallized composite metal oxide film.

摘要翻译： 本发明涉及在基板上含有至少两种金属元素的复合金属氧化物电介质膜的制造方法以及由此制造的复合金属氧化物电介质膜。 该方法包括：形成含有至少一种金属元素的非晶膜; 制备其中混合金属元素的剩余元素的前体的水热溶液; 将非晶膜浸入水热溶液中; 对该非晶质膜进行水热处理，使残留的金属元素与非晶质膜合成，从而形成结晶化复合金属氧化物膜。

公开(公告)号：US20070234539A1

公开(公告)日：2007-10-11

申请号：US11730979

申请日：2007-04-05

申请人： Seung Eun Lee ,  Yul Kyo Chung ,  Hyung Dong Kang ,  Hyun Ju Jin

发明人： Seung Eun Lee ,  Yul Kyo Chung ,  Hyung Dong Kang ,  Hyun Ju Jin

IPC分类号： H04R17/00 ,  H01L21/8242

CPC分类号： H04R19/00 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2203/0346 ,  H05K2203/0353 ,  Y10T29/417 ,  Y10T29/42 ,  Y10T29/43 ,  Y10T29/435

摘要： A method for manufacturing a capacitor embedded in a PCB includes: preparing a copper clad lamination (CCL) substrate having a reinforcement member and copper foils formed on both surfaces of the reinforcement member; planarizing surfaces of the copper foils of the CCL substrate; forming a dielectric layer on the planarized surface of the copper foils; and forming a top electrode on the dielectric layer.

摘要翻译： 一种嵌入在PCB中的电容器的制造方法，其特征在于，包括：具有加强部件的铜包覆层叠（CCL）基板和形成在所述加强部件的两面的铜箔; 平坦化CCL基板的铜箔表面; 在铜箔的平坦化表面上形成电介质层; 并在电介质层上形成顶部电极。