公开(公告)号：US5701033A

公开(公告)日：1997-12-23

申请号：US593965

申请日：1996-01-30

申请人： Tetsuya Ueda ,  Jun Shibata ,  Yomiyuki Yama

发明人： Tetsuya Ueda ,  Jun Shibata ,  Yomiyuki Yama

IPC分类号： H01L23/04 ,  H01L23/02 ,  H01L23/057 ,  H01L23/13 ,  H01L23/64 ,  H01L23/12 ,  H01L23/28 ,  H01L23/34

CPC分类号： H01L23/057 ,  H01L23/13 ,  H01L23/642 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/19041 ,  Y10S257/924

摘要： A semiconductor device comprising a substrate having a hollow cavity for mounting a semiconductor element therein and a lowered step surface at a periphery of the cavity for mounting a chip component thereon. A semiconductor element is mounted within the cavity and a chip capacitor is mounted to the lowered step surface. The semiconductor element and the chip component are adapted to be connected to an external circuit through electrical conductors. A cap is attached to the substrate and a seal material is filled into a space defined between the cap and the substrate for sealing the cavity and for encapsulating the chip component on the lowered step surface which may extend along the entire periphery of the cavity. The cap may include a projection adapted to abut gainst a side wall of the lowered step surface, or alternatively, the lowered step surface may include a side wall having a projection adapted to abut against periphery of the cap. The semiconductor device may further comprise a heat sink attached to the semiconductor element.

摘要翻译： 一种半导体器件，包括具有用于将半导体元件安装在其中的中空腔的衬底和用于在其上安装芯片部件的空腔周围的降低的台阶表面。 半导体元件安装在空腔内，并且片状电容器安装到降低的台阶表面。 半导体元件和芯片部件适于通过电导体连接到外部电路。 盖子连接到基板上，并且将密封材料填充到限定在盖和基板之间的空间中，用于密封空腔并将芯片部件封装在可沿着空腔的整个周边延伸的降低的台阶表面上。 帽可以包括适于抵靠降低的台阶表面的侧壁的突起，或者替代地，降低的台阶表面可以包括具有适于抵靠盖的周边的突起的侧壁。 半导体器件还可以包括附接到半导体元件的散热器。

公开(公告)号：US5731631A

公开(公告)日：1998-03-24

申请号：US681998

申请日：1996-07-30

申请人： Yomiyuki Yama ,  Masao Kobayashi ,  Jun Shibata ,  Shinji Baba ,  Masaki Watanabe

发明人： Yomiyuki Yama ,  Masao Kobayashi ,  Jun Shibata ,  Shinji Baba ,  Masaki Watanabe

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/12 ,  H01L23/31 ,  H01L23/495 ,  H01L23/14

CPC分类号： H01L24/50 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/49572 ,  H01L24/10 ,  H01L24/13 ,  H01L24/73 ,  H01L24/91 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/50 ,  H01L2224/73211 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/30107 ,  H01L2924/3011

摘要： A semiconductor device having improved heat dissipation property and electrical characteristics and applicable to an integrated circuit having a multiplicity of electrodes, and a method of fabricating the semiconductor device are disclosed. A surface of a semiconductor chip (1) on which a bump (2) is formed is in face to face relation to a surface of a circuit substrate (3) on which a land (5) is formed. A polyimide tape (6) and a TAB lead (7) constitute a TAB tape. The bump (2) and the land (5) are electrically connected to each other through the flat TAB tape. The land (5) is electrically connected to an external connection electrode (4) through an interconnecting line within the circuit substrate (3). The TAB lead (7) extending from the bump (2) to the land (5) is reduced in length, and the signal through the TAB lead (7) accordingly has improved electrical characteristics. The use of the TAB tape permits the semiconductor device to be applied to the semiconductor chip (1) having the multiplicity of bumps (2).

摘要翻译： 公开了一种半导体器件，其具有改善的散热性能和电特性，并且适用于具有多个电极的集成电路，以及制造半导体器件的方法。 其上形成有凸块（2）的半导体芯片（1）的表面与其上形成有焊盘（5）的电路基板（3）的表面面对面。 聚酰亚胺胶带（6）和TAB导线（7）构成TAB胶带。 凸块（2）和凸台（5）通过平坦的TAB带彼此电连接。 焊盘（5）通过电路基板（3）内的互连线与外部连接电极（4）电连接。 从凸块（2）延伸到焊盘（5）的TAB引线（7）的长度减小，并且通过TAB引线（7）的信号相应地具有改善的电特性。 使用TAB带可以将半导体器件施加到具有多个凸起（2）的半导体芯片（1）上。

公开(公告)号：US6071755A

公开(公告)日：2000-06-06

申请号：US360484

申请日：1999-07-23

申请人： Shinji Baba ,  Jun Shibata ,  Tetsuya Ueda

发明人： Shinji Baba ,  Jun Shibata ,  Tetsuya Ueda

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L21/68 ,  H01L23/12 ,  H01L23/31 ,  H01L23/433 ,  H01L23/498 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/568 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351

摘要： A semiconductor device includes an encapsulating resin encapsulating a semiconductor substrate, a lead pattern or a laminated wiring layers transferred or secured on the lower surface of the encapsulating resin and a plurality of external electrode disposed on the lower surface of the lead pattern. The device may be manufactured by bonding a semiconductor substrate to a transferring substrate on which a lead pattern is formed, resin encapsulating an upper portion of the transferring substrate to cover the semiconductor substrate, and removing only the transferring substrate with the lead pattern left bonded to the encapsulating resin and the semiconductor substrate.

摘要翻译： 半导体器件包括封装半导体衬底的封装树脂，引线图案或被转移或固定在封装树脂的下表面上的层叠布线层和设置在引线图案的下表面上的多个外部电极。 该器件可以通过将半导体衬底粘合到其上形成引线图案的转印衬底上，将封装转印衬底的上部的树脂覆盖半导体衬底，并且仅将转印衬底除去，并将引线图案留下 封装树脂和半导体衬底。

公开(公告)号：US5309021A

公开(公告)日：1994-05-03

申请号：US961352

申请日：1992-10-15

申请人： Haruo Shimamoto ,  Jun Shibata ,  Toru Tachikawa ,  Tetsuya Ueda ,  Hiroshi Seki

发明人： Haruo Shimamoto ,  Jun Shibata ,  Toru Tachikawa ,  Tetsuya Ueda ,  Hiroshi Seki

IPC分类号： H01L21/60 ,  H01L23/28 ,  H01L23/495 ,  H01L23/50 ,  H05K1/02 ,  H05K3/34 ,  H01L39/02 ,  H01L23/58 ,  H01L23/12 ,  H01L23/48

CPC分类号： H01L23/49527 ,  H01L23/49517 ,  H05K3/341 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/0263 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K3/3426 ,  Y02P70/613

摘要： A semiconductor device according to the present invention has reduced inductance on a power supply line, a grounding line, and signal lines. In this invention, to reduce the length of the power supply connection and that of the grounding connection, a power supply metal post and a grounding metal post are respectively provided on a power supply lead of a semiconductor chip and grounding lead of the semiconductor chip perpendicular to the leads. The metal posts protrude from the resin encapsulating the chip and are connected to lands or a conductive circuit pattern on a printed circuit board. Furthermore, a planar conductor commonly connecting the power supply or grounding potentials is provided.

摘要翻译： 根据本发明的半导体器件具有减小电源线，接地线和信号线上的电感。 在本发明中，为了减小电源连接的长度和接地连接的长度，分别在半导体芯片的电源引线和半导体芯片的接地引线垂直地设置电源金属柱和接地金属柱 到线索 金属柱从封装芯片的树脂突出，并连接到印刷电路板上的焊盘或导电电路图案。 此外，提供通常连接电源或接地电位的平面导体。

公开(公告)号：US5969426A

公开(公告)日：1999-10-19

申请号：US571604

申请日：1995-12-13

申请人： Shinji Baba ,  Jun Shibata ,  Tetsuya Ueda

发明人： Shinji Baba ,  Jun Shibata ,  Tetsuya Ueda

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L21/68 ,  H01L23/12 ,  H01L23/31 ,  H01L23/433 ,  H01L23/498 ,  H01L23/28 ,  H01L23/48

CPC分类号： H01L21/568 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351

摘要： A semiconductor device includes an encapsulating resin encapsulating a semiconductor substrate, a lead pattern or a laminated wiring layers transferred or secured on the lower surface of the encapsulating resin and a plurality of external electrode disposed on the lower surface of the lead pattern. The device may be manufactured by bonding a semiconductor substrate on a transferring substrate to which a lead pattern is formed, resin encapsulating an upper portion of the transferring substrate to cover the semiconductor substrate, and removing only the transferring substrate with the lead pattern left bonded to the encapsulating resin and the semiconductor substrate.

摘要翻译： 半导体器件包括封装半导体衬底的封装树脂，引线图案或被转移或固定在封装树脂的下表面上的层叠布线层和设置在引线图案的下表面上的多个外部电极。 该器件可以通过将半导体衬底接合到其上形成引线图案的转印衬底上，将封装转印衬底的上部的树脂覆盖半导体衬底，并且仅将转印衬底除去，并将引线图案留下 封装树脂和半导体衬底。

公开(公告)号：US07709475B2

公开(公告)日：2010-05-04

申请号：US11596735

申请日：2005-05-19

申请人： Yoshikazu Iwasawa ,  Jun Shibata ,  Tadashi Shimamura ,  Hideki Kurihara ,  Takashi Mita ,  Nobuhiko Kawanishi ,  Takashi Hashihayata ,  Mikako Kawamura ,  Takeshi Sagara ,  Sachie Arai ,  Hiroshi Hirai

发明人： Yoshikazu Iwasawa ,  Jun Shibata ,  Tadashi Shimamura ,  Hideki Kurihara ,  Takashi Mita ,  Nobuhiko Kawanishi ,  Takashi Hashihayata ,  Mikako Kawamura ,  Takeshi Sagara ,  Sachie Arai ,  Hiroshi Hirai

IPC分类号： C07D417/12 ,  A61K31/506 ,  C07D417/14 ,  C07D491/08

CPC分类号： C07D417/14 ,  C07D417/12 ,  C07D491/08

摘要： The present invention relates to a compound represented by Formula [I]: wherein X is O, S, NH or CH2; Y1, Y2, Y3, Y4 and Y5, which may be identical or different, are each CH or N; however, at least one of Y1, Y2, Y3, Y4 and Y5 is N; Z1 and Z2, which may be identical or different, are each CH or N; n is an integer from 1 to 3; R1 is a C3-C8 cycloalkyl group, a C6-C10 aryl group, an aliphatic heterocyclic ring or an aromatic heterocyclic ring, or a bicyclic aliphatic saturated hydrocarbon group; R2 and R3, which may be identical or different, are each a hydrogen atom, a lower alkyl group, a lower alkenyl group, a C3-C8 cycloalkyl group, a C6-C10 aryl group, an aromatic heterocyclic ring, or the like; and R4 is a hydrogen atom, a lower alkyl group, a C3-C6 cycloalkyl group or the like, or a pharmaceutically acceptable salt or ester thereof, and a selective inhibitor against Cdk4 and/or Cdk6 or an anticancer agent containing the compound or a pharmaceutically acceptable salt or ester thereof.

摘要翻译： 本发明涉及由式[I]表示的化合物：其中X是O，S，NH或CH 2; Y1，Y2，Y3，Y4和Y5可以相同或不同，分别为CH或N; 然而，Y 1，Y 2，Y 3，Y 4和Y 5中的至少一个为N; 可以相同或不同的Z 1和Z 2各自为CH或N; n为1〜3的整数， R1是C3-C8环烷基，C6-C10芳基，脂族杂环或芳族杂环，或双环脂族饱和烃基; R2和R3可以相同或不同，分别为氢原子，低级烷基，低级烯基，C3-C8环烷基，C6-C10芳基，芳族杂环等; R4为氢原子，低级烷基，C3-C6环烷基等，或其药学上可接受的盐或酯，以及对Cdk4和/或Cdk6的选择性抑制剂或含有该化合物或 其药学上可接受的盐或酯。

公开(公告)号：US07046960B2

公开(公告)日：2006-05-16

申请号：US10001759

申请日：2001-10-24

申请人： Makoto Takemoto ,  Katsuyuki Kawase ,  Tetsu Takase ,  Jun Shibata

发明人： Makoto Takemoto ,  Katsuyuki Kawase ,  Tetsu Takase ,  Jun Shibata

IPC分类号： H04B7/14

CPC分类号： H04H20/06 ,  H04B1/52 ,  H04B1/525 ,  H04B7/15585 ,  H04H20/67

摘要： While a spectrum waveform of an output signal from a subtracter (207) is visibly monitored, an operator controls a variable phases shifter (208) based upon a second control signal (CL2) so that a shape of a spectrum waveform of an output signal from a subtracter (207) is approximated to a spectrum waveform of a desirable wave to change a phase of a local oscillation frequency signal from a local oscillator (206). As a result, a phase of a duplicated loop signal is changed. Also, the operator controls a variable attenuator (209) based upon a first control signal (CL1) so that a shape of this spectrum waveform is approximated to a spectrum waveform of a desirable wave (20) to change a signal level of the duplicated loop signal.

摘要翻译： 当可见地监视来自减法器（207）的输出信号的频谱波形时，操作员基于第二控制信号（CL 2）控制可变相移器（208），使得输出信号的频谱波形的形状 近似于从本地振荡器（206）改变本地振荡频率信号的相位的期望波的频谱波形。 结果，改变了重复的环路信号的相位。 另外，操作员根据第一控制信号（CL 1）控制可变衰减器（209），使得该频谱波形的形状近似于期望波（20）的频谱波形，以改变复制的信号的信号电平 回路信号。

公开(公告)号：US06545365B2

公开(公告)日：2003-04-08

申请号：US09781237

申请日：2001-02-13

申请人： Takashi Kondo ,  Koji Bando ,  Jun Shibata ,  Kazuko Narutaki

发明人： Takashi Kondo ,  Koji Bando ,  Jun Shibata ,  Kazuko Narutaki

IPC分类号： H01L2348

CPC分类号： H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

摘要： A resin-sealed chip stack type semiconductor device comprises a substrate placed on many balls, a bottom chip to which wires are connected, a top chip to which wires are connected and mounted above the bottom chip, a non-conductive bonding layer which functions to bond and fix the two chips to each other, and a sealing resin which covers and protects all the components mounted on the substrate. The non-conductive bonding layer is provided by die bonding in such a manner that is at least covers the portion of the bottom chip where the corresponding wires are connected and does not allow generation of a gap between the two chips.

摘要翻译： 一种树脂密封芯片堆叠型半导体器件，包括放置在许多球上的衬底，连接有导线的底部芯片，连接并且安装在底部芯片上方的导线的顶部芯片，非导电结合层，其功能于 将两个芯片彼此粘合并固定，以及密封树脂，其覆盖并保护安装在基板上的所有部件。 非导电结合层通过芯片接合以至少覆盖底部芯片的相应导线连接部分并且不允许在两个芯片之间产生间隙的方式提供。

公开(公告)号：US5834340A

公开(公告)日：1998-11-10

申请号：US977666

申请日：1997-11-24

申请人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

发明人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

IPC分类号： H01L21/56 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/12 ,  H01L23/28 ,  H01L23/31 ,  H01L23/367 ,  H01L23/485 ,  H01L23/498 ,  H05K3/30 ,  H01L21/44

CPC分类号： H01L21/568 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/28 ,  H01L24/83 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/17051 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/81207 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/1579 ,  H01L2924/181 ,  Y10T29/49169

摘要： A pad electrode is formed on a main surface of a semiconductor chip. A passivation film, which covers a surface portion of the pad electrode, is formed on the main surface of the semiconductor chip. An internal connection conductor is formed on a surface portion of the pad electrode. The semiconductor chip is covered with a molding resin which exposes only a top surface of the internal connection conductor. An external connection conductor is formed on a top surface of the internal connection conductor. The external connection conductor has a substantially flat top surface. Thereby, a plastic molded semiconductor package can be easily mounted on a printed board, and can have improved reliability after being joined on the printed board.

公开(公告)号：US5710062A

公开(公告)日：1998-01-20

申请号：US456335

申请日：1995-06-01

申请人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

发明人： Akiyoshi Sawai ,  Haruo Shimamoto ,  Toru Tachikawa ,  Jun Shibata

IPC分类号： H01L21/56 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/12 ,  H01L23/28 ,  H01L23/31 ,  H01L23/367 ,  H01L23/485 ,  H01L23/498 ,  H05K3/30 ,  H01L21/28

CPC分类号： H01L21/568 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/28 ,  H01L24/83 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/17051 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/81207 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/1579 ,  H01L2924/181 ,  Y10T29/49169

摘要： A pad electrode is formed on a main surface of a semiconductor chip. A passivation film, which covers a surface portion of the pad electrode, is formed on the main surface of the semiconductor chip. An internal connection conductor is formed on a surface portion of the pad electrode. The semiconductor chip is covered with a molding resin which exposes only a top surface of the internal connection conductor. An external connection conductor is formed on a top surface of the internal connection conductor. The external connection conductor has a substantially flat top surface. Thereby, a plastic molded semiconductor package can be easily mounted on a printed board, and can have improved reliability after being joined on the printed board.