公开(公告)号：US07368306B2

公开(公告)日：2008-05-06

申请号：US11347283

申请日：2006-02-06

申请人： Hideto Ohnuma ,  Yukie Nemoto

发明人： Hideto Ohnuma ,  Yukie Nemoto

IPC分类号： H01L21/00

CPC分类号： H01J9/025 ,  H01J1/3044

摘要： It is an object to provide techniques for forming a field emission device of a field emission display device with the use of an inexpensive large-sized substrate according to the process that enables improving productivity.A field emission device according to the present invention includes a cathode electrode formed on an insulating surface of a substrate and a convex electron emission portion formed at a surface of the cathode electrode, and the cathode electrode and the electron emission portion include the same semiconductor film. The electron emission portion has a conical shape or a whiskers shape.

摘要翻译： 本发明的目的是提供根据能够提高生产率的方法，通过使用便宜的大尺寸基板来形成场发射显示装置的场致发射装置的技术。 根据本发明的场发射器件包括形成在衬底的绝缘表面上的阴极电极和形成在阴极电极的表面处的凸电子发射部分，并且阴极电极和电子发射部分包括相同的半导体膜 。 电子发射部分具有圆锥形状或晶须形状。

公开(公告)号：US20060141657A1

公开(公告)日：2006-06-29

申请号：US11347283

申请日：2006-02-06

申请人： Hideto Ohnuma ,  Yukie Nemoto

发明人： Hideto Ohnuma ,  Yukie Nemoto

IPC分类号： H01L21/00

CPC分类号： H01J9/025 ,  H01J1/3044

摘要： It is an object to provide techniques for forming a field emission device of a field emission display device with the use of an inexpensive large-sized substrate according to the process that enables improving productivity. A field emission device according to the present invention includes a cathode electrode formed on an insulating surface of a substrate and a convex electron emission portion formed at a surface of the cathode electrode, and the cathode electrode and the electron emission portion include the same semiconductor film. The electron emission portion has a conical shape or a whiskers shape.

公开(公告)号：US07015496B2

公开(公告)日：2006-03-21

申请号：US10739155

申请日：2003-12-19

申请人： Hideto Ohnuma ,  Yukie Nemoto

发明人： Hideto Ohnuma ,  Yukie Nemoto

IPC分类号： H01L29/06

CPC分类号： H01J9/025 ,  H01J1/3044

摘要： It is an object to provide techniques for forming a field emission device of a field emission display device with the use of an inexpensive large-sized substrate according to the process that enables improving productivity.A field emission device according to the present invention includes a cathode electrode formed on an insulating surface of a substrate and a convex electron emission portion formed at a surface of the cathode electrode, and the cathode electrode and the electron emission portion include the same semiconductor film. The electron emission portion has a conical shape or a whiskers shape.

摘要翻译： 本发明的目的是提供根据能够提高生产率的方法，通过使用便宜的大尺寸基板来形成场发射显示装置的场致发射装置的技术。 根据本发明的场发射器件包括形成在衬底的绝缘表面上的阴极电极和形成在阴极电极的表面处的凸电子发射部分，并且阴极电极和电子发射部分包括相同的半导体膜 。 电子发射部分具有圆锥形状或晶须形状。

公开(公告)号：US08574976B2

公开(公告)日：2013-11-05

申请号：US12904235

申请日：2010-10-14

申请人： Shunpei Yamazaki ,  Naoto Kusumoto ,  Hideto Ohnuma ,  Koichiro Tanaka

发明人： Shunpei Yamazaki ,  Naoto Kusumoto ,  Hideto Ohnuma ,  Koichiro Tanaka

IPC分类号： H01L21/00

CPC分类号： H01L27/127 ,  G02F1/13454 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78696

摘要： A TFT having a high threshold voltage is connected to the source electrode of each TFT that constitutes a CMOS circuit. In another aspect, pixel thin-film transistors are constructed such that a thin-film transistor more distant from a gate line drive circuit has a lower threshold voltage. In a further aspect, a control film that is removable in a later step is formed on the surface of the channel forming region of a TFT, and doping is performed from above the control film.

公开(公告)号：US08471262B2

公开(公告)日：2013-06-25

申请号：US13238754

申请日：2011-09-21

申请人： Shunpei Yamazaki ,  Satoshi Murakami ,  Jun Koyama ,  Yukio Tanaka ,  Hidehito Kitakado ,  Hideto Ohnuma

发明人： Shunpei Yamazaki ,  Satoshi Murakami ,  Jun Koyama ,  Yukio Tanaka ,  Hidehito Kitakado ,  Hideto Ohnuma

IPC分类号： H01L27/14

CPC分类号： G02F1/1368 ,  G02F1/133345 ,  G02F1/13454 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2201/123 ,  G02F2202/104 ,  H01L27/12 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/3248 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3272 ,  H01L27/3276 ,  H01L29/458 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78675 ,  H01L2029/7863 ,  H01L2227/323

摘要： This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.

公开(公告)号：US08470648B2

公开(公告)日：2013-06-25

申请号：US12899993

申请日：2010-10-07

申请人： Shunpei Yamazaki ,  Hideto Ohnuma ,  Tetsuya Kakehata

发明人： Shunpei Yamazaki ,  Hideto Ohnuma ,  Tetsuya Kakehata

IPC分类号： H01L21/762

CPC分类号： H01L27/1266 ,  H01L21/31662 ,  H01L21/76254 ,  H01L21/8221 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1203 ,  H01L27/1214 ,  H01L27/1229 ,  H01L29/66772 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2224/80001

摘要： A semiconductor device including a plurality of field-effect transistors which are stacked with a planarization layer interposed therebetween over a substrate having an insulating surface, in which semiconductor layers in the plurality of field-effect transistors are separated from semiconductor substrates, and the semiconductor layers are bonded to an insulating layer formed over the substrate having an insulating surface or an insulating layer formed over the planarization layer.

摘要翻译： 一种半导体器件，包括多个场效应晶体管，所述多个场效应晶体管在其间具有绝缘表面的衬底上层叠有平坦化层，所述多个场效应晶体管中的半导体层与半导体衬底分离，并且所述半导体层 被结合到形成在具有形成在平坦化层上的绝缘表面或绝缘层的衬底上的绝缘层。

公开(公告)号：US08324032B2

公开(公告)日：2012-12-04

申请号：US13152492

申请日：2011-06-03

申请人： Hideto Ohnuma ,  Ichiro Uehara

发明人： Hideto Ohnuma ,  Ichiro Uehara

IPC分类号： H01L21/84

CPC分类号： H01L27/1288 ,  H01L21/28114 ,  H01L21/32136 ,  H01L21/32139 ,  H01L27/1214 ,  H01L29/42384 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L2029/7863 ,  Y10S438/949

摘要： Formation of LDD structures and GOLD structures in a semiconductor device is conventionally performed in a self aligning manner with gate electrodes as masks, but there are many cases in which the gate electrodes have two layer structures, and film formation processes and etching processes become complex. Further, in order to perform formation of LDD structures and GOLD structures only by processes such as dry etching, the transistor structures all have the same structure, and it is difficult to form LDD structures, GOLD structures, and single drain structures separately for different circuits. By applying a photolithography process for forming gate electrodes to photomasks or reticles, in which supplemental patterns having a function of reducing, the intensity of light and composed of diffraction grating patterns or translucent films, are established, GOLD structure, LDD structure, and single drain structure transistors can be easily manufactured for different circuits through dry etching and ion injection process steps.

摘要翻译： 通常以半导体器件中的LDD结构和GOLD结构的形式，以栅电极作为掩模进行自对准，但是栅电极具有两层结构的情况很多，成膜工艺和蚀刻工艺变得复杂。 此外，为了仅通过诸如干蚀刻的工艺来形成LDD结构和GOLD结构，晶体管结构都具有相同的结构，并且难以分别形成用于不同电路的LDD结构，GOLD结构和单个漏极结构 。 通过对光栅掩模或掩模版形成栅极电极的光刻工艺，建立了具有降低光的强度并由衍射光栅图案或半透明膜构成的功能的补充图案，GOLD结构，LDD结构和单漏极 通过干蚀刻和离子注入工艺步骤可以容易地为不同的电路制造结构晶体管。

公开(公告)号：US08273613B2

公开(公告)日：2012-09-25

申请号：US12621537

申请日：2009-11-19

申请人： Hongyong Zhang ,  Yasuhiko Takemura ,  Toshimitsu Konuma ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi

发明人： Hongyong Zhang ,  Yasuhiko Takemura ,  Toshimitsu Konuma ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi

IPC分类号： H01L21/84

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.

摘要翻译： 提供了一种方法，通过该方法可以容易地形成轻掺杂漏极（LDD）区域，并且在具有覆盖有氧化物覆盖层的栅电极的薄膜晶体管中的源/漏区域中以良好的产率形成。 通过以栅极电极作为掩模，以自对准的方式将杂质引入岛状硅膜中形成轻掺杂漏极（LDD）区域。 首先，通过使用旋转 - 倾斜离子注入在岛状硅膜中形成低浓度杂质区，以相对于衬底从倾斜方向进行离子掺杂。 此时也在栅电极下方形成低浓度杂质区。 之后，将高浓度的杂质通常引入衬底，从而形成高浓度杂质区域。 在上述过程中，低浓度杂质区域保留在栅电极下方并构成轻掺杂漏区。

公开(公告)号：US20120193435A1

公开(公告)日：2012-08-02

申请号：US13361988

申请日：2012-01-31

申请人： Kazuya HANAOKA ,  Hideto Ohnuma ,  Teruyuki Fujii

发明人： Kazuya HANAOKA ,  Hideto Ohnuma ,  Teruyuki Fujii

IPC分类号： G06K19/077

CPC分类号： H01Q1/2208 ,  H01Q9/0407 ,  H01Q23/00

摘要： An object of the present invention is to prevent electrical characteristics of circuit elements from being adversely affected by copper diffusion in a semiconductor device having an integrated circuit and an antenna formed over one substrate, which uses copper plating for the antenna. Another object is to prevent a defect of a semiconductor device due to poor connection between an antenna and an integrated circuit in a semiconductor device having the integrated circuit and the antenna formed over one substrate. In a semiconductor device having an integrated circuit 100 and an antenna 101 formed over one substrate 102, when a copper plating layer 108 is used for a conductor of the antenna 101, it is possible to decrease an adverse effect on electrical characteristics of circuit elements due to copper diffusion because a base layer 107 of the antenna 101 uses a nitride film of a predetermined metal.

摘要翻译： 本发明的目的是为了防止在具有集成电路的半导体器件中的电路元件的电气特性受到不利影响，并且在一个衬底上形成天线，该衬底使用用于天线的铜电镀。 另一个目的是防止在具有集成电路的半导体器件中的天线与集成电路之间的不良连接导致半导体器件的缺陷，并且形成在一个衬底上的天线。 在具有集成电路100和在一个基板102上形成的天线101的半导体器件中，当将铜镀层108用于天线101的导体时，可以减少对电路元件的电特性的不利影响， 由于天线101的基极层107使用预定金属的氮化物膜而导致铜扩散。

公开(公告)号：US08222117B2

公开(公告)日：2012-07-17

申请号：US12076794

申请日：2008-03-24

申请人： Shunpei Yamazaki ,  Hideto Ohnuma

发明人： Shunpei Yamazaki ,  Hideto Ohnuma

IPC分类号： H01L21/30

CPC分类号： H01L21/76254 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07786 ,  H01L21/84 ,  H01L24/83 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/83851 ,  H01L2924/00011 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2224/29075 ,  H01L2924/00014 ,  H01L2924/00

摘要： An SOI substrate and a manufacturing method of the SOI substrate, by which enlargement of the substrate is possible and its productivity can be increased, are provided. A step (A) of cutting a single crystal silicon substrate to form a single crystal silicon substrate which is n (n is an optional positive integer, n≧1) times as large as a size of one shot of an exposure apparatus; a step (B) of forming an insulating layer on one surface of the single crystal silicon substrate, and forming an embrittlement layer in the single crystal substrate; and a step (C) of bonding a substrate having an insulating surface and the single crystal silicon substrate with the insulating layer therebetween, and conducting heat treatment to separate the single crystal silicon substrate along the embrittlement layer, and forming a single crystal silicon thin film on the substrate having an insulating surface are conducted.

摘要翻译： 提供SOI衬底和SOI衬底的制造方法，通过其可以扩大衬底并提高其生产率。 一种切割单晶硅衬底以形成单一曝光设备的一个大小的n（n是任选的正整数，n≥1）倍的单晶硅衬底的步骤（A）; 在单晶硅衬底的一个表面上形成绝缘层并在单晶衬底中形成脆化层的步骤（B）; 以及使具有绝缘面的基板与单晶硅基板之间具有绝缘层的步骤（C），并进行热处理以沿着脆化层分离单晶硅基板，并且形成单晶硅薄膜 在具有绝缘表面的基板上进行。