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公开(公告)号:US20120104578A1
公开(公告)日:2012-05-03
申请号:US13342583
申请日:2012-01-03
申请人: Hsien-Pin Hu , Chen-Hu Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
发明人: Hsien-Pin Hu , Chen-Hu Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
IPC分类号: H01L23/495
CPC分类号: H01L21/561 , H01L21/486 , H01L23/147 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/97 , H01L25/0655 , H01L2224/05001 , H01L2224/05027 , H01L2224/05571 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2924/00012 , H01L2924/00 , H01L2224/05541 , H01L2224/05005 , H01L2224/05599 , H01L2224/05099
摘要: A method includes providing an interposer wafer including a substrate, and a plurality of through-substrate vias (TSVs) extending from a front surface of the substrate into the substrate. A plurality of dies is bonded onto a front surface of the interposer wafer. After the step of bonding the plurality of dies, a grinding is performed on a backside of the substrate to expose the plurality of TSVs. A plurality of metal bumps is formed on a backside of the interposer wafer and electrically coupled to the plurality of TSVs.
摘要翻译: 一种方法包括提供包括衬底的中介层晶片,以及从衬底的前表面延伸到衬底中的多个贯通衬底通孔(TSV)。 多个管芯结合到插入件晶片的前表面上。 在结合多个模具的步骤之后,在基板的背面进行研磨以暴露多个TSV。 多个金属凸块形成在插入器晶片的背面并电耦合到多个TSV。
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公开(公告)号:US08759150B2
公开(公告)日:2014-06-24
申请号:US13488188
申请日:2012-06-04
申请人: Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
发明人: Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
IPC分类号: H01L21/50
CPC分类号: H01L21/561 , H01L21/486 , H01L23/147 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/97 , H01L25/0655 , H01L2224/05001 , H01L2224/05027 , H01L2224/05571 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2924/00012 , H01L2924/00 , H01L2224/05541 , H01L2224/05005 , H01L2224/05599 , H01L2224/05099
摘要: A method includes providing an interposer wafer including a substrate, and a plurality of through-substrate vias (TSVs) extending from a front surface of the substrate into the substrate. A plurality of dies is bonded onto a front surface of the interposer wafer. After the step of bonding the plurality of dies, a grinding is performed on a backside of the substrate to expose the plurality of TSVs. A plurality of metal bumps is formed on a backside of the interposer wafer and electrically coupled to the plurality of TSVs.
摘要翻译: 一种方法包括提供包括衬底的中介层晶片,以及从衬底的前表面延伸到衬底中的多个贯通衬底通孔(TSV)。 多个管芯结合到插入件晶片的前表面上。 在结合多个模具的步骤之后,在基板的背面进行研磨以暴露多个TSV。 多个金属凸块形成在插入器晶片的背面并电耦合到多个TSV。
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公开(公告)号:US08105875B1
公开(公告)日:2012-01-31
申请号:US12904835
申请日:2010-10-14
申请人: Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
发明人: Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
IPC分类号: H01L21/50
CPC分类号: H01L21/561 , H01L21/486 , H01L23/147 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/97 , H01L25/0655 , H01L2224/05001 , H01L2224/05027 , H01L2224/05571 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2924/00012 , H01L2924/00 , H01L2224/05541 , H01L2224/05005 , H01L2224/05599 , H01L2224/05099
摘要: A method includes providing an interposer wafer including a substrate, and a plurality of through-substrate vias (TSVs) extending from a front surface of the substrate into the substrate. A plurality of dies is bonded onto a front surface of the interposer wafer. After the step of bonding the plurality of dies, a grinding is performed on a backside of the substrate to expose the plurality of TSVs. A plurality of metal bumps is formed on a backside of the interposer wafer and electrically coupled to the plurality of TSVs.
摘要翻译: 一种方法包括提供包括衬底的中介层晶片,以及从衬底的前表面延伸到衬底中的多个贯通衬底通孔(TSV)。 多个管芯结合到插入件晶片的前表面上。 在结合多个模具的步骤之后,在基板的背面进行研磨以暴露多个TSV。 多个金属凸块形成在插入器晶片的背面并电耦合到多个TSV。
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公开(公告)号:US08319349B2
公开(公告)日:2012-11-27
申请号:US13342583
申请日:2012-01-03
申请人: Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
发明人: Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
IPC分类号: H01L23/48
CPC分类号: H01L21/561 , H01L21/486 , H01L23/147 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/97 , H01L25/0655 , H01L2224/05001 , H01L2224/05027 , H01L2224/05571 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2924/00012 , H01L2924/00 , H01L2224/05541 , H01L2224/05005 , H01L2224/05599 , H01L2224/05099
摘要: A method includes providing an interposer wafer including a substrate, and a plurality of through-substrate vias (TSVs) extending from a front surface of the substrate into the substrate. A plurality of dies is bonded onto a front surface of the interposer wafer. After the step of bonding the plurality of dies, a grinding is performed on a backside of the substrate to expose the plurality of TSVs. A plurality of metal bumps is formed on a backside of the interposer wafer and electrically coupled to the plurality of TSVs.
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公开(公告)号:US20120238057A1
公开(公告)日:2012-09-20
申请号:US13488188
申请日:2012-06-04
申请人: Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
发明人: Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
IPC分类号: H01L21/60
CPC分类号: H01L21/561 , H01L21/486 , H01L23/147 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/97 , H01L25/0655 , H01L2224/05001 , H01L2224/05027 , H01L2224/05571 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2924/00012 , H01L2924/00 , H01L2224/05541 , H01L2224/05005 , H01L2224/05599 , H01L2224/05099
摘要: A method includes providing an interposer wafer including a substrate, and a plurality of through-substrate vias (TSVs) extending from a front surface of the substrate into the substrate. A plurality of dies is bonded onto a front surface of the interposer wafer. After the step of bonding the plurality of dies, a grinding is performed on a backside of the substrate to expose the plurality of TSVs. A plurality of metal bumps is formed on a backside of the interposer wafer and electrically coupled to the plurality of TSVs.
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公开(公告)号:US08693163B2
公开(公告)日:2014-04-08
申请号:US12873931
申请日:2010-09-01
申请人: An-Jhih Su , Chi-Chun Hsieh , Tzu-Yu Wang , Wei-Cheng Wu , Hsien-Pin Hu , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng
发明人: An-Jhih Su , Chi-Chun Hsieh , Tzu-Yu Wang , Wei-Cheng Wu , Hsien-Pin Hu , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng
IPC分类号: H01L29/92 , H01L21/768
CPC分类号: H01L28/40 , H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/13 , H01L24/14 , H01L28/92 , H01L2224/0401 , H01L2224/05008 , H01L2224/0557 , H01L2224/13025 , H01L2224/13099 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/14181 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要: A device includes a substrate having a front surface and a back surface opposite the front surface. A capacitor is formed in the substrate and includes a first capacitor plate; a first insulation layer encircling the first capacitor plate; and a second capacitor plate encircling the first insulation layer. Each of the first capacitor plate, the first insulation layer, and the second capacitor plate extends from the front surface to the back surface of the substrate.
摘要翻译: 一种装置包括具有与前表面相对的前表面和后表面的基底。 电容器形成在衬底中,并包括第一电容器板; 围绕所述第一电容器板的第一绝缘层; 以及环绕所述第一绝缘层的第二电容器板。 第一电容器板,第一绝缘层和第二电容器板中的每一个从基板的前表面延伸到后表面。
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公开(公告)号:US08878338B2
公开(公告)日:2014-11-04
申请号:US13485340
申请日:2012-05-31
申请人: Chun Hua Chang , Der-Chyang Yeh , Kuang-Wei Cheng , Yuan-Hung Liu , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng
发明人: Chun Hua Chang , Der-Chyang Yeh , Kuang-Wei Cheng , Yuan-Hung Liu , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng
CPC分类号: H01L28/40 , H01L21/02 , H01L21/768 , H01L23/147 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/5223 , H01L23/53295 , H01L28/60 , H01L29/02 , H01L2924/0002 , H01L2924/00
摘要: Capacitor designs for substrates, such as interposers, and methods of manufacture thereof are disclosed. A through via is formed in the interposer, and a capacitor is formed between a lower level metallization layer and a higher level metallization layer. The capacitor may be, for example, a planar capacitor with dual capacitor dielectric layers.
摘要翻译: 公开了用于衬底的电容器设计,例如插入件及其制造方法。 在插入器中形成通孔,并且在下层金属化层和较高级金属化层之间形成电容器。 电容器可以是例如具有双电容器电介质层的平面电容器。
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公开(公告)号:US08765549B2
公开(公告)日:2014-07-01
申请号:US13458476
申请日:2012-04-27
申请人: Chun Hua Chang , Shin-Puu Jeng , Der-Chyang Yeh , Shang-Yun Hou , Wen-Chih Chiou
发明人: Chun Hua Chang , Shin-Puu Jeng , Der-Chyang Yeh , Shang-Yun Hou , Wen-Chih Chiou
IPC分类号: H01L21/8242
CPC分类号: H01L23/642 , H01L23/49822 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要: Capacitor designs for substrates, such as interposers, and methods of manufacture thereof are disclosed. In an embodiment, a capacitor is formed between a through via and a lower level metallization layer. The capacitor may be, for example, a planar capacitor formed on the substrate or on a dielectric layer formed over the substrate.
摘要翻译: 公开了用于衬底的电容器设计,例如插入件及其制造方法。 在一个实施例中,在通孔和下层金属化层之间形成电容器。 电容器可以是例如形成在衬底上或形成在衬底上的电介质层上的平面电容器。
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公开(公告)号:US08716867B2
公开(公告)日:2014-05-06
申请号:US12778867
申请日:2010-05-12
申请人: Francis Ko , Chi-Chun Hsieh , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人: Francis Ko , Chi-Chun Hsieh , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: B41F33/00
CPC分类号: H01L23/5384 , H01L21/76898 , H01L23/147 , H01L23/481 , H01L23/49822 , H01L23/49827 , H01L23/49883 , H01L23/525 , H01L23/5328 , H01L24/05 , H01L24/13 , H01L24/14 , H01L2224/0401 , H01L2224/05572 , H01L2224/13009 , H01L2224/13147 , H01L2224/13644 , H01L2224/13655 , H01L2224/14181 , H01L2924/00014 , H01L2924/0002 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要: A method of forming a device includes printing conductive patterns on a dielectric sheet to form a pre-ink-printed sheet, and bonding the pre-ink-printed sheet onto a side of a substrate. The conductive feature includes a through-substrate via extending from a first major side of the substrate to a second major side of the substrate opposite the first major side. A conductive paste is then applied to electrically couple conductive patterns to a conductive feature in the substrate.
摘要翻译: 形成器件的方法包括在电介质片上印刷导电图案以形成预先印墨的片材,以及将预印墨片材粘合到基片的一侧上。 导电特征包括从衬底的第一主侧延伸到与第一主侧相对的衬底的第二主侧的贯通衬底。 然后施加导电膏以将导电图案电耦合到衬底中的导电特征。
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公开(公告)号:US20130285200A1
公开(公告)日:2013-10-31
申请号:US13458476
申请日:2012-04-27
申请人: Chun Hua Chang , Shin-Puu Jeng , Der-Chyang Yeh , Shang-Yun Hou , Wen-Chih Chiou
发明人: Chun Hua Chang , Shin-Puu Jeng , Der-Chyang Yeh , Shang-Yun Hou , Wen-Chih Chiou
CPC分类号: H01L23/642 , H01L23/49822 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要: Capacitor designs for substrates, such as interposers, and methods of manufacture thereof are disclosed. In an embodiment, a capacitor is formed between a through via and a lower level metallization layer. The capacitor may be, for example, a planar capacitor formed on the substrate or on a dielectric layer formed over the substrate.
摘要翻译: 公开了用于衬底的电容器设计,例如插入件及其制造方法。 在一个实施例中,在通孔和下层金属化层之间形成电容器。 电容器可以是例如形成在衬底上或形成在衬底上的电介质层上的平面电容器。
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