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公开(公告)号:US20230299043A1
公开(公告)日:2023-09-21
申请号:US17698282
申请日:2022-03-18
Applicant: Intel Corporation
Inventor: Bernd Waidhas , Sonja Koller , Jan Proschwitz , Eduardo De Mesa
IPC: H01L25/065 , H01L23/498 , H01L23/48 , H01L23/00
CPC classification number: H01L25/0652 , H01L23/481 , H01L23/49816 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/16235 , H01L2224/16245 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311
Abstract: Embodiments of a microelectronic assembly comprises a first layer, a second layer and a third layer in a stack; a package substrate in the first layer, the package substrate comprising a metallic via structure; a first integrated circuit (IC) die surrounded by an organic dielectric material in the second layer, the first IC die coupled to the package substrate; a second IC die in the third layer, the second IC die coupled to the first IC die; and a third IC die in the third layer, the third IC die coupled to the first IC die. An electrically conductive pathway in the first IC die electrically couples the third IC die and the second IC die, and the first IC die is coupled to the package substrate with a thermally conductive material in contact with the metallic via structure in the package substrate.
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公开(公告)号:US11374323B2
公开(公告)日:2022-06-28
申请号:US16473566
申请日:2017-03-31
Applicant: Intel Corporation
Inventor: Andreas Augustin , Sonja Koller , Bernd Waidhas , Georg Seidemann , Andreas Wolter , Stephan Stoeckl , Thomas Wagner , Josef Hagn
Abstract: A patch antenna array is fabricated with a package-on-package setup that contains a transceiver. The patch antenna array has a footprint that intersects the transceiver footprint. The package-on-package setup includes through-mold vias that couple to a redistribution layer disposed between the patch antennas and the package-on-package setup.
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公开(公告)号:US20180150156A1
公开(公告)日:2018-05-31
申请号:US15879729
申请日:2018-01-25
Applicant: Intel Corporation
Inventor: Sven Albers , Klaus Reingruber , Teodora Ossiander , Andreas Wolter , Sonja Koller , Georg Seidemann , Jan Proschwitz , Hans-Joachim Barth , Bastiaan Elshof
IPC: G06F3/044 , G06F3/045 , G06F3/042 , G01L1/24 , G06F3/0354 , G06F3/038 , H04B1/3827 , G06F1/16
CPC classification number: G06F3/044 , G01L1/24 , G06F1/163 , G06F3/03547 , G06F3/038 , G06F3/042 , G06F3/045 , G06F2203/04102 , G06F2203/04109 , H04B1/385
Abstract: Some forms relate to wearable computing devices that include a “touch pad” like interface. In some forms, the example wearable computing devices may be integrated with (or attached to) textiles (i.e. clothing). In other forms, the example wearable computing devices may be attached directly to the skin of someone (i.e., similar to a bandage) that utilizes any of the example wearable computing devices. The example wearable computing devices include a flexible touch pad that may allow a user of the wearable computing device to more easily operate the wearable computing device. The example wearable computing devices described herein may include a variety of electronics. Some examples include a power supply and/or a communication device among other types of electronics.
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公开(公告)号:US11877403B2
公开(公告)日:2024-01-16
申请号:US17486462
申请日:2021-09-27
Applicant: Intel Corporation
Inventor: Georg Seidemann , Sonja Koller , Bernd Waidhas
IPC: H05K3/34 , H01L23/498
CPC classification number: H05K3/3436 , H01L23/49816
Abstract: A printed wiring-board island relieves added complexity to a printed circuit board. The printed wiring-board island creates an island form factor in the printed circuit board. Coupling of a semiconductive device package to the printed wiring-board island includes a ball-grid array. The ball-grid array can at least partially penetrate the printed wiring-board island.
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公开(公告)号:US11784143B2
公开(公告)日:2023-10-10
申请号:US16421315
申请日:2019-05-23
Applicant: Intel Corporation
Inventor: Sonja Koller , Kilian Roth , Josef Hagn , Andreas Wolter , Andreas Augustin
IPC: H01L23/66 , H01L23/31 , H01L23/538 , H01L23/552 , H01L21/48 , H01P3/00 , H01P11/00 , H01Q1/22 , H01L21/56
CPC classification number: H01L23/66 , H01L21/4853 , H01L21/565 , H01L23/315 , H01L23/3128 , H01L23/5389 , H01L23/552 , H01P3/003 , H01P11/001 , H01Q1/2283 , H01L2223/6627 , H01L2223/6638 , H01L2223/6677
Abstract: Embodiments include semiconductor packages and methods of forming the semiconductor packages. A semiconductor package includes a die over a substrate, a first conductive layer over the die, and a conductive cavity antenna over the first conductive layer and substrate. The conductive cavity antenna includes a conductive cavity, a cavity region, and a plurality of interconnects. The conductive cavity is over the first conductive layer and surrounds the cavity region. The semiconductor package also includes a second conductive layer over the conductive cavity antenna, first conductive layer, and substrate. The conductive cavity extends vertically from the first conductive layer to the second conductive layer. The cavity region may be embedded with the conductive cavity, the first conductive layer, and the second conductive layer. The plurality of interconnects may include first, second, and third interconnects. The first interconnects may include through-mold vias (TMVs), through-silicon vias (TSVs), conductive sidewalls, or conductive trenches.
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公开(公告)号:US20230282615A1
公开(公告)日:2023-09-07
申请号:US17685871
申请日:2022-03-03
Applicant: Intel Corporation
Inventor: Thomas Wagner , Abdallah Bacha , Vishnu Prasad , Mohan Prashanth Javare Gowda , Bernd Waidhas , Sonja Koller , Eduardo De Mesa , Jan Proschwitz , Lizabeth Keser
IPC: H01L25/065 , H01L23/498 , H01L23/31 , H01L23/538 , H01L23/00
CPC classification number: H01L25/0652 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/5389 , H01L24/16 , H01L24/17 , H01L24/32 , H01L25/0657 , H01L2224/16146 , H01L2224/16227 , H01L2224/17181 , H01L2224/32225 , H01L2225/06513 , H01L2225/06517 , H01L2924/15311
Abstract: A microelectronic assembly is provided, comprising: an interposer having a first side and a second side opposite to the first side; a plurality of integrated circuit (IC) dies in a plurality of layers on the first side of the interposer, the plurality of IC dies being encased by a dielectric material; a package substrate on the second side of the interposer; a plurality of conductive vias through the plurality of layers; and redistribution layers adjacent to the layers in the plurality of layers, at least some of the redistribution layers comprising conductive traces coupling the conductive vias to the IC dies.
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公开(公告)号:US09921694B2
公开(公告)日:2018-03-20
申请号:US14778142
申请日:2014-12-16
Applicant: Intel Corporation
Inventor: Sven Albers , Klaus Reingruber , Teodora Ossiander , Andreas Wolter , Sonja Koller , Georg Seidemann , Jan Proschwitz , Hans-Joachim Barth , Bastiaan Elshof
IPC: G09G5/00 , G06F3/044 , H04B1/3827 , G01L1/24 , G06F1/16 , G06F3/038 , G06F3/042 , G06F3/045 , G06F3/0354
CPC classification number: G06F3/044 , G01L1/24 , G06F1/163 , G06F3/03547 , G06F3/038 , G06F3/042 , G06F3/045 , G06F2203/04102 , G06F2203/04109 , H04B1/385
Abstract: Some forms relate to wearable computing devices that include a “touch pad” like interface. In some forms, the example wearable computing devices may be integrated with (or attached to) textiles (i.e. clothing). In other forms, the example wearable computing devices may be attached directly to the skin of someone (i.e., similar to a bandage) that utilizes any of the example wearable computing devices. The example wearable computing devices include a flexible touch pad that may allow a user of the wearable computing device to more easily operate the wearable computing device. The example wearable computing devices described herein may include a variety of electronics. Some examples include a power supply and/or a communication device among other types of electronics.
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公开(公告)号:US20230300975A1
公开(公告)日:2023-09-21
申请号:US17699211
申请日:2022-03-21
Applicant: Intel Corporation
Inventor: Jan Proschwitz , Sonja Koller , Thomas Wagner , Vishnu Prasad , Wolfgang Molzer
CPC classification number: H05K1/0284 , H01L21/4803 , H01L23/13 , H01L25/0652 , H01L25/18 , H05K3/305 , H05K1/181 , H01L25/0657 , H01L24/16
Abstract: Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. For example, in some embodiments, a microelectronic assembly may include a substrate having a surface including a first cavity; a first die at least partially nested in the first cavity and electrically coupled to the substrate; and a circuit board having a surface including a second cavity, wherein the surface of the substrate is electrically coupled to the surface of the circuit board, and wherein the first die extends at least partially into the second cavity in the circuit board.
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公开(公告)号:US09368461B2
公开(公告)日:2016-06-14
申请号:US14280110
申请日:2014-05-16
Applicant: INTEL CORPORATION
Inventor: Sven Albers , Georg Seidemann , Sonja Koller , Stephan Stoeckl , Shubhada H. Sahasrabudhe , Sandeep B. Sane
IPC: H01L23/00 , H01L23/498
CPC classification number: H01L24/05 , H01L23/49811 , H01L23/49816 , H01L24/03 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0401 , H01L2224/141 , H01L2224/16238 , H01L2924/15311 , H01L2924/3511 , H05K1/111 , H05K3/3436 , H05K2201/0373
Abstract: Disclosed herein are contact pads for use with integrated circuit (IC) packages. In some embodiments, a contact pad disclosed herein may be disposed on a substrate of an IC package, and may include a metal projection portion and a metal recess portion. Each of the metal projection portion and the metal recess portion may have a solder contact surface. The solder contact surface of the metal recess portion may be spaced away from the solder contact surface of the metal projection portion. Related devices and techniques are also disclosed herein, and other embodiments may be claimed.
Abstract translation: 这里公开了与集成电路(IC)封装一起使用的接触焊盘。 在一些实施例中,本文公开的接触垫可以设置在IC封装的基板上,并且可以包括金属突出部分和金属凹部。 金属突出部和金属凹部中的每一个可以具有焊料接触表面。 金属凹部的焊接接触表面可以与金属突出部的焊接接触表面间隔开。 本文还公开了相关的设备和技术,并且可以要求保护其他实施例。
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公开(公告)号:US20230317544A1
公开(公告)日:2023-10-05
申请号:US17700211
申请日:2022-03-21
Applicant: Intel Corporation
Inventor: Jan Proschwitz , Sonja Koller , Thomas Wagner , Vishnu Prasad , Wolfgang Molzer
IPC: H01L25/18 , H01L23/498 , H01L23/367
CPC classification number: H01L23/367 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/49838 , H01L25/18 , H01L24/73 , H01L2224/73204
Abstract: Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. For example, in some embodiments, a microelectronic assembly may include a substrate having a first surface including a cavity and an opposing second surface; a die above the cavity and electrically coupled to the second surface of the substrate; a circuit board attached to the substrate; and a cooling apparatus at least partially nested in the cavity, wherein the cooling apparatus is in thermal contact with the die. In some embodiments, a microelectronic assembly may include a circuit board having a surface including a cavity; a substrate having a first surface attached to the circuit board and a die electrically coupled to an opposing second surface; and a cooling apparatus at least partially nested in the cavity, wherein the cooling apparatus is in thermal contact with the die.
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