公开(公告)号：US20050034994A1

公开(公告)日：2005-02-17

申请号：US10947628

申请日：2004-09-21

申请人： Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent Basol ,  Homayoun Talieh ,  Cyprian Uzoh

发明人： Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent Basol ,  Homayoun Talieh ,  Cyprian Uzoh

IPC分类号： C25D7/12 ,  C25F7/00 ,  C25D5/00 ,  B23H3/00

CPC分类号： C25F7/00 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885

摘要： Deposition of conductive material on or removal of conductive material from a workpiece frontal side of a semiconductor workpiece is performed by providing an anode having an anode area which is to face the workpiece frontal side, and electrically connecting the workpiece frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the workpiece frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the workpiece is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the workpiece frontal side surface, in its entirety, is thus permitted.

公开(公告)号：US07476304B2

公开(公告)日：2009-01-13

申请号：US10947628

申请日：2004-09-21

申请人： Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

发明人： Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

IPC分类号： C25D17/00 ,  C25D5/00

CPC分类号： C25F7/00 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885

摘要： Deposition of conductive material on or removal of conductive material from a workpiece frontal side of a semiconductor workpiece is performed by providing an anode having an anode area which is to face the workpiece frontal side, and electrically connecting the workpiece frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the workpiece frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the workpiece is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the workpiece frontal side surface, in its entirety, is thus permitted.

摘要翻译： 通过提供具有正面与工件正面的阳极区域并将工件正面与至少一个电气电连接的阳极进行导电材料沉积在导电材料上或从半导体工件的工件正面去除导电材料 通过将电触点和工件正面推入彼此靠近，在阳极区域外部接触。 在阳极和电接触之间施加电位，并且工件相对于阳极和电触点移动。 因此允许在工件正面侧面上进行全面电镀或电解抛光。

公开(公告)号：US06852208B2

公开(公告)日：2005-02-08

申请号：US10265460

申请日：2002-10-03

申请人： Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

发明人： Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

IPC分类号： C25D7/12 ,  C25F7/00 ,  C25D5/00

CPC分类号： C25F7/00 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885

摘要： Deposition of conductive material on or removal of conductive material from a workpiece frontal side of a semiconductor workpiece is performed by providing an anode having an anode area which is to face the workpiece frontal side, and electrically connecting the workpiece frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the workpiece frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the workpiece is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the workpiece frontal side surface, in its entirety, is thus permitted.

摘要翻译： 通过提供具有正面与工件正面的阳极区域并将工件正面与至少一个电气电连接的阳极进行导电材料沉积在导电材料上或从半导体工件的工件正面去除导电材料 通过将电触点和工件正面推入彼此靠近，在阳极区域外部接触。 在阳极和电接触之间施加电位，并且工件相对于阳极和电触点移动。 因此允许在工件正面侧面上进行全面电镀或电解抛光。

公开(公告)号：US20070004316A1

公开(公告)日：2007-01-04

申请号：US11452609

申请日：2006-06-13

申请人： Jalal Ashjaee ,  Boris Govzman ,  Bernard Frey ,  Boguslaw Nagorski ,  Douglas Young ,  Bulent Basol ,  Homayoun Talieh

发明人： Jalal Ashjaee ,  Boris Govzman ,  Bernard Frey ,  Boguslaw Nagorski ,  Douglas Young ,  Bulent Basol ,  Homayoun Talieh

IPC分类号： B24B51/00 ,  B24B7/00

CPC分类号： H01L21/67745 ,  B24B37/345 ,  G05B19/41865 ,  G05B2219/32272 ,  G05B2219/45031 ,  H01L21/67028 ,  H01L21/67034 ,  H01L21/67046 ,  H01L21/67051 ,  H01L21/67173 ,  H01L21/67219 ,  H01L21/68707 ,  H01L21/68728 ,  Y02P90/20

摘要： An integrated process tool for chemical mechanical processing, cleaning and drying a semiconductor workpiece is provided. The integrated process tool includes a CMP module and a cleaning and drying module. After being processed, the workpiece is transported from the CMP module to the cleaning and drying module using a movable housing. In the cleaning and drying module, a cleaning mechanism is used to clean the workpiece while the workpiece is rotated and held by a support stucture of the movable housing. A drying mechanism of the cleaning and drying module picks up the workpiece from the moveable housing and spin dries it. Throughout the CMP process, cleaning and drying, the processed surface of the wafer faces down.

摘要翻译： 提供了用于化学机械加工，清洁和干燥半导体工件的集成工艺工具。 集成工艺工具包括CMP模块和清洁和干燥模块。 在处理之后，使用可动壳体将工件从CMP模块传送到清洁和干燥模块。 在清洁和干燥模块中，使用清洁机构来清洁工件，同时工件被可移动壳体的支撑结构旋转并保持。 清洁和干燥模块的干燥机构从可移动的壳体上拾取工件并使其干燥。 在整个CMP过程中，清洁和干燥，晶片的经处理表面面朝下。

公开(公告)号：US20050079713A1

公开(公告)日：2005-04-14

申请号：US10920028

申请日：2004-08-16

申请人： Jalal Ashjaee ,  Rimma Volodarsky ,  Cyprian Uzoh ,  Bulent Basol ,  Homayoun Talieh

发明人： Jalal Ashjaee ,  Rimma Volodarsky ,  Cyprian Uzoh ,  Bulent Basol ,  Homayoun Talieh

IPC分类号： H01L21/00 ,  H01L21/288 ,  H01L21/3213 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L21/6708 ,  H01L21/2885 ,  H01L21/32134

摘要： The present invention provides at least one nozzle that sprays a rotating workpiece with an etchant at an edge thereof. The at least one nozzle is located in an upper chamber of a vertically configured processing subsystem that also includes mechanisms for plating, cleaning and drying in upper and lower chambers

摘要翻译： 本发明提供了至少一个喷嘴，其在其边缘处用蚀刻剂喷射旋转的工件。 所述至少一个喷嘴位于垂直构造的处理子系统的上腔室中，所述处理子系统还包括用于在上腔室和下室中进行电镀，清洁和干燥的机构

公开(公告)号：US06482307B2

公开(公告)日：2002-11-19

申请号：US09735546

申请日：2000-12-14

申请人： Jalal Ashjaee ,  Boguslaw A. Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

发明人： Jalal Ashjaee ,  Boguslaw A. Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

IPC分类号： C25D518

CPC分类号： C25D17/001 ,  C25D7/123 ,  C25D17/005 ,  C25F7/00 ,  H01L21/2885

摘要： Deposition of conductive material on or removal of conductive material from a wafer frontal side of a semiconductor wafer is performed by providing an anode having an anode area which is to face the wafer frontal side, and electrically connecting the wafer frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the wafer frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the wafer is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the wafer frontal side surface, in its entirety, is thus permitted.

摘要翻译： 通过提供具有面向晶片正面的阳极区域的阳极和将晶片正面与至少一个电气电连接来进行导电材料沉积在半导体晶片的晶片正面上或从晶片正面去除导电材料 通过将电接触和晶片正面推动到彼此靠近来接触阳极区域外部。 在阳极和电接触之间施加电势，并且晶片相对于阳极和电触点移动。 因此允许在整个晶片正面侧面上进行全面电镀或电解抛光。

公开(公告)号：US06855037B2

公开(公告)日：2005-02-15

申请号：US09910686

申请日：2001-07-20

申请人： Jalal Ashjaee ,  Homayoun Talieh ,  Bulent Basol ,  Konstantin Volodarsky

发明人： Jalal Ashjaee ,  Homayoun Talieh ,  Bulent Basol ,  Konstantin Volodarsky

IPC分类号： B24B37/30 ,  C25D7/12 ,  C25D17/06 ,  H01L21/00 ,  H01L21/683 ,  B24B1/00

CPC分类号： B24B37/30 ,  C25D17/001 ,  C25D17/06 ,  H01L21/6704 ,  H01L21/6715 ,  H01L21/6838

摘要： The present invention provides a wafer carrier that includes an opening, which in one embodiment is a plurality of holes, disposed along the periphery of the wafer carrier. A gas emitted through the holes onto a peripheral back edge of the wafer assists in preventing the processing liquids and contaminants resulting therefrom from reaching the inner region of the base and the backside inner region of the wafer. In another embodiment, a plurality of concentric sealing members are used to prove a better seal, and the outer seal is preferably independently movable to allow cleaning of a peripheral backside of the wafer to occur while the wafer is still attached to the wafer carrier.

摘要翻译： 本发明提供了一种晶片载体，其包括沿着晶片载体的周边设置的开口，其在一个实施例中是多个孔。 通过孔发射到晶片的外围后缘上的气体有助于防止由此产生的处理液体和污染物到达晶片的底部和内侧区域的内部区域。 在另一个实施例中，使用多个同心密封构件来证明更好的密封，并且外部密封件优选地是独立地可移动的，以允许当晶片仍然附接到晶片载体时清洁晶片的周边背面而发生。

公开(公告)号：US20060219573A1

公开(公告)日：2006-10-05

申请号：US11445594

申请日：2006-06-01

申请人： Cyprian Uzoh ,  Homayoun Talieh ,  Bulent Basol ,  Douglas Young

发明人： Cyprian Uzoh ,  Homayoun Talieh ,  Bulent Basol ,  Douglas Young

IPC分类号： B23H3/00

CPC分类号： B24B37/20 ,  B24B37/046 ,  B24B37/24 ,  B24B37/26 ,  C25D5/06 ,  C25D17/001 ,  C25D17/14 ,  C25F7/00 ,  H01L21/2885 ,  H01L21/76877

摘要： The present invention relates to methods and apparatus for plating a conductive material on a semiconductor substrate by rotating pad or blade type objects in close proximity to the substrate, thereby eliminating/reducing dishing and voids. This is achieved by providing pad or blade type objects mounted on cylindrical anodes or rollers and applying the conductive material to the substrate using the electrolyte solution disposed on or through the pads, or on the blades. In one embodiment of the invention, the pad or blade type objects are mounted on the cylindrical anodes and rotated about a first axis while the workpiece may be stationary or rotate about a second axis, and metal from the electrolyte solution is deposited on the workpiece when a potential difference is applied between the workpiece and the anode. In another embodiment of the present invention, the plating apparatus includes an anode plate spaced apart from the cathode workpiece. Upon application of power to the anode plate and the cathode workpiece, the electrolyte solution disposed in the plating apparatus is used to deposit the conductive material on the workpiece surface using cylindrical rollers having the pad or blade type objects.

摘要翻译： 本发明涉及通过旋转靠近基板的垫片或刀片型物体来在半导体衬底上镀覆导电材料的方法和装置，从而消除/减少凹陷和空隙。 这通过提供安装在圆柱形阳极或辊子上的垫片或刀片型物体，并使用设置在垫片上或穿过垫片上的电解质溶液将导电材料施加到衬底来实现。 在本发明的一个实施例中，衬垫或刀片型物体安装在圆柱形阳极上并围绕第一轴线旋转，同时工件可以是静止的或围绕第二轴线旋转，并且来自电解质溶液的金属沉积在工件上， 在工件和阳极之间施加电位差。 在本发明的另一实施例中，电镀装置包括与阴极工件间隔开的阳极板。 在向阳极板和阴极工件施加电力时，使用设置在电镀装置中的电解液将导电材料沉积在工件表面上，使用具有焊盘或刀片型物体的圆柱形辊。

公开(公告)号：US20060070885A1

公开(公告)日：2006-04-06

申请号：US11295014

申请日：2005-12-06

申请人： Cyprian Uzoh ,  Homayoun Talieh ,  Bulent Basol

发明人： Cyprian Uzoh ,  Homayoun Talieh ,  Bulent Basol

IPC分类号： C25D5/02 ,  C25D5/48

CPC分类号： C25D5/00 ,  C23C18/1608 ,  C23C18/165 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/1696 ,  C23C18/1848 ,  C23C18/31 ,  C25D5/02 ,  C25D5/10 ,  C25D5/22 ,  C25D5/34 ,  H01L21/2885 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76865 ,  H01L21/76871 ,  H01L21/76874 ,  H01L21/76876 ,  H01L21/76879 ,  H01L21/76885 ,  H01L24/11 ,  H01L2221/1089 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01057 ,  H01L2924/0106 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/3011

摘要： The present invention relates to a method for fabricating high performance chip interconnects and packages by providing methods for depositing a conductive material in cavities of a substrate in a more efficient and time saving manner. This is accomplished by selectively removing portions of a seed layer from a top surface of a substrate and then depositing a conductive material in the cavities of the substrate, where portions of the seed layer remains in the cavities. Another method includes forming an oxide layer on the top surface of the substrate such that the conductive material can be deposited in the cavities without the material being formed on the top surface of the substrate. The present invention also discloses methods for forming multi-level interconnects and the corresponding structures.

公开(公告)号：US06974769B2

公开(公告)日：2005-12-13

申请号：US10663318

申请日：2003-09-16

申请人： Bulent Basol ,  Homayoun Talieh ,  Cyprian Uzoh

发明人： Bulent Basol ,  Homayoun Talieh ,  Cyprian Uzoh

IPC分类号： H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/7684

摘要： Conductive structures in features of an insulator layer on a substrate are fabricated by a particular process. In this process, a layer of conductive material is applied over the insulator layer so that the layer of conductive material covers field regions adjacent the features and fills in the features themselves. A grain size differential between the conductive material which covers the field regions and the conductive material which fills in the features is then established by annealing the layer of conductive material. Excess conductive material is then removed to uncover the field regions and leave the conductive structures. The layer of conductive material is applied so as to define a first layer thickness over the field regions and a second layer thickness in and over the features. These thicknesses are dimensioned such that d1≦0.5d2, with d1 being the first layer thickness and d2 being the second layer thickness. Preferably, the first and second layer thicknesses are dimensioned such that d1≦0.3d2.

摘要翻译： 通过特定的工艺制造衬底上的绝缘体层的特征的导电结构。 在该过程中，将导电材料层施加在绝缘体层上，使得导电材料层覆盖与特征相邻的场区域并填充特征本身。 然后通过退火导电材料层来建立覆盖场区的导电材料与填充特征的导电材料之间的晶粒尺寸差。 然后去除过量的导电材料以露出场区并留下导电结构。 施加导电材料层以在场区域上限定第一层厚度，并且在特征中和之上限定第二层厚度。 这些厚度的尺寸使得其中d 1是第一层厚度，d 2 <2 < / SUB>为第二层厚度。 优选地，第一层厚度和第二层厚度的尺寸被确定为使得d 1 = 0.3D 2。