公开(公告)号：US06737002B1

公开(公告)日：2004-05-18

申请号：US10067077

申请日：2002-02-04

申请人： James Wilson Rose ,  Donald Leroy Lester ,  Christopher James Kapusta ,  Paul Alan McConnelee

发明人： James Wilson Rose ,  Donald Leroy Lester ,  Christopher James Kapusta ,  Paul Alan McConnelee

IPC分类号： B29C4514

CPC分类号： B29C70/70

摘要： A chip-on-flex HDI module is fabricated by dispensing encapsulant material onto the components of a populated dielectric film or sheet in an interrupted pattern which leaves the backsides of selected components free of encapsulant. The dispensing is accomplished by relative motion of the dispenser tip and the populated film, with the dispenser tip at a height slightly above the desired liquid fill height during dispensing. At the locations of the components which are to be free of encapsulant, the dispensing stops, and the tip may be raised to prevent residual viscous matter on the dispenser tip from contacting the backside of the exposed component.

摘要翻译： 通过将密封剂材料以间断的图案分配填充的电介质膜或片材的组件来制造柔性片上HDI模块，这使得所选部件的背面不含密封剂。 分配是通过分配器尖端和填充膜的相对运动来实现的，其中分配器尖端在分配期间略高于期望的液体填充高度的高度。 在不含密封剂的部件的位置处，分配停止，并且尖端可以升高以防止分配器尖端上的残留粘性物质接触暴露部件的背面。

公开(公告)号：US20130049151A1

公开(公告)日：2013-02-28

申请号：US13222967

申请日：2011-08-31

申请人： Vladimir A. Lobastov ,  Kevin Matthew Durocher ,  John Eric Tkaczyk ,  James Wilson Rose ,  Paul Alan McConnelee

发明人： Vladimir A. Lobastov ,  Kevin Matthew Durocher ,  John Eric Tkaczyk ,  James Wilson Rose ,  Paul Alan McConnelee

IPC分类号： H01L27/146 ,  H01L31/18

CPC分类号： H01L27/14676 ,  A61B6/037 ,  A61B6/4208 ,  H01L27/14618 ,  H01L27/14636 ,  H01L27/14659 ,  H01L27/14683 ,  H01L27/14696 ,  H01L2924/0002 ,  H01L2924/00

摘要： Interconnect structures suitable for use in connecting anode-illuminated detector modules to downstream circuitry are disclosed. In certain embodiments, the interconnect structures are based on or include low atomic number or polymeric features and/or are formed at a density or thickness so as to minimize or reduce radiation attenuation by the interconnect structures.

摘要翻译： 公开了适用于将阳极照射检测器模块连接到下游电路的互连结构。 在某些实施方案中，互连结构基于或包括低原子数或聚合物特征，和/或以密度或厚度形成，以便最小化或减少互连结构的辐射衰减。

公开(公告)号：US08691371B2

公开(公告)日：2014-04-08

申请号：US11828543

申请日：2007-07-26

申请人： Tae Won Kim ,  Min Yan ,  Ahmet Gun Erlat ,  Thomas Bert Gorczyca ,  Christian Maria Anton Heller ,  Paul Alan McConnelee ,  Marc Schaepkens

发明人： Tae Won Kim ,  Min Yan ,  Ahmet Gun Erlat ,  Thomas Bert Gorczyca ,  Christian Maria Anton Heller ,  Paul Alan McConnelee ,  Marc Schaepkens

IPC分类号： B32B7/02

CPC分类号： B32B27/30 ,  B32B27/08 ,  B32B27/20 ,  B32B27/38 ,  H01L51/5256 ,  Y10T428/24975 ,  Y10T428/265 ,  Y10T428/31504 ,  Y10T428/31507 ,  Y10T428/31667 ,  Y10T428/31678 ,  Y10T428/31786 ,  Y10T428/31855

摘要： A barrier coating for a composite article is provided. The barrier coating includes an organic zone; an inorganic zone; and an interface zone between the organic zone and the inorganic zone.

摘要翻译： 提供了用于复合制品的阻隔涂层。 阻隔涂层包括有机区域; 无机区; 以及有机区域和无机区域之间的界面区域。

公开(公告)号：US20130045575A1

公开(公告)日：2013-02-21

申请号：US13210763

申请日：2011-08-16

申请人： Thomas Bert Gorczyca ,  Paul Alan McConnelee

发明人： Thomas Bert Gorczyca ,  Paul Alan McConnelee

IPC分类号： H01L21/56 ,  C08J3/28 ,  C08K5/09

CPC分类号： H01L23/28 ,  C08G59/50 ,  C08K5/1515 ,  C08K5/1539 ,  C08K5/17 ,  C08K5/18 ,  C09J163/00 ,  H01L21/56 ,  H01L23/293 ,  H01L2224/48091 ,  H01L2224/92144

摘要： An adhesive includes an epoxy resin and a hardener. The hardener includes trioxdiamine, diaminodicyclohexylmethane, toluene diamine, and bisphenol-A dianhydride.

公开(公告)号：US20120161325A1

公开(公告)日：2012-06-28

申请号：US13349598

申请日：2012-01-13

申请人： Paul Alan McConnelee ,  Arun Virupaksha Gowda

发明人： Paul Alan McConnelee ,  Arun Virupaksha Gowda

IPC分类号： H01L23/522

CPC分类号： H01L24/82 ,  H01L21/486 ,  H01L24/06 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/072 ,  H01L2224/04105 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/2405 ,  H01L2224/2413 ,  H01L2224/24225 ,  H01L2224/27416 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73217 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/83865 ,  H01L2224/83874 ,  H01L2224/92144 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/13026 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/18162 ,  H01L2924/00

摘要： A semiconductor device package is provided. The semiconductor device package includes a laminate comprising a first metal layer disposed on a dielectric film; a plurality of vias extending through the laminate according to a predetermined pattern; one or more semiconductor devices attached to the dielectric film such that the semiconductor device contacts one or more vias; a patterned interconnect layer disposed on dielectric film, said patterned interconnect layer comprising one or more patterned regions of the first metal layer and an electrically conductive layer, wherein a portion of the patterned interconnect layer extends through one or more vias to form an electrical contact with the semiconductor device. The patterned interconnect layer comprises a top interconnect region and a via interconnect region, wherein the package interconnect region has a thickness greater than a thickness of the via interconnect region.

摘要翻译： 提供半导体器件封装。 所述半导体器件封装包括：层叠体，其包含设置在电介质膜上的第一金属层; 根据预定图案延伸穿过层压体的多个通孔; 一个或多个半导体器件连接到电介质膜，使得半导体器件接触一个或多个通孔; 设置在电介质膜上的图案化互连层，所述图案化互连层包括第一金属层的一个或多个图案化区域和导电层，其中图案化互连层的一部分延伸穿过一个或多个通孔以形成与 半导体器件。 图案化互连层包括顶部互连区域和通孔互连区域，其中封装互连区域的厚度大于通孔互连区域的厚度。

公开(公告)号：US20120146234A1

公开(公告)日：2012-06-14

申请号：US12962761

申请日：2010-12-08

申请人： Richard Alfred Beaupre ,  Paul Alan McConnelee ,  Arun Virupaksha Gowda ,  Thomas Bert Gorczyca

发明人： Richard Alfred Beaupre ,  Paul Alan McConnelee ,  Arun Virupaksha Gowda ,  Thomas Bert Gorczyca

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L23/3171 ,  H01L21/56 ,  H01L23/3164 ,  H01L23/3192 ,  H01L24/19 ,  H01L24/20 ,  H01L29/0657 ,  H01L2224/24 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/24227 ,  H01L2224/76155 ,  H01L2224/82 ,  H01L2224/82102 ,  H01L2224/82105 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10155 ,  H01L2924/12036 ,  H01L2924/1204 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/00

摘要： A semiconductor device package includes a semiconductor device having connection pads formed thereon, with the connection pads being formed on first and second surfaces of the semiconductor device with edges of the semiconductor device extending therebetween. A first passivation layer is applied on the semiconductor device and a base dielectric laminate is affixed to the first surface of the semiconductor device that has a thickness greater than that of the first passivation layer. A second passivation layer having a thickness greater than that of the first passivation layer is applied over the first passivation layer and the semiconductor device to cover the second surface and the edges of the semiconductor device, and metal interconnects are coupled to the connection pads, with the metal interconnects extending through vias formed through the first and second passivation layers and the base dielectric laminate sheet to form a connection with the connection pads.

公开(公告)号：US20100224992A1

公开(公告)日：2010-09-09

申请号：US12399083

申请日：2009-03-06

申请人： Paul Alan McConnelee ,  Kevin M. Durocher ,  Donald Paul Cunningham

发明人： Paul Alan McConnelee ,  Kevin M. Durocher ,  Donald Paul Cunningham

IPC分类号： H01L23/52 ,  H01L21/50

CPC分类号： H05K1/185 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/3672 ,  H01L23/5383 ,  H01L23/5389 ,  H01L23/642 ,  H01L23/645 ,  H01L23/647 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/2402 ,  H01L2224/24195 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/1627 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/186 ,  H05K3/386 ,  H05K3/4644 ,  H05K2201/0195 ,  H05K2201/10515 ,  H05K2201/10674 ,  H01L2224/82 ,  H01L2924/00

摘要： An embedded chip package (ECP) includes a plurality of re-distribution layers joined together in a vertical direction to form a lamination stack, each re-distribution layer having vias formed therein. The embedded chip package also includes a first chip embedded in the lamination stack and a second chip attached to the lamination stack and stacked in the vertical direction with respect to the first chip, each of the chips having a plurality of chip pads. The embedded chip package further includes an input/output (I/O) system positioned on an outer-most re-distribution layer of the lamination stack and a plurality of metal interconnects electrically coupled to the I/O system to electrically connect the first and second chips to the I/O system. Each of the plurality of metal interconnects extends through a respective via to form a direct metallic connection with a metal interconnect on a neighboring re-distribution layer or a chip pad on the first or second chip.

摘要翻译： 嵌入式芯片封装（ECP）包括在垂直方向上连接在一起的多个再分配层，以形成层叠叠层，每个再分布层具有形成在其中的通孔。 嵌入式芯片封装还包括嵌入层压叠层中的第一芯片和附接到层压叠层并相对于第一芯片沿垂直方向堆叠的第二芯片，每个芯片具有多个芯片焊盘。 嵌入式芯片封装进一步包括位于叠层堆叠的最外层再分布层上的输入/输出（I / O）系统和电耦合到I / O系统的多个金属互连，以电连接第一和 第二个芯片到I / O系统。 多个金属互连件中的每一个延伸通过相应的通孔，以形成与第一或第二芯片上的相邻再分配层或芯片焊盘上的金属互连件的直接金属连接。

公开(公告)号：US20080202414A1

公开(公告)日：2008-08-28

申请号：US11678215

申请日：2007-02-23

申请人： Min Yan ,  Ahmet Gun Erlat ,  Marc Schaepkens ,  Tae Won Kim ,  Paul Alan McConnelee ,  Matthew Aaron Pellow

发明人： Min Yan ,  Ahmet Gun Erlat ,  Marc Schaepkens ,  Tae Won Kim ,  Paul Alan McConnelee ,  Matthew Aaron Pellow

IPC分类号： B05B5/12

CPC分类号： C23C16/045 ,  B05D1/60 ,  B05D7/02 ,  B05D7/227 ,  C23C16/45578 ,  C23C16/507

摘要： Methods and devices for coating an interior surface of a container using ICPECVD are provided. In one embodiment, a method of coating an interior surface of a container comprises: depositing a barrier film on the interior surface of the container using inductively coupled plasma-enhanced chemical-vapor deposition.

摘要翻译： 提供了使用ICPECVD涂覆容器内表面的方法和装置。 在一个实施例中，涂覆容器的内表面的方法包括：使用电感耦合等离子体增强化学气相沉积将阻挡膜沉积在容器的内表面上。

公开(公告)号：US08941208B2

公开(公告)日：2015-01-27

申请号：US13561811

申请日：2012-07-30

申请人： Shakti Singh Chauhan ,  Arun Virupaksha Gowda ,  Paul Alan McConnelee

发明人： Shakti Singh Chauhan ,  Arun Virupaksha Gowda ,  Paul Alan McConnelee

IPC分类号： H01L21/70

CPC分类号： H01L23/49838 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/3178 ,  H01L23/3735 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/29 ,  H01L24/82 ,  H01L24/83 ,  H01L24/95 ,  H01L25/072 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/8384 ,  H01L2224/92144 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00

摘要： A surface mount packaging structure that yields improved thermo-mechanical reliability and more robust second-level package interconnections is disclosed. The surface mount packaging structure includes a sub-module having a dielectric layer, semiconductor devices attached to the dielectric layer, a first level metal interconnect structure electrically coupled to the semiconductor devices, and a second level I/O connection electrically coupled to the first level interconnect and formed on the dielectric layer on a side opposite the semiconductor devices, with the second level I/O connection configured to connect the sub-module to an external circuit. The semiconductor devices of the sub-module are attached to the first surface of a multi-layer substrate structure, with a dielectric material positioned between the dielectric layer and the multi-layer substrate structure to fill in gaps in the surface-mount structure and provide additional structural integrity thereto.

摘要翻译： 公开了一种表面贴装封装结构，其提供了改善的热机械可靠性和更坚固的二级封装互连。 表面贴装封装结构包括具有电介质层的子模块，附着到电介质层的半导体器件，电耦合到半导体器件的第一级金属互连结构以及电耦合到第一级的第二级I / O连接 互连并形成在与半导体器件相对的一侧的电介质层上，其中第二级I / O连接被配置为将子模块连接到外部电路。 子模块的半导体器件附接到多层衬底结构的第一表面，其中介电材料位于电介质层和多层衬底结构之间以填充表面安装结构中的间隙，并提供 额外的结构完整性。

公开(公告)号：US08704211B2

公开(公告)日：2014-04-22

申请号：US10988481

申请日：2004-11-15

申请人： Tae Won Kim ,  Min Yan ,  Christian Maria Anton Heller ,  Marc Schaepkens ,  Thomas Bert Gorczyca ,  Paul Alan McConnelee ,  Ahmet Gun Erlat

发明人： Tae Won Kim ,  Min Yan ,  Christian Maria Anton Heller ,  Marc Schaepkens ,  Thomas Bert Gorczyca ,  Paul Alan McConnelee ,  Ahmet Gun Erlat

IPC分类号： H01L35/24 ,  H01L51/00

CPC分类号： H01L51/5256

摘要： A composite article with at least one high integrity protective coating, the high integrity protective coating having at least one planarizing layer and at least one organic-inorganic composition barrier coating layer. A method for depositing a high integrity protective coating.

摘要翻译： 具有至少一个高完整性保护涂层的复合制品，所述高完整性保护涂层具有至少一个平坦化层和至少一个有机 - 无机组合物阻挡涂层。 一种用于沉积高完整性保护涂层的方法。