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    Semiconductor device
    6.
    发明申请
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US20060192282A1

    公开(公告)日：2006-08-31

    申请号：US11360808

    申请日：2006-02-24

    申请人： Motoo Suwa ,  Hikaru Ikegami ,  Takafumi Betsui

    发明人： Motoo Suwa ,  Hikaru Ikegami ,  Takafumi Betsui

    IPC分类号： H01L23/34

    CPC分类号： H01L23/5385 ,  H01L23/50 ,  H01L23/5386 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/0102 ,  H01L2924/01055 ,  H01L2924/01078 ,  H01L2924/15173 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/181 ,  H01L2924/00

    摘要： A mounting board has a plurality of semiconductor memory devices operated in sync with a clock signal, and a semiconductor data processing device which access-controls the semiconductor memory devices. Layouts of data-system terminals of the semiconductor memory devices with respect to memory access terminals of the semiconductor data processing device are determined in such a manner that wirings for data and a data strobe system (RTdq/dqs) become shorter than wirings for a command/address system (RTcmd/add). The wirings for the data and data strobe system (RTdq/dqs) are laid down using an area defined between the semiconductor memory devices. The wirings for the command/address system (RTcmd/add) bypass the side of the mounting board.

    摘要翻译： 安装板具有与时钟信号同步操作的多个半导体存储器件，以及访问控制半导体存储器件的半导体数据处理器件。 确定半导体存储器件相对于半导体数据处理器件的存储器访问端子的数据系统端子的布局，使得数据布线和数据选通系统（RTdq / dqs）变得比命令布线短 /地址系统（RTcmd / add）。 数据和数据选通系统（RTdq / dqs）的布线使用半导体存储器件之间定义的区域进行布局。 命令/地址系统（RTcmd / add）的布线绕过安装板侧面。

    Semiconductor device and electronic device
    7.
    发明授权
    Semiconductor device and electronic device 有权
    半导体器件和电子器件

    公开(公告)号：US09390766B2

    公开(公告)日：2016-07-12

    申请号：US13372425

    申请日：2012-02-13

    申请人： Yasuhiro Yoshikawa ,  Motoo Suwa ,  Kazuhiko Hiranuma

    发明人： Yasuhiro Yoshikawa ,  Motoo Suwa ,  Kazuhiko Hiranuma

    IPC分类号： G11C5/06

    CPC分类号： G11C5/063 ,  H01L2224/32225 ,  H01L2224/48465 ,  H01L2224/73265

    摘要： There is a need to provide a semiconductor device and an electronic device capable of easily allowing a bypass capacitor to always improve noise suppression on a signal path in order to transmit a reference potential between chips in different power supply noise states. There is provided a specified signal path that connects a control chip and a memory chip mounted on a mounting substrate and transmits a reference potential generated from the control chip. A bypass capacitor is connected to the specified signal path only at a connecting part where a distance from a reference potential pad of the memory chip to the connecting part along the specified signal path is shorter than a distance from a reference potential pad of the control chip to the connecting part along the specified signal path.

    摘要翻译： 需要提供能够容易地允许旁路电容器总是改善信号路径上的噪声抑制的半导体器件和电子器件，以便以不同的电源噪声状态在芯片之间传输参考电位。 提供了连接控制芯片和安装在安装基板上的存储芯片的指定信号路径，并传输从控制芯片产生的参考电位。 旁路电容器仅在连接部分处连接到指定的信号路径，在连接部分处，沿着指定信号路径的存储芯片的参考电位焊盘到连接部分的距离短于距控制芯片的参考电位焊盘的距离 沿着指定的信号路径连接到连接部分。

    Semiconductor device with reduced cross talk
    8.
    发明授权
    Semiconductor device with reduced cross talk 有权
    具有减少串扰的半导体器件

    公开(公告)号：US07888788B2

    公开(公告)日：2011-02-15

    申请号：US12860415

    申请日：2010-08-20

    申请人： Yasuhiro Yoshikawa ,  Motoo Suwa ,  Hiroshi Toyoshima

    发明人： Yasuhiro Yoshikawa ,  Motoo Suwa ,  Hiroshi Toyoshima

    IPC分类号： H01L23/52 ,  H01L21/4763

    CPC分类号： H01L23/528 ,  H01L23/49838 ,  H01L23/50 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/05599

    摘要： Mutual inductance from an external output signal system to an external input signal system, in which parallel input/output operation is enabled, is reduced. A semiconductor integrated circuit has a plurality of external connection terminals facing a package substrate, and has an external input terminal and an external output terminal, in which parallel input/output operation is enabled, as part of the external connection terminals. The package substrate has a plurality of wiring layers for electrically connecting between the external connection terminals and module terminals corresponding to each other. A first wiring layer facing the semiconductor integrated circuit has a major wiring for connecting between the external input terminal and a module terminal corresponding to each other, and a second wiring layer in which the module terminals are formed has a major wiring for connecting between an external output terminal and a module terminal corresponding to each other. A major signal wiring of an external output system connected to the external output terminal, which may be a noise source, is made to be in a wiring layer distant from the semiconductor integrated circuit.

    摘要翻译： 从外部输出信号系统到能够并联输入/输出操作的外部输入信号系统的互感减小。 半导体集成电路具有面向封装基板的多个外部连接端子，具有能够并行输入/输出操作的外部输入端子和外部输出端子作为外部连接端子的一部分。 封装基板具有用于将外部连接端子和彼此对应的模块端子之间电连接的多个布线层。 面向半导体集成电路的第一布线层具有用于连接外部输入端子和彼此对应的模块端子之间的主要布线，并且其中形成模块端子的第二布线层具有用于连接外部 输出端子和对应的模块端子。 连接到可能是噪声源的外部输出端子的外部输出系统的主要信号布线被制成在远离半导体集成电路的布线层中。

    SEMICONDUCTOR DEVICE WITH REDUCED CROSS TALK
    9.
    发明申请
    SEMICONDUCTOR DEVICE WITH REDUCED CROSS TALK 有权
    具有减少交叉口的半导体器件

    公开(公告)号：US20100314761A1

    公开(公告)日：2010-12-16

    申请号：US12860415

    申请日：2010-08-20

    申请人： Yasuhiro Yoshikawa ,  Motoo Suwa ,  Hiroshi Toyoshima

    发明人： Yasuhiro Yoshikawa ,  Motoo Suwa ,  Hiroshi Toyoshima

    IPC分类号： H01L23/498

    CPC分类号： H01L23/528 ,  H01L23/49838 ,  H01L23/50 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/05599

    摘要： Mutual inductance from an external output signal system to an external input signal system, in which parallel input/output operation is enabled, is reduced. A semiconductor integrated circuit has a plurality of external connection terminals facing a package substrate, and has an external input terminal and an external output terminal, in which parallel input/output operation is enabled, as part of the external connection terminals. The package substrate has a plurality of wiring layers for electrically connecting between the external connection terminals and module terminals corresponding to each other. A first wiring layer facing the semiconductor integrated circuit has a major wiring for connecting between the external input terminal and a module terminal corresponding to each other, and a second wiring layer in which the module terminals are formed has a major wiring for connecting between an external output terminal and a module terminal corresponding to each other. A major signal wiring of an external output system connected to the external output terminal, which may be a noise source, is made to be in a wiring layer distant from the semiconductor integrated circuit.

    摘要翻译： 从外部输出信号系统到能够并联输入/输出操作的外部输入信号系统的互感减小。 半导体集成电路具有面向封装基板的多个外部连接端子，具有能够并行输入/输出操作的外部输入端子和外部输出端子作为外部连接端子的一部分。 封装基板具有用于将外部连接端子和彼此对应的模块端子之间电连接的多个布线层。 面向半导体集成电路的第一布线层具有用于连接外部输入端子和彼此对应的模块端子之间的主要布线，并且其中形成模块端子的第二布线层具有用于连接外部 输出端子和对应的模块端子。 连接到可能是噪声源的外部输出端子的外部输出系统的主要信号布线被制成在远离半导体集成电路的布线层中。