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15 条记录 (耗时 0.02 秒)

    Selective nitride: oxide anisotropic etch process
    4.
    发明授权
    Selective nitride: oxide anisotropic etch process 失效
    选择性氮化物：氧化物各向异性蚀刻工艺

    公开(公告)号：US06656375B1

    公开(公告)日：2003-12-02

    申请号：US09014806

    申请日：1998-01-28

    申请人： Michael D. Armacost ,  David M. Dobuzinsky ,  John C. Malinowski ,  Hung Y. Ng ,  Richard S. Wise ,  Chienfan Yu

    发明人： Michael D. Armacost ,  David M. Dobuzinsky ,  John C. Malinowski ,  Hung Y. Ng ,  Richard S. Wise ,  Chienfan Yu

    IPC分类号： C23F100

    CPC分类号： H01L21/31116

    摘要： An anisotropic etching process for a nitride layer of a substrate, the process comprising using an etchant gas which comprises a hydrogen-rich fluorohydrocarbon, an oxidant and a carbon source. The hydrogen-rich fluorohydrocarbon is preferably one of CH3F or CH2F2, the carbon source is preferably one of CO2 or CO, and the oxidant is preferably O2. The fluorohydrocarbon is preferably present in the gas at approximately 7%-35% by volume, the oxidant is preferably present in the gas at approximately 1%-35% by volume, and the carbon source is preferably present in the gas at approximately 30%-92%.

    摘要翻译： 用于衬底的氮化物层的各向异性蚀刻工艺，该方法包括使用包含富氢氟代烃，氧化剂和碳源的蚀刻剂气体。 富氢氟烃优选为CH 3 F或CH 2 F 2之一，碳源优选为CO 2或CO之一，氧化剂优选为O 2。 氟烃优选以约7％-35体积％存在于气体中，氧化剂优选以约1％-35％体积的比例存在于气体中，并且碳源优选以约30％的比例存在于气体中， -92％。

    Method of polishing C4 molybdenum masks to remove molybdenum peaks
    6.
    发明授权
    Method of polishing C4 molybdenum masks to remove molybdenum peaks 有权
    抛光C4钼掩模以除去钼峰的方法

    公开(公告)号：US07025891B2

    公开(公告)日：2006-04-11

    申请号：US10604991

    申请日：2003-08-29

    申请人： Steven R. Codding ,  Timothy C. Krywanczyk ,  Joseph D. Danaher ,  John C. Malinowski ,  James R. Palmer ,  Melvin T. Kelly ,  Caitlin W. Weinstein ,  Wolfgang Sauter

    发明人： Steven R. Codding ,  Timothy C. Krywanczyk ,  Joseph D. Danaher ,  John C. Malinowski ,  James R. Palmer ,  Melvin T. Kelly ,  Caitlin W. Weinstein ,  Wolfgang Sauter

    IPC分类号： B44C1/22 ,  C25F3/00

    CPC分类号： H01L21/3212 ,  C23F3/06

    摘要： A method of treating a molybdenum (moly) mask used in a C4 process to pattern C4 contacts. The moly mask has a wafer side which contacts a wafer during the C4 process and has a rough surface that includes spikes/projections of moly. The moly mask also has a non wafer side and a plurality of holes extending through the mask to pattern C4 contacts in the C4 process. An adhesive layer, such as an adhesive tape, is applied to the non wafer side of the moly mask, to enable a polishing tool to pull a vacuum on the non wafer side of the moly mask in spite of the presence of the holes to secure the moly mask during a subsequent polishing step. The tape also functions as a cushion so that defects on the non wafer side of the moly mask do not replicate through the moly mask to the polished wafer side of the moly mask. The wafer side of the moly mask is then subjected to mechanical or chemical/mechanical polishing to substantially remove the spikes of moly without significantly altering the dimensions of the moly mask or the holes.

    摘要翻译： 一种处理C4工艺中使用的钼（钼）掩模的图案化C4接触的方法。 钼掩模具有在C4工艺期间接触晶片的晶片侧，并且具有包括钼的尖峰/突起的粗糙表面。 钼掩模还具​​有非晶片侧和在C4工艺中延伸穿过掩模以形成图案C4触点的多个孔。 粘合剂层例如胶带被施加到钼掩模的非晶片侧，以使抛光工具能够在钼掩模的非晶片侧上拉真空，尽管存在孔以确保 在随后的抛光步骤期间的钼掩模。 胶带还起垫片的作用，使得钼掩模的非晶片侧的缺陷不会通过钼掩模复制到钼掩模的抛光晶片侧。 然后对钼掩模的晶片侧进行机械或化学/机械抛光，以基本上除去钼的尖峰而不显着改变钼掩模或孔的尺寸。

    Discontinuous guard ring
    7.
    发明授权
    Discontinuous guard ring 有权
    不连续的护环

    公开(公告)号：US08729664B2

    公开(公告)日：2014-05-20

    申请号：US13437273

    申请日：2012-04-02

    申请人： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Mark D. Levy ,  John C. Malinowski

    发明人： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Mark D. Levy ,  John C. Malinowski

    IPC分类号： H01L29/15 ,  H01L23/52 ,  H01L29/47 ,  H01L27/095

    CPC分类号： H01L29/0619 ,  H01L23/562 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit chip comprising a guard ring formed on a semiconductor substrate that surrounds the active region of the integrated circuit chip and extends from the semiconductor substrate through one or more of a plurality of wiring levels. The guard ring comprises stacked metal lines with spaces breaking up each respective metal line. Each space may be formed such that it partially overlies the space in the metal line directly below but does not overlie any other space. Alternatively, each space may also be formed such that each space is at least completely overlying the space in the metal line below it.

    摘要翻译： 一种集成电路芯片，包括形成在半导体衬底上的保护环，所述保护环围绕所述集成电路芯片的有源区并从所述半导体衬底延伸穿过多个布线层中的一个或多个。 保护环包括堆叠金属线，空间分开各个金属线。 每个空间可以被形成为使得其部分地覆盖金属线中的空间直接在下方，但不覆盖任何其它空间。 或者，每个空间也可以形成为使得每个空间至少完全覆盖在其下面的金属线中的空间。