公开(公告)号：US20060281321A1

公开(公告)日：2006-12-14

申请号：US11152289

申请日：2005-06-13

申请人： John Conley ,  Yoshi Ono ,  Lisa Stecker

发明人： John Conley ,  Yoshi Ono ,  Lisa Stecker

IPC分类号： H01L21/311

CPC分类号： B81C1/00182 ,  B81B2201/0214 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/775

摘要： A method of fabricating a nanowire sensor device structure includes preparing a substrate, having a silicon base layer, a buried oxide layer in the silicon base layer, a top silicon layer on the buried oxide layer, and a doped well in the silicon base layer; forming a silicon island from the top silicon layer; etching the buried oxide layer to undercut the silicon island in some instances; depositing a seed layer of polycrystalline ZnO over the silicon island, the buried oxide layer, the doped well and the silicon base layer; selectively removing the polycrystalline ZnO from the silicon island; growing and structuring ZnO nanostructures on the seed layer of ZnO; treating the ZnO nanostructures to sensitize the ZnO nanostructures to a desired application; depositing a layer of insulating material; patterning and etching the insulating material; and metallizing the nanowire device structure.

摘要翻译： 制造纳米线传感器器件结构的方法包括制备具有硅基底层，硅基底层中的掩埋氧化物层，掩埋氧化物层上的顶部硅层和硅基底层中的掺杂阱的衬底; 从顶层硅层形成硅岛; 在一些情况下蚀刻掩埋氧化物层以切割硅岛; 在硅岛，掩埋氧化物层，掺杂阱和硅基层上沉积多晶ZnO晶种层; 从硅岛选择性去除多晶ZnO; 在ZnO的种子层上生长和构造ZnO纳米结构; 处理ZnO纳米结构以使ZnO纳米结构对所需的应用敏化; 沉积一层绝缘材料; 图案化和蚀刻绝缘材料; 并且对纳米线器件结构进行金属化。

公开(公告)号：US20060071207A1

公开(公告)日：2006-04-06

申请号：US10956786

申请日：2004-10-01

申请人： John Conley ,  Lisa Stecker ,  Gregory Stecker

发明人： John Conley ,  Lisa Stecker ,  Gregory Stecker

IPC分类号： H01L29/12 ,  H01L21/00

CPC分类号： C30B11/12 ,  C30B29/16 ,  C30B29/605 ,  H01L21/02381 ,  H01L21/02554 ,  H01L21/02603 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  Y10S977/762 ,  Y10S977/773 ,  Y10S977/811

摘要： Zinc-oxide nanostructures are formed by forming a pattern on a surface of a substrate. A catalyst metal, such as nickel, is formed on the surface of the substrate. Growth of at least one zinc oxide nanostructure is induced on the catalyst metal substantially over the pattern on the surface of the substrate based on a vapor-liquid-solid technique. In one exemplary embodiment, inducing the growth of at least one zinc-oxide nanostructure induces growth of each zinc-oxide nanostructure substantially over a patterned polysilicon layer. In another exemplary embodiment, when growth of at least one zinc-oxide nanostructure is induced, each zinc-oxide nanostructure grows substantially over an etched silicon substrate layer.

摘要翻译： 通过在基板的表面上形成图案来形成氧化锌纳米结构体。 在基板的表面上形成催化剂金属，例如镍。 基于气 - 液 - 固体技术，在催化剂金属上基本上在衬底表面上的图案上诱导至少一种氧化锌纳米结构的生长。 在一个示例性实施方案中，诱导至少一种氧化锌纳米结构的生长诱导基本上在图案化多晶硅层上的每个氧化锌纳米结构的生长。 在另一示例性实施方案中，当诱导至少一种氧化锌纳米结构的生长时，每个氧化锌纳米结构基本上在蚀刻的硅衬底层上生长。

公开(公告)号：US20070099441A1

公开(公告)日：2007-05-03

申请号：US11262439

申请日：2005-10-28

申请人： John Conley ,  Yoshi Ono ,  Lisa Stecker ,  Sheng Hsu ,  Josh Green ,  Lifeng Dong ,  Jun Jiao

发明人： John Conley ,  Yoshi Ono ,  Lisa Stecker ,  Sheng Hsu ,  Josh Green ,  Lifeng Dong ,  Jun Jiao

IPC分类号： H01L21/00

CPC分类号： H01J9/025 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  C01B32/168 ,  C01B2202/34 ,  C01B2202/36 ,  H01J1/304 ,  H01J2201/30469 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02444 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02513 ,  H01L21/02554 ,  H01L21/02601 ,  Y10S977/754

摘要： A ZnO asperity-covered carbon nanotube (CNT) device has been provided, along with a corresponding fabrication method. The method comprises: forming a substrate; growing CNTs from the substrate; conformally coating the CNTs with ZnO; annealing the ZnO-coated CNTs; and, forming ZnO asperities on the surface of the CNTs in response to the annealing. In one aspect, the ZnO asperities have a density in the range of about 100 to 1000 ZnO asperities per CNT. The density is dependent upon the deposited ZnO film thickness and annealing parameters. The CNTs are conformally coating with ZnO using a sputtering, chemical vapor deposition (CVD), spin-on, or atomic layer deposition (ALD). For example, an ALD process can be to deposit a layer of ZnO over the CNTs having a thickness in the range of 1.2 to 200 nanometers (nm).

摘要翻译： 已经提供了ZnO微粒覆盖碳纳米管（CNT）器件，以及相应的制造方法。 该方法包括：形成衬底; 从底物生长CNT; 用ZnO共形涂覆CNT; 退火ZnO涂层的CNT; 并且响应于退火在CNT的表面上形成ZnO粗糙度。 在一个方面，ZnO粗糙度的密度在每个CNT约100-1000nm的ZnO粗糙度的范围内。 密度取决于沉积的ZnO膜厚度和退火参数。 使用溅射，化学气相沉积（CVD），旋涂或原子层沉积（ALD），使用ZnO共形涂覆CNT。 例如，ALD工艺可以在厚度在1.2至200纳米（nm）范围内的CNT上沉积ZnO层。

公开(公告)号：US20060091499A1

公开(公告)日：2006-05-04

申请号：US10976594

申请日：2004-10-29

申请人： Lisa Stecker ,  John Conley

发明人： Lisa Stecker ,  John Conley

IPC分类号： H01L21/20 ,  H01L29/22

CPC分类号： H01L21/0262 ,  C30B25/02 ,  C30B29/16 ,  C30B29/605 ,  H01L21/02472 ,  H01L21/02513 ,  H01L21/02554 ,  H01L21/02603 ,  H01L21/02628

摘要： Zinc-oxide nanostructures are grown without using a metal catalyst by forming a seed layer of polycrystalline zinc oxide on a surface of a substrate. The seed layer can be formed by an atomic layer deposition technique. Growth of at least one zinc-oxide nanostructure is induced on the seed layer. The seed layer can alternatively be formed by using a spin-on technique, such as a metal organic deposition technique, a spray pyrolisis technique, an RF sputtering technique or by oxidation of the seed layer.

摘要翻译： 通过在基材的表面上形成多晶氧化锌的晶种层，生长氧化锌纳米结构体而不使用金属催化剂。 种子层可以通过原子层沉积技术形成。 在种子层上诱导至少一种氧化锌纳米结构的生长。 可以通过使用旋涂技术，例如金属有机沉积技术，喷雾热解技术，RF溅射技术或通过种子层的氧化来形成籽晶层。

公开(公告)号：US20060240588A1

公开(公告)日：2006-10-26

申请号：US11115814

申请日：2005-04-26

申请人： John Conley ,  Yoshi Ono ,  Lisa Stecker

发明人： John Conley ,  Yoshi Ono ,  Lisa Stecker

IPC分类号： H01L21/00

CPC分类号： G01N27/4146 ,  B82Y10/00 ,  B82Y15/00 ,  G11C2213/16 ,  H01L51/0048 ,  H01L51/0545

摘要： A method of fabricating a nanowire CHEMFET sensor mechanism includes preparing a silicon substrate; depositing a polycrystalline ZnO seed layer on the silicon substrate; patterning and etching the polycrystalline ZnO seed layer; depositing an insulating layer over the polycrystalline ZnO seed layer and the silicon substrate; patterning and etching the insulating layer to form contact holes to a source region and a drain region; metallizing the contact holes to form contacts for the source region and the drain region; depositing a passivation dielectric layer over the insulating layer and the contacts; patterning the passivation layer and etching to expose the polycrystalline ZnO seed layer between the source region and the drain region; and growing ZnO nanostructures on the exposed ZnO seed layer to form a ZnO nanostructure CHEMFET sensor device.

摘要翻译： 制造纳米线CHEMFET传感器机构的方法包括制备硅衬底; 在硅衬底上沉积多晶ZnO种子层; 图案化和蚀刻多晶ZnO种子层; 在多晶ZnO种子层和硅衬底上沉积绝缘层; 图案化和蚀刻绝缘层以形成到源极区域和漏极区域的接触孔; 金属化接触孔以形成用于源极区域和漏极区域的触点; 在所述绝缘层和所述触点上沉积钝化介电层; 图案化钝化层并蚀刻以在源极区域和漏极区域之间暴露多晶ZnO晶种层; 并在曝光的ZnO种子层上生长ZnO纳米结构以形成ZnO纳米结构CHEMFET传感器装置。

公开(公告)号：US20060090693A1

公开(公告)日：2006-05-04

申请号：US10977430

申请日：2004-10-29

申请人： John Conley ,  Lisa Stecker

发明人： John Conley ,  Lisa Stecker

IPC分类号： C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

CPC分类号： C30B25/02 ,  C30B29/16 ,  C30B29/605

摘要： Patterned zinc-oxide nanostructures are grown without using a metal catalyst by forming a seed layer of polycrystalline zinc oxide on a surface of a substrate. The seed layer can be formed by an atomic layer deposition technique. The seed layer is patterned, such as by etching, and growth of at least one zinc-oxide nanostructure is induced substantially over the patterned seed layer by, for example, exposing the patterned seed layer to zinc vapor in the presence of a trace amount of oxygen. The seed layer can alternatively be formed by using a spin-on technique, such as a metal organic deposition technique, a spray pyrolisis technique, an RF sputtering technique or by oxidation of a zinc thin film layer formed on the substrate.

摘要翻译： 通过在基板的表面上形成多晶氧化锌的晶种层，生长图案化的氧化锌纳米结构而不使用金属催化剂。 种子层可以通过原子层沉积技术形成。 种子层被图案化，例如通过蚀刻，并且基本上在图案化种子层上诱导至少一种氧化锌纳米结构的生长，例如通过例如将图案化的种子层在痕量的 氧。 种子层可以替代地通过使用旋涂技术形成，例如金属有机沉积技术，喷雾热解技术，RF溅射技术或通过氧化形成在基底上的锌薄膜层。

公开(公告)号：US20070108502A1

公开(公告)日：2007-05-17

申请号：US11281955

申请日：2005-11-17

申请人： Tingkai Li ,  Sheng Hsu ,  Lisa Stecker

发明人： Tingkai Li ,  Sheng Hsu ,  Lisa Stecker

IPC分类号： H01L29/788 ,  H01L21/336 ,  G11C16/04

CPC分类号： H01L29/7881 ,  B82Y10/00 ,  G11C16/349 ,  G11C16/3495 ,  G11C2216/08 ,  H01L29/15 ,  H01L29/40114 ,  H01L29/42324 ,  H01L29/4925 ,  H01L29/66825

摘要： A nanocrystal silicon (Si) quantum dot memory device and associated fabrication method have been provided. The method comprises: forming a gate (tunnel) oxide layer overlying a Si substrate active layer; forming a nanocrystal Si memory film overlying the gate oxide layer, including a polycrystalline Si (poly-Si)/Si dioxide stack; forming a control Si oxide layer overlying the nanocrystal Si memory film; forming a gate electrode overlying the control oxide layer; and, forming source/drain regions in the Si active layer. In one aspect, the nanocrystal Si memory film is formed by depositing a layer of amorphous Si (a-Si) using a chemical vapor deposition (CVD) process, and thermally oxidizing a portion of the a-Si layer. Typically, the a-Si deposition and oxidation processes are repeated, forming a plurality of poly-Si/Si dioxide stacks (i.e., 2 to 5 poly-Si/Si dioxide stacks).

摘要翻译： 已经提供了纳米晶体硅（Si）量子点存储器件和相关的制造方法。 该方法包括：形成覆盖Si衬底有源层的栅极（隧道）氧化层; 形成覆盖栅极氧化物层的纳米晶Si记忆膜，包括多晶Si（多晶硅）/二氧化硅叠层; 形成覆盖在纳米晶Si记忆膜上的对照Si氧化物层; 形成覆盖所述控制氧化物层的栅电极; 并且在Si有源层中形成源/漏区。 在一个方面，通过使用化学气相沉积（CVD）工艺沉积非晶硅层（a-Si）并热氧化a-Si层的一部分来形成纳米晶体Si记忆膜。 通常，重复a-Si沉积和氧化过程，形成多个多Si /二氧化硅叠层（即2至5个多硅/二氧化硅叠层）。

公开(公告)号：US20060040413A1

公开(公告)日：2006-02-23

申请号：US10923381

申请日：2004-08-20

申请人： Fengyan Zhang ,  Bruce Ulrich ,  Lisa Stecker ,  Sheng Hsu

发明人： Fengyan Zhang ,  Bruce Ulrich ,  Lisa Stecker ,  Sheng Hsu

IPC分类号： H01L21/00

CPC分类号： H01L21/32139 ,  H01L21/32136 ,  H01L27/1085 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65

摘要： A method of etching a noble metal top electrode on a ferroelectric layer while preserving the ferroelectric properties of the ferroelectric layer and removing etching residue includes preparing a substrate; depositing a barrier layer on the substrate; depositing a bottom electrode layer on the barrier layer; depositing a ferroelectric layer on the bottom electrode layer; depositing a noble metal top electrode layer on the ferroelectric layer; depositing an adhesion layer on the top electrode layer; depositing a hard mask layer on the adhesion layer; patterning the hard mask; etching the noble metal top electrode layer in an initial etching step at a predetermined RF bias power, which produces etching residue; and over etching the noble metal top electrode layer and ferroelectric layer at an RF bias power lower than that of the predetermined RF bias power to remove etching residue from the initial etching step.

公开(公告)号：US20050158994A1

公开(公告)日：2005-07-21

申请号：US10759468

申请日：2004-01-15

申请人： Wei-Wei Zhuang ,  Lisa Stecker ,  Gregory Stecker ,  Sheng Hsu

发明人： Wei-Wei Zhuang ,  Lisa Stecker ,  Gregory Stecker ,  Sheng Hsu

IPC分类号： C01G45/00 ,  H01L21/28 ,  H01L23/62 ,  H01L27/10 ,  H01L27/24 ,  H01L45/00

CPC分类号： G11C13/0007 ,  G11C2213/31 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  H01L45/1608 ,  H01L45/1683

摘要： A Pr1-XCaXMnO3 (PCMO) spin-coat deposition method for eliminating voids is provided, along with a void-free PCMO film structure. The method comprises: forming a substrate, including a noble metal, with a surface; forming a feature, such as a via or trench, normal with respect to the substrate surface; spin-coating the substrate with acetic acid; spin-coating the substrate with a first, low concentration of PCMO solution; spin-coating the substrate with a second concentration of PCMO solution, having a greater concentration of PCMO than the first concentration; baking and RTA annealing (repeated one to five times); post-annealing; and, forming a PCMO film with a void-free interface between the PCMO film and the underlying substrate surface. The first concentration of PCMO solution has a PCMO concentration in the range of 0.01 to 0.1 moles (M). The second concentration of PCMO solution has a PCMO concentration in the range of 0.2 to 0.5 M.

摘要翻译： 提供了一种用于消除空隙的Pr 1-X C 3 Mn 3 O 3（PCMO）旋涂沉积方法，以及无空隙 PCMO薄膜结构。 该方法包括：用表面形成包括贵金属的基底; 形成相对于衬底表面正常的特征，例如通孔或沟槽; 用乙酸旋涂底物; 用第一种低浓度的PCMO溶液旋涂底物; 以第二浓度的PCMO溶液旋涂底物，其具有比第一浓度更高浓度的PCMO; 烘烤和RTA退火（重复1〜5次）; 后退火; 并且在PCMO膜和下面的衬底表面之间形成具有无空隙界面的PCMO膜。 PCMO溶液的第一浓度的PCMO浓度范围为0.01至0.1摩尔（M）。 PCMO溶液的第二浓度的PCMO浓度范围为0.2-0.5M。

公开(公告)号：US08803139B2

公开(公告)日：2014-08-12

申请号：US13768708

申请日：2013-02-15

申请人： Kanan Puntambekar ,  Lisa Stecker ,  Kurt Ulmer

发明人： Kanan Puntambekar ,  Lisa Stecker ,  Kurt Ulmer

IPC分类号： H01L29/08 ,  H01L51/05

CPC分类号： H01L51/0516 ,  H01L51/0012 ,  H01L51/0545 ,  H01L51/0558

摘要： A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.

摘要翻译： 提供了一种使用氟聚合物分层结晶井制造具有图案化有机半导体的印刷有机薄膜晶体管（OTFT）的方法。 在底栅OTFT的情况下，提供衬底并且形成覆盖衬底的栅电极。 形成覆盖栅电极的栅极电介质，并且覆盖栅极电介质形成源极（S）和漏极（D）电极。 在S / D电极之间形成栅极介电OTFT沟道界面区域。 然后形成具有氟聚合物封存和结晶团的阱，以限定有机半导体印刷区域。 该阱填充有机半导体，覆盖S / D电极和栅极介电OTFT通道界面。 然后，有机半导体结晶。 主要晶粒成核起源于覆盖S / D电极的区域。 结果，形成介于S / D电极之间的有机半导体沟道。