公开(公告)号：US5745336A

公开(公告)日：1998-04-28

申请号：US417839

申请日：1995-04-06

申请人： Katsuaki Saito ,  Michio Ohue ,  Takuya Fukuda ,  JaiHo Choi ,  Yukinobu Miyamoto

发明人： Katsuaki Saito ,  Michio Ohue ,  Takuya Fukuda ,  JaiHo Choi ,  Yukinobu Miyamoto

IPC分类号： H01G7/06 ,  H01L21/02 ,  H01L27/115 ,  H01G4/06

CPC分类号： H01L27/11502 ,  H01G7/06 ,  H01L28/55

摘要： A semiconductor integrated circuit apparatus according to the present invention has a capacitor formed in such a manner that a ferroelectric thin film is formed after a MOS transistor has been formed on a substrate thereof, a ferroelectric thin film made of, for example, PbZrTiO.sub.3 or SrTiO.sub.3 or the like is formed into a columnar shape to form electrodes positioned in direct contact with the side wall portions of said columnar ferroelectric thin film and the top portion is removed. As a result, a fact that an oxide of each electrode, which deteriorates the relative permittivity, is formed on the interface between the electrode and the ferroelectric material is prevented, and a large capacity can be realized with respect to the area of the substrate because the ferroelectric thin film is formed into the columnar and elongated shape, resulting in that the capacitance of the capacitor is not reduced in which the electrodes and the oxide dielectric material having a high permittivity are, in series, connected to each other. The capacitor is formed into a DRAM or an FRAM memory cell so as to realize a semiconductor memory revealing a high degree of integration and a high processing speed.

摘要翻译： 根据本发明的半导体集成电路装置具有电容器，其形成为在其基板上形成MOS晶体管之后形成铁电薄膜，由例如PbZrTiO 3或SrTiO 3制成的铁电薄膜 或类似物形成为柱状，以形成与所述柱状铁电薄膜的侧壁部分直接接触的电极，并且去除顶部部分。 结果，防止了在电极和铁电材料之间的界面上形成各种电极的氧化物，导致相对介电常数下降的事实，因此能够相对于基板的面积实现大容量，因为 铁电薄膜形成为柱状和细长形状，导致电容器的电容不降低，其中具有高介电常数的电极和氧化物介电材料串联连接。 电容器形成为DRAM或FRAM存储单元，以实现显示高集成度和高​​处理速度的半导体存储器。

公开(公告)号：US5434742A

公开(公告)日：1995-07-18

申请号：US995977

申请日：1992-12-23

申请人： Katsuaki Saito ,  Michio Ohue ,  Takuya Fukuda ,  JaiHo Choi ,  Yukinobu Miyamoto

发明人： Katsuaki Saito ,  Michio Ohue ,  Takuya Fukuda ,  JaiHo Choi ,  Yukinobu Miyamoto

IPC分类号： H01G7/06 ,  H01L21/02 ,  H01L27/115 ,  H01G4/008 ,  H01G4/12

CPC分类号： H01L27/11502 ,  H01G7/06 ,  H01L28/55

摘要： A semiconductor integrated circuit apparatus according to the present invention has a capacitor formed in such a manner that a ferroelectric thin film is formed after a MOS transistor has been formed on a substrate thereof, a ferroelectric thin film made of, for example, PbZrTiO.sub.3 or SrTiO.sub.3 or the like is formed into a columnar shape to form electrodes positioned in direct contact with the side wall portions of said columnar ferroelectric thin film, and the top portion is removed. As a result, a fact that an oxide of each electrode, which deteriorates the relative permittivity, is formed on the interface between the electrode and the ferroelectric material is prevented, and a large capacity can be realized with respect to the area of the substrate because the ferroelectric thin film is formed into the columnar and elongated shape, resulting in that the capacitance of the capacitor is not reduced in which the electrodes and the oxide dielectric material having a high permittivity are, in series, connected to each other.The capacitor is formed into a DRAM or an FRAM memory cell so as to realize a semiconductor memory revealing a high degree of integration and a high processing speed.

摘要翻译： 根据本发明的半导体集成电路装置具有电容器，其形成为在其基板上形成MOS晶体管之后形成铁电薄膜，由例如PbZrTiO 3或SrTiO 3制成的铁电薄膜 或类似物形成为柱状，以形成与所述柱状铁电薄膜的侧壁部直接接触的电极，并且去除顶部。 结果，防止了在电极和铁电材料之间的界面上形成各种电极的氧化物，导致相对介电常数下降的事实，因此能够相对于基板的面积实现大容量，因为 铁电薄膜形成为柱状和细长形状，导致电容器的电容不降低，其中具有高介电常数的电极和氧化物介电材料串联连接。 电容器形成为DRAM或FRAM存储单元，以实现显示高集成度和高​​处理速度的半导体存储器。

公开(公告)号：US5211825A

公开(公告)日：1993-05-18

申请号：US764161

申请日：1991-09-23

申请人： Katsuaki Saito ,  Takuya Fukuda ,  Michio Ohue ,  Tadasi Sonobe

发明人： Katsuaki Saito ,  Takuya Fukuda ,  Michio Ohue ,  Tadasi Sonobe

IPC分类号： C23C16/50 ,  C23C16/44 ,  C23C16/511 ,  C23F4/00 ,  H01J37/32 ,  H01L21/205 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H05H1/46

CPC分类号： H01J37/32862 ,  C23C16/4405 ,  C23C16/511 ,  H01J37/32192 ,  H01J37/3266 ,  H05H1/46

摘要： A plasma processing apparatus performs a sample processing and cleaning processing. The sample processing is carried out by generating a reaction gas plasma within a vacuum vessel of the apparatus using an electron cyclotron resonance excitation. The cleaning processing is carried out to clean the inner wall of the vacuum vessel by generating a cleaning gas plasma within the vacuum vessel. Generation of the cleaning gas plasma takes place by using either one of the following processes:(1) The plasma diameter during the cleaning processing is made larger than that during the sample processing. The end of the plasma during cleaning processing is made to reach the inside wall of the vacuum vessel.(2) The cleaning gas plasma is scanned within the vacuum vessel.

摘要翻译： 等离子体处理装置进行样品处理和清洗处理。 通过使用电子回旋共振激发在装置的真空容器内产生反应气体等离子体来进行样品处理。 进行清洁处理以通过在真空容器内产生清洁气体等离子体来清洁真空容器的内壁。 清洁气体等离子体的产生通过使用以下任一方法进行：（1）清洁处理期间的等离子体直径大于样品处理期间的等离子体直径。 在清洁处理期间等离子体的末端到达真空容器的内壁。 （2）在真空容器内扫描清洁气体等离子体。

公开(公告)号：US5347100A

公开(公告)日：1994-09-13

申请号：US857658

申请日：1992-03-26

申请人： Takuya Fukuda ,  Michio Ohue ,  Fumiyuki Kanai ,  Atsuyoshi Koike ,  Katsuaki Saito ,  Kazuo Suzuki

发明人： Takuya Fukuda ,  Michio Ohue ,  Fumiyuki Kanai ,  Atsuyoshi Koike ,  Katsuaki Saito ,  Kazuo Suzuki

IPC分类号： H01L21/768 ,  H01L23/532 ,  B23K9/00 ,  B44C1/22

CPC分类号： H01L21/76801 ,  H01L21/76834 ,  H01L23/5329 ,  H01L2924/0002

摘要： Disclosed are a semiconductor device comprising a semiconductor substrate, a first metal connection layers, a first substrate oxide layer having a specific form, and a second connection pattern layer; a process for producing the device; and a microwave plasma treatment apparatus having gas feed ports in a specific position. The highly reliable semiconductor devices can be produced at a high rate at high yields.

摘要翻译： 公开了一种半导体器件，包括半导体衬底，第一金属连接层，具有特定形式的第一衬底氧化物层和第二连接图案层; 一种生产该装置的方法; 以及具有特定位置的气体供给口的微波等离子体处理装置。 高可靠性的半导体器件可以以高产率高产率生产。

公开(公告)号：US20100289148A1

公开(公告)日：2010-11-18

申请号：US12843934

申请日：2010-07-27

申请人： Tasao SOGA ,  Daisuke Kawase ,  Kazuhiro Suzuki ,  Eiichi Morisaki ,  Katsuaki Saito ,  Hanae Shimokawa

发明人： Tasao SOGA ,  Daisuke Kawase ,  Kazuhiro Suzuki ,  Eiichi Morisaki ,  Katsuaki Saito ,  Hanae Shimokawa

IPC分类号： H01L23/15

CPC分类号： H01L23/24 ,  H01L23/3142 ,  H01L23/3185 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/0603 ,  H01L2224/26145 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48491 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/83951 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19107 ,  H01L2924/3511 ,  H01L2924/3651 ,  H05K1/0306 ,  H05K3/0061 ,  H05K3/284 ,  H05K3/341 ,  H05K3/3463 ,  H05K2201/10977 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/10155 ,  H01L2924/3512

摘要： Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown.

摘要翻译： 由于环境问题，使用无铅焊料变得至关重要。 电源模块通过焊接大面积的基板形成。 已知在Sn-3Ag-0.5Cu中，相对于基板的翘曲变形很大而难以蠕变变形，相对于温度循环试验，寿命显着缩短，现有的模块结构在 难以确保高可靠性。 因此，本发明的目的是选择可以在低应变率下预期寿命增加的组合物。 在Sn焊料中，通过将In掺杂3〜7％，Ag增加2〜4.5％，发现在低应变速率下延迟裂纹扩展的效果，作为代表性组合物在高温下稳定，Sn-3Ag- 选择0.5Cu-5In。 此外，为了提高可靠性，示出了用树脂部分地涂覆焊料端部的方法。

公开(公告)号：US5883403A

公开(公告)日：1999-03-16

申请号：US720017

申请日：1996-09-27

申请人： Katsumi Ishikawa ,  Katsuaki Saito ,  Yutaka Sato ,  Atsuo Watanabe ,  Shuji Katoh ,  Naohiro Momma

发明人： Katsumi Ishikawa ,  Katsuaki Saito ,  Yutaka Sato ,  Atsuo Watanabe ,  Shuji Katoh ,  Naohiro Momma

IPC分类号： H01L29/32 ,  H01L29/74 ,  H01L31/111

CPC分类号： H01L29/74 ,  H01L29/32 ,  H01L29/861 ,  Y10S257/913

摘要： In a semiconductor device, such as a diode and thyristor, having at least one pn junction between a pair of main surfaces, a first main electrode formed on the surface of one of the main surfaces and a second main electrode formed on the surface of the other one of the main surfaces, a semiconductor lattice defect is formed such that its lattice defect density increases gradually in the direction from the first main electrode to the second main electrode. Since the distribution of the carrier density in the conduction state can be flattened, the reverse recovery charge can be reduced substantially without causing the ON-state voltage to increase.

摘要翻译： 在诸如二极管和晶闸管之类的半导体器件中，在一对主表面之间具有至少一个pn结，形成在一个主表面的表面上的第一主电极和形成在主表面上的第二主电极 主表面中的另一个，形成半导体晶格缺陷，使得其晶格缺陷密度在从第一主电极到第二主电极的方向上逐渐增加。 由于载流子密度在导通状态下的分布可以变平，所以可以大大降低反向恢复电荷，而不会导致导通状态电压增加。

公开(公告)号：US08125090B2

公开(公告)日：2012-02-28

申请号：US12843934

申请日：2010-07-27

申请人： Tasao Soga ,  Daisuke Kawase ,  Kazuhiro Suzuki ,  Eiichi Morisaki ,  Katsuaki Saito ,  Hanae Shimokawa

发明人： Tasao Soga ,  Daisuke Kawase ,  Kazuhiro Suzuki ,  Eiichi Morisaki ,  Katsuaki Saito ,  Hanae Shimokawa

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/24 ,  H01L23/3142 ,  H01L23/3185 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/0603 ,  H01L2224/26145 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48491 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/83951 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19107 ,  H01L2924/3511 ,  H01L2924/3651 ,  H05K1/0306 ,  H05K3/0061 ,  H05K3/284 ,  H05K3/341 ,  H05K3/3463 ,  H05K2201/10977 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/10155 ,  H01L2924/3512

摘要： Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown.

摘要翻译： 由于环境问题，使用无铅焊料变得至关重要。 电源模块通过焊接大面积的基板形成。 已知在Sn-3Ag-0.5Cu中，相对于基板的翘曲变形很大而难以蠕变变形，相对于温度循环试验，寿命显着缩短，现有的模块结构在 难以确保高可靠性。 因此，本发明的目的是选择可以在低应变率下预期寿命增加的组合物。 在Sn焊料中，通过将In掺杂3〜7％，Ag增加2〜4.5％，发现在低应变速率下延迟裂纹扩展的效果，作为代表性组合物在高温下稳定，Sn-3Ag- 选择0.5Cu-5In。 此外，为了提高可靠性，示出了用树脂部分地涂覆焊料端部的方法。

公开(公告)号：US20070290305A1

公开(公告)日：2007-12-20

申请号：US11762276

申请日：2007-06-13

申请人： Kazuhiro Oyama ,  Mutsuhiro Mori ,  Katsuaki Saito ,  Yoshihiko Koike

发明人： Kazuhiro Oyama ,  Mutsuhiro Mori ,  Katsuaki Saito ,  Yoshihiko Koike

IPC分类号： H01L23/02

CPC分类号： H05K1/144 ,  H01L23/24 ,  H01L25/072 ,  H01L25/16 ,  H01L25/162 ,  H01L25/18 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0254 ,  H05K1/0271 ,  H05K1/147 ,  H05K3/284 ,  H05K3/3447 ,  H05K2201/042 ,  H05K2201/09081 ,  H05K2201/10287 ,  H05K2201/10318 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An elastic printed board is provided so that stress applied by the silicon gel is absorbed by the printed board. Further, the printed board is formed to be so narrow that the stress may be escaped. On the other hand, the wires on which a high voltage is applied are patterned on respective printed boards. This serves to prevent discharge through the surface of the same printed board served as current passage. This design makes it possible to hermetically close the power module, prevent intrusion of moisture or contamination as well as displacement, transformation and crack of the cover plate.

摘要翻译： 设置弹性印刷电路板，使得由硅胶施加的应力被印刷板吸收。 此外，印刷板形成为如此狭窄，使得应力可能逸出。 另一方面，施加了高电压的电线在各自的印刷电路板上被图案化。 这用于防止通过作为当前通道的相同印刷电路板的表面的放电。 该设计使得可以密封电源模块，防止潮湿或污染的侵入以及盖板的位移，转换和裂纹。

公开(公告)号：US08304889B2

公开(公告)日：2012-11-06

申请号：US12732238

申请日：2010-03-26

申请人： Kazuhiro Oyama ,  Mutsuhiro Mori ,  Katsuaki Saito ,  Yoshihiko Koike

发明人： Kazuhiro Oyama ,  Mutsuhiro Mori ,  Katsuaki Saito ,  Yoshihiko Koike

IPC分类号： H01L23/538

CPC分类号： H05K1/144 ,  H01L23/24 ,  H01L25/072 ,  H01L25/16 ,  H01L25/162 ,  H01L25/18 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0254 ,  H05K1/0271 ,  H05K1/147 ,  H05K3/284 ,  H05K3/3447 ,  H05K2201/042 ,  H05K2201/09081 ,  H05K2201/10287 ,  H05K2201/10318 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An elastic printed board is provided so that stress applied by the silicon gel is absorbed by the printed board. Further, the printed board is formed to be so narrow that the stress can escape. On the other hand, the wires on which a high voltage is applied are patterned on respective printed boards. This serves to prevent discharge through the surface of the same printed board serving as a current passage. This design makes it possible to hermetically close the power module, prevent intrusion of moisture or contamination as well as displacement, transformation and cracks of the cover plate.

摘要翻译： 设置弹性印刷电路板，使得由硅胶施加的应力被印刷板吸收。 此外，印刷板形成为如此狭窄，使得应力可以逸出。 另一方面，施加了高电压的电线在各自的印刷电路板上被图案化。 这用于防止通过作为电流通道的相同印刷电路板的表面的放电。 该设计使得可以密封电源模块，防止潮湿或污染的侵入以及盖板的位移，转换和裂纹。

公开(公告)号：US08004075B2

公开(公告)日：2011-08-23

申请号：US11739122

申请日：2007-04-24

申请人： Tasao Soga ,  Daisuke Kawase ,  Kazuhiro Suzuki ,  Eiichi Morisaki ,  Katsuaki Saito ,  Hanae Shimokawa

发明人： Tasao Soga ,  Daisuke Kawase ,  Kazuhiro Suzuki ,  Eiichi Morisaki ,  Katsuaki Saito ,  Hanae Shimokawa

IPC分类号： H01L23/22 ,  H01L23/24

CPC分类号： H01L23/24 ,  H01L23/3142 ,  H01L23/3185 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/0603 ,  H01L2224/26145 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48491 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/83951 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19107 ,  H01L2924/3511 ,  H01L2924/3651 ,  H05K1/0306 ,  H05K3/0061 ,  H05K3/284 ,  H05K3/341 ,  H05K3/3463 ,  H05K2201/10977 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/10155 ,  H01L2924/3512

摘要： Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown.

摘要翻译： 由于环境问题，使用无铅焊料变得至关重要。 电源模块通过焊接大面积的基板形成。 已知在Sn-3Ag-0.5Cu中，相对于基板的翘曲变形很大而难以蠕变变形，相对于温度循环试验，寿命显着缩短，现有的模块结构在 难以确保高可靠性。 因此，本发明的目的是选择可以在低应变率下预期寿命增加的组合物。 在Sn焊料中，通过将In掺杂3〜7％，Ag增加2〜4.5％，发现在低应变速率下延迟裂纹扩展的效果，作为代表性组合物在高温下稳定，Sn-3Ag- 选择0.5Cu-5In。 此外，为了提高可靠性，示出了用树脂部分地涂覆焊料端部的方法。