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    Semiconductor device and method of fabrication
    2.
    发明授权
    Semiconductor device and method of fabrication 有权
    半导体器件及其制造方法

    公开(公告)号：US07364965B2

    公开(公告)日：2008-04-29

    申请号：US10986497

    申请日：2004-11-12

    申请人： Osamu Tonomura ,  Hiroshi Miki ,  Yuichi Matsui ,  Tomoko Sekiguchi ,  Kikuo Watanabe

    发明人： Osamu Tonomura ,  Hiroshi Miki ,  Yuichi Matsui ,  Tomoko Sekiguchi ,  Kikuo Watanabe

    IPC分类号： H01L21/8242

    CPC分类号： H01L21/02178 ,  H01L21/02181 ,  H01L21/02197 ,  H01L21/0228 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/02356 ,  H01L21/3141 ,  H01L21/3162 ,  H01L21/31645 ,  H01L27/1085 ,  H01L27/10855 ,  H01L28/65

    摘要： A semiconductor device having a DRAM has a capacitor in which a dielectric film and an upper electrode are laminated on a lower electrode comprising a polysilicone, in which a natural oxide film oxidized by oxygen in the atmosphere grows to at least 1.5 nm on the surface of a lower electrode of the capacitor. Further, in forming the dielectric film, the dioxide film further grows in the case of using an oxidative raw material. This brings forth a reduction in capacitance, and an increase of a leakage current is caused.Therefore, after a dielectric film having a reduction property has been formed, the reduction property is promoted by a heat treatment to thereby reduce a dioxide film and realize making the dioxide film on the lower electrode surface thinner.

    摘要翻译： 具有DRAM的半导体器件具有电容器，其中电介质膜和上电极层压在包含聚硅氧烷的下电极上，其中在大气中的氧气氧化的天然氧化物膜在其表面上生长至少至少1.5nm 电容器的下电极。 此外，在形成电介质膜时，在使用氧化性原料的情况下，二氧化硅膜进一步生长。 这导致电容的减小，并且引起漏电流的增加。 因此，在形成具有还原性的电介质膜之后，通过热处理促进还原性能，从而减少二氧化膜，实现使下电极表面上的二氧化物膜更薄。

    Semiconductor device and manufacturing method thereof
    3.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US07247890B2

    公开(公告)日：2007-07-24

    申请号：US10931119

    申请日：2004-09-01

    申请人： Tomoko Sekiguchi ,  Shinichiro Kimura ,  Renichi Yamada ,  Kikuo Watanabe ,  Hiroshi Miki ,  Kenichi Takeda

    发明人： Tomoko Sekiguchi ,  Shinichiro Kimura ,  Renichi Yamada ,  Kikuo Watanabe ,  Hiroshi Miki ,  Kenichi Takeda

    IPC分类号： H01L31/0328 ,  H01L29/80

    CPC分类号： H01L29/66659 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10894 ,  H01L29/1079 ,  H01L29/6656 ,  H01L29/7835

    摘要： Disclosed is herein a semiconductor device having a DRAM with less scattering of threshold voltage of MISFET in a memory cell and having good charge retainability of a capacitor, and a manufacturing method of the semiconductor device. An anti-oxidation film is formed to the side wall of a gate electrode before light oxidation thereby suppressing the oxidation of the side wall for the gate electrode and decreasing scattering of the thickness of the film formed to the sidewall in an asymmetric diffusion region structure in which the impurity concentration of an n-type semiconductor region and a p-type semiconductor region on the side of the data line is made relatively higher than the impurity concentration in the n-type semiconductor region and p-type semiconductor region on the side of the capacitor, respectively.

    摘要翻译： 这里公开了具有在存储单元中具有MISFET阈值电压的较小散射并具有良好的电容保持性的DRAM的半导体器件，以及半导体器件的制造方法。 在光氧化之前，在栅电极的侧壁上形成抗氧化膜，从而抑制栅电极的侧壁的氧化，并且在不对称扩散区域结构中减少形成在侧壁上的膜的厚度的散射 使数据线一侧的n型半导体区域和p型半导体区域的杂质浓度比n型半导体区域和p型半导体区域的杂质浓度相对高于 电容器。

    Method for manufacturing a solar cell
    4.
    发明授权
    Method for manufacturing a solar cell 有权
    制造太阳能电池的方法

    公开(公告)号：US08790948B2

    公开(公告)日：2014-07-29

    申请号：US13303227

    申请日：2011-11-23

    申请人： Keiji Watanabe ,  Toshiyuki Mine ,  Akio Shima ,  Tomoko Sekiguchi ,  Ryuta Tsuchiya

    发明人： Keiji Watanabe ,  Toshiyuki Mine ,  Akio Shima ,  Tomoko Sekiguchi ,  Ryuta Tsuchiya

    IPC分类号： H01L21/00

    CPC分类号： H01L31/02168 ,  B82Y20/00 ,  H01L31/0352 ,  H01L31/035236 ,  H01L31/055 ,  H01L31/075 ,  H01L31/1872 ,  Y02E10/52 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

    摘要： In the existent method for manufacturing a solar cell, manufacture of a solar cell having a quantum well having a crystalline well layer and capable of controlling the thickness of the well layer was difficult. A quantum well having an amorphous well layer, comprising a barrier layer and an amorphous well layer is formed and then the quantum well having the amorphous well layer is annealed thereby crystallizing the amorphous well layer to form a quantum well having a crystalline well layer. By applying energy density applied to the amorphous well layer at an energy density of 1.26 J/mm2 or more and 28.8 J/mm2 or less, the crystalline well layer can be formed and the lamination structure of the quantum well can be maintained simultaneously.

    摘要翻译： 在制造太阳能电池的现有方法中，难以制造具有具有结晶阱层并能够控制阱层的厚度的量子阱的太阳能电池。 形成具有非晶阱层的量子阱，其包含阻挡层和非晶阱层，然后对具有非晶阱层的量子阱退火，从而使非晶阱层结晶，形成具有结晶阱层的量子阱。 通过以1.26J / mm 2以上且28.8J / mm 2以下的能量密度施加到非晶质阱层的能量密度，可以形成结晶阱层，同时可以维持量子阱的层叠结构。