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16 条记录 (耗时 0.015 秒)

    LCD article from liquid crystal filled, hydrophilically-coated, porous PTFE film
    1.
    发明授权
    LCD article from liquid crystal filled, hydrophilically-coated, porous PTFE film 失效
    液晶物品由液晶填充，亲水涂层，多孔PTFE膜

    公开(公告)号：US5580618A

    公开(公告)日：1996-12-03

    申请号：US495066

    申请日：1995-06-26

    申请人： Kouichi Okino ,  Kazuhiko Ohashi ,  Sunao Fukutake

    发明人： Kouichi Okino ,  Kazuhiko Ohashi ,  Sunao Fukutake

    IPC分类号： G02F1/1333 ,  C09K19/54 ,  C09K19/52

    CPC分类号： C09K19/544 ,  C09K2019/546 ,  Y10T428/1077

    摘要： A liquid crystal-containing precursor for a liquid crystal display device consisting of a porous polytetrafluoroethylene film which has the structure defining the pores treated with a hydrophilic substance. The pores of the treated porous film are substantially filled with liquid crystals. The hydrophilizing treatment increases the transition speed of the liquid crystals from light-scattering orientation to light-transmitting orientation. The liquid crystal-filled film can be covered with transparent non-porous layers of material, having an electrically-conductive film on at least one surface, which can be hermetically sealed at the edges, to permit long-term storage of the liquid crystals in ready-to-use sheet form and easy inclusion into a liquid crystal display device.

    摘要翻译： 一种液晶显示装置的含液晶的前体，其由具有限定用亲水物质处理的孔的结构的多孔聚四氟乙烯膜构成。 经处理的多孔膜的孔基本上充满液晶。 亲水化处理使液晶从光散射取向向透光取向的转变速度提高。 液晶填充膜可以覆盖有透明无孔材料层，在至少一个表面上具有导电膜，其可以在边缘气密密封，以允许液晶长期储存在 易于使用的片材形式并容易地包含在液晶显示装置中。

    IC tester capable of changing strobe position in accordance with a predetermined reference signal
    5.
    发明授权
    IC tester capable of changing strobe position in accordance with a predetermined reference signal 失效
    IC测试器能够根据预定的参考信号改变频闪位置

    公开(公告)号：US5191281A

    公开(公告)日：1993-03-02

    申请号：US747627

    申请日：1991-08-20

    申请人： Kazuhiko Ohashi

    发明人： Kazuhiko Ohashi

    IPC分类号： G01R31/28 ,  G01R31/3193

    CPC分类号： G01R31/31937

    摘要： An IC tester correctly carries out a function test on an integrated circuit (IC). The IC tester selects one of two strobe position signals depending on whether an expected value is for testing a rise or a fall of an output signal of the tested IC, and compares the expected value with the output signal at a proper timing specified by the selected strobe position signal. The IC tester avoids an error of test due to a deviation between the positions of the rise and fall of the output signal of the tested IC.

    摘要翻译： IC测试仪正确地对集成电路（IC）执行功能测试。 IC测试者根据预期值是否用于测试被测IC的输出信号的上升或下降来选择两个选通位置信号中的一个，并且在所选择的适当时刻将期望值与输出信号进行比较 选通位置信号。 IC测试仪由于测试IC的输出信号的上升和下降位置之间的偏差而避免了测试误差。

    Integrated circuit tester
    7.
    发明授权
    Integrated circuit tester 失效
    集成电路测试仪

    公开(公告)号：US5398252A

    公开(公告)日：1995-03-14

    申请号：US794894

    申请日：1991-11-20

    申请人： Kazuhiko Ohashi

    发明人： Kazuhiko Ohashi

    IPC分类号： G01R31/28 ,  G01R31/3193 ,  G06F11/00

    CPC分类号： G01R31/31935 ,  G06F2201/865

    摘要： An integrated circuit tester uses the information compared between a test executed result and an expected value, for the operation of a driver, which applies test patterns to a device under test. Once a test executed result obtained from the device is compared with an expected value, the compared information is fedback to the driver so as to specify, for example, test cycles and test patterns. Therefore, in an evaluation of maximum operating frequencies, the failure which occurs in the (n+1)th lower frequency can be effectively observed without being masked by other failures which occur in the nth lower frequency or less.

    摘要翻译： 集成电路测试仪使用将测试模式应用于被测设备的驱动程序的操作的测试执行结果与期望值之间的信息进行比较。 将从设备获得的测试执行结果与预期值进行比较后，将比较的信息反馈给驱动器，以指定例如测试周期和测试模式。 因此，在最大工作频率的评价中，可以有效地观察发生在第（n + 1）低频中的故障，而不会被发生在第n次以下频率以下的其他故障所掩盖。

    HIGH FREQUENCY CIRCUIT, SEMICONDUCTOR DEVICE, AND HIGH FREQUENCY POWER AMPLIFICATION DEVICE
    8.
    发明申请
    HIGH FREQUENCY CIRCUIT, SEMICONDUCTOR DEVICE, AND HIGH FREQUENCY POWER AMPLIFICATION DEVICE 有权
    高频电路，半导体器件和高频功率放大器件

    公开(公告)号：US20080284539A1

    公开(公告)日：2008-11-20

    申请号：US12118803

    申请日：2008-05-12

    申请人： Kazuki TATEOKA ,  Masahiko Inamori ,  Shingo Matsuda ,  Kazuhiko Ohashi ,  Haruhiko Koizumi

    发明人： Kazuki TATEOKA ,  Masahiko Inamori ,  Shingo Matsuda ,  Kazuhiko Ohashi ,  Haruhiko Koizumi

    IPC分类号： H03H7/38

    CPC分类号： H03F3/189 ,  H03F1/56 ,  H03F2200/222 ,  H03F2200/255 ,  H03F2200/387 ,  H03F2200/423 ,  H03F2203/7233

    摘要： A small, high performance, multifunctional high frequency circuit that is multiband and multimode compatible reduces loss from a switch formed on the output side of a final stage amplification unit. The final stage amplification unit power amplifies an input signal and outputs an amplified signal. A first matching circuit impedance converts the amplified signal input thereto at a first input impedance, and outputs a first impedance-converted signal at a first output impedance. A control unit that generates a control signal denoting signal path selection information. A switch unit selects one of at least two signal paths based on the control signal, passes the first impedance-converted signal at an on impedance through the selected path, and outputs the pass signal. A second matching circuit impedance converts a pass signal input thereto at a second input impedance, and outputs a second impedance-converted signal at a second output.

    摘要翻译： 多频和多模兼容的小型，高性能，多功能高频电路可以减少在最终级放大单元输出侧形成的开关损耗。 最终级放大单元功率放大输入信号并输出​​放大信号。 第一匹配电路阻抗以第一输入阻抗转换输入到其的放大信号，并输出第一输出阻抗的第一阻抗转换信号。 控制单元，其生成表示信号路径选择信息的控制信号。 开关单元基于控制信号选择至少两个信号路径中的一个，将通过所选路径的导通阻抗的第一阻抗转换信号传递，并输出通过信号。 第二匹配电路阻抗以第二输入阻抗转换输入到其的通过信号，并在第二输出端输出第二阻抗转换信号。

    Data processing device with test circuit
    10.
    发明授权
    Data processing device with test circuit 失效
    具有测试电路的数据处理设备

    公开(公告)号：US5515517A

    公开(公告)日：1996-05-07

    申请号：US357052

    申请日：1994-12-14

    申请人： Yasuyuki Nozuyama ,  Kazuhiko Ohashi

    发明人： Yasuyuki Nozuyama ,  Kazuhiko Ohashi

    IPC分类号： G06F11/22 ,  G01R31/3185 ,  G06F11/26

    CPC分类号： G01R31/318541 ,  G01R31/318536

    摘要： A data processing device with a test circuit has a plurality of macro blocks, a common bus for transferring the output of one of the macro blocks to the other macro blocks, and a tri-state buffer incorporated into each macro block. A bus control circuit selects the tri-state buffer in a normal operation mode in which the device performs its normal functions, in order to transfer the information stored in the macro block corresponding to the tri-state buffer selected by the bus control circuit to the common bus. A selecting control circuit, which includes a selector, an AND gate, and a flip-flop (F/F), is used for selecting the tri-state buffer in a test operation mode which the device has entered, then for transferring the information stored in the macro block corresponding to the tri-state buffer selected by the selecting control circuit to the common bus. A F/F is provided for setting the device in either the normal operation mode or the test operation mode. In the data processing device according to the present invention, in addition to the bus control circuit, which is used in the normal operation mode, the selecting control circuit, which is used in the test operation mode, is provided, so that the efficiency of the test vector generation is greatly improved.

    摘要翻译： 具有测试电路的数据处理装置具有多个宏块，用于将宏块中的一个的输出传送到其他宏块的公共总线，以及并入每个宏块中的三态缓冲器。 总线控制电路在设备执行其正常功能的正常操作模式中选择三态缓冲器，以将存储在与由总线控制电路选择的三态缓冲器相对应的宏块中的信息传送到 公车 包括选择器，与门和触发器（F / F）的选择控制电路用于在设备输入的测试操作模式中选择三态缓冲器，然后用于传送信息 存储在与由选择控制电路选择的三态缓冲器对应的宏块中的公共总线。 提供F / F用于在正常操作模式或测试操作模式下设置设备。 在根据本发明的数据处理装置中，除了在正常操作模式下使用的总线控制电路之外，还提供了在测试操作模式中使用的选择控制电路， 测试向量生成得到很大的改善。