公开(公告)号：US09041199B2

公开(公告)日：2015-05-26

申请号：US12650654

申请日：2009-12-31

申请人： Makoto Murai ,  Yoshimichi Harada

发明人： Makoto Murai ,  Yoshimichi Harada

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L25/065 ,  H01L23/31 ,  H01L25/03

CPC分类号： H01L24/12 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/17 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81121 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83051 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor device includes: a mount body; a semiconductor chip mounted on the mount body via projecting connecting terminals; and a filling resin filled between the mount body and the semiconductor chip to seal the connecting terminals, the filling resin being retained inside the semiconductor chip in such a way as not to run out of at least one side portion in four side portions defining an outer peripheral portion of the semiconductor chip.

摘要翻译： 半导体器件包括：安装体; 通过突出的连接端子安装在安装体上的半导体芯片; 以及填充树脂，其填充在所述安装体和所述半导体芯片之间以密封所述连接端子，所述填充树脂保持在所述半导体芯片的内部，使得不会在限定外部的四个侧部中的至少一个侧部中流出 半导体芯片的周边部分。

公开(公告)号：US08222744B2

公开(公告)日：2012-07-17

申请号：US12688029

申请日：2010-01-15

申请人： Yoshimichi Harada ,  Makoto Murai ,  Takayuki Tanaka ,  Takuya Nakamura

发明人： Yoshimichi Harada ,  Makoto Murai ,  Takayuki Tanaka ,  Takuya Nakamura

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L21/563 ,  H01L2224/0554 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device includes: a mounted body in which a wiring pattern is formed on a first main surface; a semiconductor chip mounted on the surface of the mounted body on which the wiring pattern is formed; an underfill material which is filled between the mounted body and the semiconductor chip and forms a fillet on an outer peripheral part of the semiconductor chip; and an injection section which is disposed on the mounted body and on an outside of a side section, on which the fillet is formed to be longest, of four side sections defining a chip mount area on which the semiconductor chip is mounted, and guides the underfill material to between the mounted body and the semiconductor chip.

摘要翻译： 半导体器件包括：安装体，其中在第一主表面上形成布线图案; 安装在其上形成有布线图案的安装体的表面上的半导体芯片; 填充在所述安装体和所述半导体芯片之间的底部填充材料，在所述半导体芯片的外周部形成圆角; 以及喷射部，其设置在所述安装体上并且在所述圆角形状最远的侧部的外侧上限定安装所述半导体芯片的芯片安装区域的四个侧部，并且引导所述注射部 底部填充材料到安装体和半导体芯片之间。

公开(公告)号：US09425070B2

公开(公告)日：2016-08-23

申请号：US13005841

申请日：2011-01-13

申请人： Yoshimichi Harada ,  Makoto Murai ,  Takayuki Tanaka ,  Kana Nagayoshi ,  Takuya Nakamura

发明人： Yoshimichi Harada ,  Makoto Murai ,  Takayuki Tanaka ,  Kana Nagayoshi ,  Takuya Nakamura

IPC分类号： H01L23/48 ,  H01L21/56

CPC分类号： H01L21/563 ,  H01L2224/0554 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Disclosed herein is a semiconductor device, including: a mount body having a first principal surface on which a wiring pattern is formed; a semiconductor chip mounted above the principal surface of the mount body on which the wiring pattern is formed; an underfill material filled between the mount body and the semiconductor chip, thereby forming a fillet in an outer peripheral portion of the semiconductor chip; and an introduction portion formed outside a side portion, along which the fillet is formed so as to be longest, of four side portions which measure a chip mounting area, on the mount body, onto which the semiconductor chip is mounted, the introduction portion serving to introduce the underfill material between the mount body and the semiconductor chip.

摘要翻译： 这里公开了一种半导体器件，包括：安装体，其具有形成布线图案的第一主表面; 半导体芯片安装在其上形成有布线图案的安装体的主表面上方; 填充在安装体和半导体芯片之间的底部填充材料，从而在半导体芯片的外周部分形成圆角; 以及引导部，其形成在所述圆角部分的外侧，所述边缘沿着所述边缘形成为最长，在安装有所述半导体芯片的所述安装体上测量芯片安装面积的四个侧部，所述引入部分服务 以在底座和半导体芯片之间引入底部填充材料。

公开(公告)号：US20110175239A1

公开(公告)日：2011-07-21

申请号：US13005841

申请日：2011-01-13

申请人： Yoshimichi Harada ,  Makoto Murai ,  Takayuki Tanaka ,  Kana Nagayoshi ,  Takuya Nakamura

发明人： Yoshimichi Harada ,  Makoto Murai ,  Takayuki Tanaka ,  Kana Nagayoshi ,  Takuya Nakamura

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L21/563 ,  H01L2224/0554 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Disclosed herein is a semiconductor device, including: a mount body having a first principal surface on which a wiring pattern is formed; a semiconductor chip mounted above the principal surface of the mount body on which the wiring pattern is formed; an underfill material filled between the mount body and the semiconductor chip, thereby forming a fillet in an outer peripheral portion of the semiconductor chip; and an introduction portion formed outside a side portion, along which the fillet is formed so as to be longest, of four side portions which measure a chip mounting area, on the mount body, onto which the semiconductor chip is mounted, the introduction portion serving to introduce the underfill material between the mount body and the semiconductor chip.

摘要翻译： 这里公开了一种半导体器件，包括：安装体，其具有形成布线图案的第一主表面; 半导体芯片安装在其上形成有布线图案的安装体的主表面上方; 填充在安装体和半导体芯片之间的底部填充材料，从而在半导体芯片的外周部分形成圆角; 以及引导部，其形成在所述圆角部分的外侧，所述边缘沿着所述边缘形成为最长，在安装有所述半导体芯片的所述安装体上测量芯片安装面积的四个侧部，所述引入部分服务 以在底座和半导体芯片之间引入底部填充材料。

公开(公告)号：US20100181680A1

公开(公告)日：2010-07-22

申请号：US12688029

申请日：2010-01-15

申请人： Yoshimichi Harada ,  Makoto Murai ,  Takayuki Tanaka ,  Takuya Nakamura

发明人： Yoshimichi Harada ,  Makoto Murai ,  Takayuki Tanaka ,  Takuya Nakamura

IPC分类号： H01L23/16 ,  H01L21/56 ,  H01L23/488

CPC分类号： H01L21/563 ,  H01L2224/0554 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device includes: a mounted body in which a wiring pattern is formed on a first main surface; a semiconductor chip mounted on the surface of the mounted body on which the wiring pattern is formed; an underfill material which is filled between the mounted body and the semiconductor chip and forms a fillet on an outer peripheral part of the semiconductor chip; and an injection section which is disposed on the mounted body and on an outside of a side section, on which the fillet is formed to be longest, of four side sections defining a chip mount area on which the semiconductor chip is mounted, and guides the underfill material to between the mounted body and the semiconductor chip.

摘要翻译： 半导体器件包括：安装体，其中在第一主表面上形成布线图案; 安装在其上形成有布线图案的安装体的表面上的半导体芯片; 填充在所述安装体和所述半导体芯片之间的底部填充材料，在所述半导体芯片的外周部形成圆角; 以及喷射部，其设置在所述安装体上并且在所述圆角形状最远的侧部的外侧上限定安装所述半导体芯片的芯片安装区域的四个侧部，并且引导所述注射部 底部填充材料到安装体和半导体芯片之间。

公开(公告)号：US08656581B2

公开(公告)日：2014-02-25

申请号：US12563849

申请日：2009-09-21

申请人： Makoto Murai ,  Yasuhiro Kohara ,  Ryosuke Usui

发明人： Makoto Murai ,  Yasuhiro Kohara ,  Ryosuke Usui

IPC分类号： H05K3/36

CPC分类号： H05K3/243 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/05553 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48644 ,  H01L2224/49171 ,  H01L2224/81801 ,  H01L2224/85444 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351 ,  H05K3/284 ,  H05K3/3452 ,  H05K3/382 ,  H05K2201/0989 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49222 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method for fabricating a circuit apparatus includes forming a wiring layer, a conductive layer, and a first insulating layer on the wiring substrate, removing the conductive layer in an opening of the first insulating layer so as to expose the wiring layer, forming a gold plating layer on the wiring layer, removing the first insulating layer and the conductive layer, forming a second insulating layer on the wiring substrate, the second insulating layer having an opening through which the gold plating and adjacent wiring layers are exposed, and electrically connecting a circuit element to the gold plating layer.

摘要翻译： 一种制造电路装置的方法，包括在布线基板上形成布线层，导电层和第一绝缘层，去除第一绝缘层的开口中的导电层，以露出布线层，形成金 在所述布线层上除去所述第一绝缘层和所述导电层，在所述布线基板上形成第二绝缘层，所述第二绝缘层具有开金属镀层和相邻配线层露出的开口， 电路元件到镀金层。

公开(公告)号：US5274843A

公开(公告)日：1993-12-28

申请号：US821862

申请日：1992-01-16

申请人： Makoto Murai ,  Kiyoshi Wagai ,  Tatsuaki Sekigawa

发明人： Makoto Murai ,  Kiyoshi Wagai ,  Tatsuaki Sekigawa

IPC分类号： H04B1/16 ,  H04W52/02 ,  H04W88/02 ,  H04Q3/02

CPC分类号： H04B1/1615 ,  H04W52/0229 ,  H04W88/022

摘要： A paging apparatus having a battery saving function comprises a power supply to a radio circuit and a power supply control circuit. Power is turned on periodically in synchronization with the detection of synchronization signals and is turned off responsive to the detection of a predetermined sequence. The power supply to the radio circuit remains turned off without being turned on periodically for a predetermined time period in response to the detection of a specific code addressed to the paging apparatus.

摘要翻译： 具有电池节电功能的寻呼装置包括对无线电电路的电源和电源控制电路。 与同步信号的检测同步地周期性地接通电力，并且响应于预定序列的检测而断开电源。 响应于检测寻址到寻呼装置的特定码，无线电路的电源保持关闭而不会周期性地启动预定时间段。

公开(公告)号：US5105189A

公开(公告)日：1992-04-14

申请号：US553603

申请日：1990-07-18

申请人： Makoto Murai ,  Tatsuaki Sekigawa

发明人： Makoto Murai ,  Tatsuaki Sekigawa

IPC分类号： H04Q7/14 ,  G08B5/22

CPC分类号： G08B5/227

摘要： A paging apparatus includes a first switch for turning on/off a power supply, a second switch, a memory for storing a received message, a display for displaying a message read out from the memory, a switch operation detector for detecting operations for the first and second switches, and a message controller for selectively executing a display mode of displaying the message, a preservation mode of preserving the message in the memory, and a clear mode of clearing the message stored in the memory, in response to a conbination of operations of the first and second switches detected by the switch operation detector.

摘要翻译： 寻呼装置包括用于打开/关闭电源的第一开关，第二开关，用于存储接收到的消息的存储器，用于显示从存储器读出的消息的显示器，用于检测第一 和第二开关，以及消息控制器，用于响应于操作的结合，选择性地执行显示消息的显示模式，保存存储器中的消息的保存模式以及清除存储在存储器中的消息的清除模式 由开关操作检测器检测到的第一和第二开关。

公开(公告)号：US09918970B2

公开(公告)日：2018-03-20

申请号：US13110295

申请日：2011-05-18

申请人： Tatsunobu Yoshioka ,  Makoto Murai ,  Hiroaki Tasaki

发明人： Tatsunobu Yoshioka ,  Makoto Murai ,  Hiroaki Tasaki

IPC分类号： A61K31/435 ,  A61K47/32 ,  A61K31/439 ,  A61K47/48

CPC分类号： A61K31/439 ,  A61K47/32 ,  A61K47/58 ,  A61K47/585

摘要： Disclosed is a pharmaceutical composition comprising a complex between solifenacin or a pharmaceutically acceptable salt thereof and an ion exchange resin, and an acrylic based polymer.

公开(公告)号：US07538867B2

公开(公告)日：2009-05-26

申请号：US11139970

申请日：2005-05-31

申请人： Makoto Murai

发明人： Makoto Murai

IPC分类号： G01N21/00

CPC分类号： G01N21/956

摘要： Plural repetitive patterns 61 are formed on a transparent substrate 62 in the unit of a chip 65. Each of the repetitive patterns has plural pseudo mura defects 66 to which intensities of mura defects occurring in a predetermined repetitive pattern are allocated with being stepwise changed, for respective kinds of the mura defects.The mura defects are a CD Mura based on an abnormality in critical dimension of unit patterns 63 in the repetitive patterns, a Pitch Mura based on an abnormality in interval of the repetitive patterns, a Butting Mura based on a positional displacement of the repetitive patterns, and a Defect mura based on a pattern defect of unit patterns in the repetitive patterns.

摘要翻译： 多个重复图案61以芯片65为单位形成在透明基板62上。每个重复图案具有多个伪色调缺陷66，以预定的重复图案分配发生的mura缺陷的强度逐步改变，为 各种mura缺陷。 基于重复图案中的单元图案63的临界尺寸的异常，基于重复图案的间隔异常的间隔Mura，基于重复图案的位置偏移的对接Mura，基于Mura缺陷， 和基于重复模式中单位模式的模式缺陷的缺陷缺陷。