公开(公告)号：US5274843A

公开(公告)日：1993-12-28

申请号：US821862

申请日：1992-01-16

申请人： Makoto Murai ,  Kiyoshi Wagai ,  Tatsuaki Sekigawa

发明人： Makoto Murai ,  Kiyoshi Wagai ,  Tatsuaki Sekigawa

IPC分类号： H04B1/16 ,  H04W52/02 ,  H04W88/02 ,  H04Q3/02

CPC分类号： H04B1/1615 ,  H04W52/0229 ,  H04W88/022

摘要： A paging apparatus having a battery saving function comprises a power supply to a radio circuit and a power supply control circuit. Power is turned on periodically in synchronization with the detection of synchronization signals and is turned off responsive to the detection of a predetermined sequence. The power supply to the radio circuit remains turned off without being turned on periodically for a predetermined time period in response to the detection of a specific code addressed to the paging apparatus.

摘要翻译： 具有电池节电功能的寻呼装置包括对无线电电路的电源和电源控制电路。 与同步信号的检测同步地周期性地接通电力，并且响应于预定序列的检测而断开电源。 响应于检测寻址到寻呼装置的特定码，无线电路的电源保持关闭而不会周期性地启动预定时间段。

公开(公告)号：US5105189A

公开(公告)日：1992-04-14

申请号：US553603

申请日：1990-07-18

申请人： Makoto Murai ,  Tatsuaki Sekigawa

发明人： Makoto Murai ,  Tatsuaki Sekigawa

IPC分类号： H04Q7/14 ,  G08B5/22

CPC分类号： G08B5/227

摘要： A paging apparatus includes a first switch for turning on/off a power supply, a second switch, a memory for storing a received message, a display for displaying a message read out from the memory, a switch operation detector for detecting operations for the first and second switches, and a message controller for selectively executing a display mode of displaying the message, a preservation mode of preserving the message in the memory, and a clear mode of clearing the message stored in the memory, in response to a conbination of operations of the first and second switches detected by the switch operation detector.

摘要翻译： 寻呼装置包括用于打开/关闭电源的第一开关，第二开关，用于存储接收到的消息的存储器，用于显示从存储器读出的消息的显示器，用于检测第一 和第二开关，以及消息控制器，用于响应于操作的结合，选择性地执行显示消息的显示模式，保存存储器中的消息的保存模式以及清除存储在存储器中的消息的清除模式 由开关操作检测器检测到的第一和第二开关。

公开(公告)号：US08656581B2

公开(公告)日：2014-02-25

申请号：US12563849

申请日：2009-09-21

申请人： Makoto Murai ,  Yasuhiro Kohara ,  Ryosuke Usui

发明人： Makoto Murai ,  Yasuhiro Kohara ,  Ryosuke Usui

IPC分类号： H05K3/36

CPC分类号： H05K3/243 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/05553 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48644 ,  H01L2224/49171 ,  H01L2224/81801 ,  H01L2224/85444 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351 ,  H05K3/284 ,  H05K3/3452 ,  H05K3/382 ,  H05K2201/0989 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49222 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method for fabricating a circuit apparatus includes forming a wiring layer, a conductive layer, and a first insulating layer on the wiring substrate, removing the conductive layer in an opening of the first insulating layer so as to expose the wiring layer, forming a gold plating layer on the wiring layer, removing the first insulating layer and the conductive layer, forming a second insulating layer on the wiring substrate, the second insulating layer having an opening through which the gold plating and adjacent wiring layers are exposed, and electrically connecting a circuit element to the gold plating layer.

摘要翻译： 一种制造电路装置的方法，包括在布线基板上形成布线层，导电层和第一绝缘层，去除第一绝缘层的开口中的导电层，以露出布线层，形成金 在所述布线层上除去所述第一绝缘层和所述导电层，在所述布线基板上形成第二绝缘层，所述第二绝缘层具有开金属镀层和相邻配线层露出的开口， 电路元件到镀金层。

公开(公告)号：US09918970B2

公开(公告)日：2018-03-20

申请号：US13110295

申请日：2011-05-18

申请人： Tatsunobu Yoshioka ,  Makoto Murai ,  Hiroaki Tasaki

发明人： Tatsunobu Yoshioka ,  Makoto Murai ,  Hiroaki Tasaki

IPC分类号： A61K31/435 ,  A61K47/32 ,  A61K31/439 ,  A61K47/48

CPC分类号： A61K31/439 ,  A61K47/32 ,  A61K47/58 ,  A61K47/585

摘要： Disclosed is a pharmaceutical composition comprising a complex between solifenacin or a pharmaceutically acceptable salt thereof and an ion exchange resin, and an acrylic based polymer.

公开(公告)号：US09041199B2

公开(公告)日：2015-05-26

申请号：US12650654

申请日：2009-12-31

申请人： Makoto Murai ,  Yoshimichi Harada

发明人： Makoto Murai ,  Yoshimichi Harada

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L25/065 ,  H01L23/31 ,  H01L25/03

CPC分类号： H01L24/12 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/17 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81121 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83051 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor device includes: a mount body; a semiconductor chip mounted on the mount body via projecting connecting terminals; and a filling resin filled between the mount body and the semiconductor chip to seal the connecting terminals, the filling resin being retained inside the semiconductor chip in such a way as not to run out of at least one side portion in four side portions defining an outer peripheral portion of the semiconductor chip.

摘要翻译： 半导体器件包括：安装体; 通过突出的连接端子安装在安装体上的半导体芯片; 以及填充树脂，其填充在所述安装体和所述半导体芯片之间以密封所述连接端子，所述填充树脂保持在所述半导体芯片的内部，使得不会在限定外部的四个侧部中的至少一个侧部中流出 半导体芯片的周边部分。

公开(公告)号：US07538867B2

公开(公告)日：2009-05-26

申请号：US11139970

申请日：2005-05-31

申请人： Makoto Murai

发明人： Makoto Murai

IPC分类号： G01N21/00

CPC分类号： G01N21/956

摘要： Plural repetitive patterns 61 are formed on a transparent substrate 62 in the unit of a chip 65. Each of the repetitive patterns has plural pseudo mura defects 66 to which intensities of mura defects occurring in a predetermined repetitive pattern are allocated with being stepwise changed, for respective kinds of the mura defects.The mura defects are a CD Mura based on an abnormality in critical dimension of unit patterns 63 in the repetitive patterns, a Pitch Mura based on an abnormality in interval of the repetitive patterns, a Butting Mura based on a positional displacement of the repetitive patterns, and a Defect mura based on a pattern defect of unit patterns in the repetitive patterns.

摘要翻译： 多个重复图案61以芯片65为单位形成在透明基板62上。每个重复图案具有多个伪色调缺陷66，以预定的重复图案分配发生的mura缺陷的强度逐步改变，为 各种mura缺陷。 基于重复图案中的单元图案63的临界尺寸的异常，基于重复图案的间隔异常的间隔Mura，基于重复图案的位置偏移的对接Mura，基于Mura缺陷， 和基于重复模式中单位模式的模式缺陷的缺陷缺陷。

公开(公告)号：US20070199733A1

公开(公告)日：2007-08-30

申请号：US11678321

申请日：2007-02-23

申请人： Makoto Murai ,  Ryosuke Usui

发明人： Makoto Murai ,  Ryosuke Usui

IPC分类号： H05K1/00

CPC分类号： H05K3/0032 ,  H05K1/0366 ,  H05K3/0035 ,  H05K3/421 ,  H05K2201/029 ,  H05K2203/065 ,  Y10T29/49155 ,  Y10T29/49204

摘要： Provided is a circuit board which suppresses abnormal formation of plated layer inside a via, caused by core materials of glass fibers or the like projected from a side wall of the via and which helps to improve the connection reliability of the via. An insulating layer, which is formed of thermoset resin and embedded with glass fibers, is provided between a first wiring layer and a second wiring layer. The glass fibers projected into a via hole side from a side wall of the via hole in different positions are embedded into a via conductor in such a state that the glass fibers are jointed with each other.

摘要翻译： 提供一种电路板，其抑制由通孔的侧壁突出的玻璃纤维等的芯材引起的通孔内的镀层的异常形成，有助于提高通孔的连接可靠性。 在第一布线层和第二布线层之间设置由热固性树脂形成并嵌入玻璃纤维的绝缘层。 玻璃纤维在玻璃纤维彼此接合的状态下嵌入到通孔导体中，从通孔的侧壁在不同位置投影到通孔侧的玻璃纤维。

公开(公告)号：US20070164766A1

公开(公告)日：2007-07-19

申请号：US11526875

申请日：2006-09-26

申请人： Makoto Murai ,  Ryosuke Usui ,  Yasuhiro Kohara

发明人： Makoto Murai ,  Ryosuke Usui ,  Yasuhiro Kohara

IPC分类号： G01R31/02

CPC分类号： H05K1/0206 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/19105 ,  H05K1/056 ,  H05K3/0052 ,  H05K3/0061 ,  H05K3/383 ,  H05K3/385 ,  H05K3/4652 ,  H05K2201/068 ,  H05K2201/09054 ,  H05K2201/2072 ,  H05K2203/0315 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A circuit device having superior mechanical strength at the interface between a circuit board and heat sink and superior efficiency for radiating heat from a circuit element to the heat sink through the circuit board. The circuit device includes the metal-based insulation board for installing the circuit element, and the heat sink, over which the insulation board is installed with a paste arranged therebetween. The insulation board has a projection arranged on the surface facing the heat sink along a peripheral portion. At least part of the projection contacts the heat sink through the paste layer.

摘要翻译： 电路装置在电路板和散热器之间的界面处具有优良的机械强度，并且具有优异的效率，用于通过电路板从电路元件散热至散热片。 电路装置包括用于安装电路元件的金属基绝缘板和安装有绝缘板的绝热板的散热器。 绝缘板具有沿着周边部分布置在面向散热器的表面上的突起。 突起的至少一部分通过膏层与散热片接触。

公开(公告)号：US20060193108A1

公开(公告)日：2006-08-31

申请号：US11359429

申请日：2006-02-23

申请人： Ryosuke Usui ,  Hideki Mizuhara ,  Yasunori Inoue ,  Makoto Murai

发明人： Ryosuke Usui ,  Hideki Mizuhara ,  Yasunori Inoue ,  Makoto Murai

IPC分类号： H02B1/00

CPC分类号： H01L23/5389 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/24145 ,  H01L2224/24195 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/29399 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/185 ,  H05K3/323 ,  H05K3/4652 ,  H05K2201/10515 ,  H01L2924/00

摘要： A thin circuit device that can operate at a high speed is provided. The circuit device includes a first circuit element and a circuit element portion formed on a substrate. The first circuit element and the circuit element portion are arranged in such a manner that element surfaces thereof are opposed to each other. A terminal formed on the element surface of the first circuit element and a terminal formed on the element surface of the circuit element portion are electrically connected to each other via conductive particles in a binder forming an anisotropic conductive film and a via. The anisotropic conductive film and a third insulating resin film are bonded by thermocompression bonding in the same step, thereby simplifying manufacturing steps of the circuit device.

摘要翻译： 提供可以高速运行的薄电路器件。 电路装置包括第一电路元件和形成在基板上的电路元件部分。 第一电路元件和电路元件部分以其元件表面彼此相对的方式布置。 形成在第一电路元件的元件表面上的端子和形成在电路元件部分的元件表面上的端子通过形成各向异性导电膜和通孔的粘合剂中的导电颗粒彼此电连接。 各向异性导电膜和第三绝缘树脂膜在同一步骤中通过热压接合，从而简化了电路器件的制造步骤。

公开(公告)号：US06479174B1

公开(公告)日：2002-11-12

申请号：US09543931

申请日：2000-04-06

申请人： Hirotake Yamada ,  Makoto Murai ,  Hiroshi Furukubo ,  Tsuneaki Ohashi

发明人： Hirotake Yamada ,  Makoto Murai ,  Hiroshi Furukubo ,  Tsuneaki Ohashi

IPC分类号： C25D32100

CPC分类号： C04B41/009 ,  C04B35/565 ,  C04B41/5059 ,  C04B41/87 ,  C04B2111/92 ,  C23C16/325 ,  Y10T428/25 ,  Y10T428/26 ,  Y10T428/30 ,  C04B41/4531 ,  C04B35/522

摘要： A silicon carbide body includes polycrystals of silicon carbide, and has a purity of silicon carbide of not less than 99.9999 wt %, a relative density of not less than 99% and a ratio of silicon of not less than 70.12 wt %.

摘要翻译： 碳化硅体包括碳化硅的多晶体，并且具有不小于99.9999重量％的碳化硅的纯度，相对密度不小于99％，硅的比例不小于70.12重量％。