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    SUPPRESSING FRACTURES IN DICED INTEGRATED CIRCUITS
    4.
    发明申请
    SUPPRESSING FRACTURES IN DICED INTEGRATED CIRCUITS 审中-公开
    在集成电路中抑制断裂

    公开(公告)号：US20110006389A1

    公开(公告)日：2011-01-13

    申请号：US12499546

    申请日：2009-07-08

    申请人： Mark A. Bachman ,  John W. Osenbach

    发明人： Mark A. Bachman ,  John W. Osenbach

    IPC分类号： H01L29/06 ,  H01L21/3205

    CPC分类号： H01L23/585 ,  H01L23/3128 ,  H01L23/5329 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/00

    摘要： A semiconductor device has a singulated die having a substrate and a die edge. An interconnect dielectric layer is located on the substrate, and integrated circuit has interconnections located within the interconnect dielectric layer. A trench is located in the interconnect dielectric layer and between a seal ring and a remnant of the interconnect dielectric layer. The seal ring is located within the interconnect dielectric layer and between the trench and the integrated circuit, with the remnant of the interconnect dielectric layer being located between the trench and the edge of the die.

    摘要翻译： 半导体器件具有具有基板和裸片边缘的单模裸片。 互连电介质层位于衬底上，并且集成电路具有位于互连电介质层内的互连。 沟槽位于互连电介质层中，并且位于密封环和互连电介质层的残余物之间。 密封环位于互连电介质层内，并且位于沟槽和集成电路之间，互连电介质层的残余物位于沟槽和管芯的边缘之间。

    Controlling warping in integrated circuit devices
    8.
    发明授权
    Controlling warping in integrated circuit devices 有权
    集成电路器件控制翘曲

    公开(公告)号：US07408246B2

    公开(公告)日：2008-08-05

    申请号：US11095929

    申请日：2005-03-31

    申请人： John W. Osenbach ,  Thomas H. Shilling ,  Weidong Xie

    发明人： John W. Osenbach ,  Thomas H. Shilling ,  Weidong Xie

    IPC分类号： H01L23/495

    CPC分类号： H01L23/3735 ,  H01L24/32 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00

    摘要： Techniques for integrated circuit device fabrication are provided. In one aspect, an integrated circuit device comprises a base, at least one die attached to the base, and a counterbalancing layer on at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. In another aspect, warping of an integrated circuit device comprising at least one die attached to a base is controlled by applying a counterbalancing layer to at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die.

    摘要翻译： 提供了集成电路器件制造技术。 在一个方面，一种集成电路装置包括基座，至少一个连接到基座的管芯，以及基座的至少一侧的至少一部分上的平衡层，其适于补偿至少一部分热膨胀 基座和模具之间存在差异。 在另一方面，包括至少一个连接到基座的管芯的集成电路器件的翘曲通过将平衡层施加到所述基底的至少一个侧面的至少一部分上来进行控制，该至少一个侧面适于补偿至少一部分热 基地和死亡之间存在扩张差异。