公开(公告)号：US5784781A

公开(公告)日：1998-07-28

申请号：US559214

申请日：1995-11-16

申请人： Masaharu Shirai ,  Kenji Terada ,  Yutaka Tsukada ,  Shuhei Tsuchita

发明人： Masaharu Shirai ,  Kenji Terada ,  Yutaka Tsukada ,  Shuhei Tsuchita

IPC分类号： H01L21/28 ,  H01L21/48 ,  H01L21/768 ,  H01L23/522 ,  H05K3/00 ,  H05K3/46 ,  H05K1/14

CPC分类号： H01L21/486 ,  H05K3/0023 ,  H05K2201/09827 ,  H05K2203/025 ,  H05K3/0044 ,  H05K3/4644 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A manufacturing process for an organic chip carrier is disclosed which permits one to form a substantially bowl-shaped via hole in the substrate of the chip carrier, which makes it easy to deposit a conductive layer having a substantially uniform thickness on the sidewall of the via hole. In accordance with the manufacturing process, photosensitive resin 3 is provided on a substrate 1 in a thickness which is the thickness necessary for a final insulating layer plus a thickness to be removed by, for example grinding, the photosensitive resin 3. Cavities are then formed in the photosensitive resin 3 in a predetermined pattern by exposure and development. The photosensitive resin 3 formed with the cavities 8 is heat-cured. Subsequently, when the photo-cured layer 6a and a part of the heat-cured layer 3a are removed, e.g., ground off, a substantially bowl-shaped via hole 9 is formed.

摘要翻译： 公开了一种用于有机芯片载体的制造方法，其可以在芯片载体的基板中形成基本上碗状的通孔，这使得容易将具有基本均匀厚度的导电层沉积在通孔的侧壁上 孔。 根据制造方法，感光性树脂3以通过例如研磨感光性树脂3除去最终绝缘层加上除去厚度的厚度设置在基板1上。然后形成凹部 通过曝光和显影以预定图案形成感光性树脂3。 形成有空腔8的感光性树脂3被热固化。 随后，当光固化层6a和热固化层3a的一部分被去除时，例如研磨掉，形成大致碗状的通孔9。

公开(公告)号：US5537740A

公开(公告)日：1996-07-23

申请号：US561533

申请日：1995-11-22

申请人： Masaharu Shirai ,  Shuhei Tsuchita

发明人： Masaharu Shirai ,  Shuhei Tsuchita

IPC分类号： H05K3/46 ,  H05K1/11 ,  H05K3/00 ,  H05K3/06 ,  H05K3/40 ,  H05K3/42 ,  H05K3/10

CPC分类号： H05K1/116 ,  H05K3/421 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/09581 ,  H05K2203/135 ,  H05K3/0023 ,  H05K3/0082 ,  H05K3/0094 ,  H05K3/064 ,  H05K3/4038 ,  H05K3/46 ,  H05K3/4644 ,  Y10T29/49165

摘要： A blind hole extending from upper or surface wiring of a printed circuit board to inner or lower wiring, and having an opening larger than the bottom, is formed on a substrate, and a conductor pattern is formed on the bottom and the internal wall of the blind hole to connect the inner wiring with the surface wiring.

摘要翻译： 在基板上形成有从印刷电路板的上部或表面布线延伸到内部或下部布线并且具有比底部大的开口的盲孔，并且在底部和内壁上形成导体图案 盲孔将内部接线与表面接线连接。

公开(公告)号：US5510580A

公开(公告)日：1996-04-23

申请号：US413328

申请日：1995-03-30

申请人： Masaharu Shirai ,  Shuhei Tsuchita

发明人： Masaharu Shirai ,  Shuhei Tsuchita

IPC分类号： H05K1/11 ,  H05K3/00 ,  H05K3/06 ,  H05K3/42 ,  H05K3/46

CPC分类号： H05K3/421 ,  H05K1/116 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/09581 ,  H05K2203/135 ,  H05K3/0023 ,  H05K3/0094 ,  H05K3/064 ,  H05K3/4644

摘要： A blind hole extending from upper or surface wiring of a printed circuit board to inner or lower wiring, and having an opening larger than the bottom, is formed on a substrate, and a conductor pattern is formed on the bottom and the internal wall of the blind hole to connect the inner wiring with the surface wiring.

摘要翻译： 在基板上形成有从印刷电路板的上部或表面布线延伸到内部或下部布线并且具有比底部大的开口的盲孔，并且在底部和内壁上形成导体图案 盲孔将内部接线与表面接线连接。

公开(公告)号：US5444299A

公开(公告)日：1995-08-22

申请号：US186737

申请日：1994-01-25

申请人： Yutaka Tsukada ,  Yasukazu Kobayakawa ,  Yoji Maeda ,  Shuhei Tsuchita

发明人： Yutaka Tsukada ,  Yasukazu Kobayakawa ,  Yoji Maeda ,  Shuhei Tsuchita

IPC分类号： H01L23/50 ,  H01L23/498 ,  H05K1/18 ,  H05K3/34 ,  H01L23/02 ,  H01L23/12 ,  H01L23/48

CPC分类号： H01L23/49861 ,  H01L23/49805 ,  H01L23/4985 ,  H05K3/3426 ,  H01L2924/0002 ,  H05K2201/10424 ,  H05K2201/10689 ,  H05K2201/10727 ,  H05K2201/10946 ,  Y02P70/613

摘要： An electronic package assembly wherein lead wires serve to connect conductors on a first substrate (e.g., ceramic) having a semiconductor device (e.g., IC chip) coupled to the conductors and positioned on the substrate, to respective conductors on a second substrate (e.g., a printed circuit board). The lead wires are secured to three different surfaces (e.g., top, side and bottom) of the first substrate, and include curved projection portions for being directly connected to the second substrate conductors.

摘要翻译： 一种电子封装组件，其中引线用于将具有半导体器件（例如，IC芯片）的第一衬底（例如，陶瓷）上的导体连接到导体并位于衬底上的第二衬底上的相应导体（例如， 印刷电路板）。 引线被固定到第一基板的三个不同的表面（例如，顶部，侧面和底部），并且包括用于直接连接到第二基板导体的弯曲突出部分。

公开(公告)号：US5878942A

公开(公告)日：1999-03-09

申请号：US712541

申请日：1996-09-11

申请人： Yasushi Kodama ,  Shuhei Tsuchita ,  Yutaka Tsukada ,  Yasumitsu Orii ,  Hideo Ohkuma

发明人： Yasushi Kodama ,  Shuhei Tsuchita ,  Yutaka Tsukada ,  Yasumitsu Orii ,  Hideo Ohkuma

IPC分类号： H01L21/60 ,  B23K1/005 ,  B23K1/012 ,  H01L21/603 ,  H05K3/34 ,  B23K31/02 ,  B23K37/04

CPC分类号： B23K1/012 ,  B23K1/0053 ,  H01L23/49811 ,  H01L24/75 ,  H01L24/81 ,  B23K2201/40 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75745 ,  H01L2224/81048 ,  H01L2224/81075 ,  H01L2224/81193 ,  H01L2224/8123 ,  H01L2224/814 ,  H01L2224/81409 ,  H01L2224/81815 ,  H01L24/13 ,  H01L24/16 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K3/3436 ,  H05K3/3494

摘要： Methods and apparatuses to perform soldering while the chip is held by a head under melted solder condition are disclosed. Solder bumps 3 are formed on the chip 1, and they are opposite to terminals 11 on a mounting board 10. Furthermore, a heating block 21 is located at the back of the chip, and it raises the temperature of the solder bumps 3 on the chip 1 to a melting point by heating the chip back by conduction. Preferably, another heating block 22 is located at the back of the mounting board 10. Soldering is performed by bringing the solder bumps 3 into contact with the terminals 11 while the solder is melted.

摘要翻译： 公开了在熔融焊接条件下由芯片保持芯片时执行焊接的方法和装置。 焊料凸块3形成在芯片1上，并且与安装板10上的端子11相对。此外，加热块21位于芯片的背面，并且将焊料凸块3的温度升高到 芯片1通过传导加热芯片而达到熔点。 优选地，另一个加热块22位于安装板10的背面。焊料通过在焊料熔化时使焊料凸块3与端子11接触来进行。

公开(公告)号：US5470796A

公开(公告)日：1995-11-28

申请号：US426536

申请日：1995-04-21

申请人： Yutaka Tsukada ,  Yasukazu Kobayakawa ,  Yoji Maeda ,  Shuhei Tsuchita

发明人： Yutaka Tsukada ,  Yasukazu Kobayakawa ,  Yoji Maeda ,  Shuhei Tsuchita

IPC分类号： H01L23/50 ,  H01L23/498 ,  H05K1/18 ,  H05K3/34 ,  H01L21/60

CPC分类号： H01L23/49861 ,  H01L23/49805 ,  H01L23/4985 ,  H05K3/3426 ,  H01L2924/0002 ,  H05K2201/10424 ,  H05K2201/10689 ,  H05K2201/10727 ,  H05K2201/10946 ,  Y02P70/613

摘要： An electronic package assembly wherein lead wires serve to connect conductors on a first substrate (e.g., ceramic) having a semiconductor device (e.g., IC chip) coupled to the conductors and positioned on the substrate, to respective conductors on a second substrate (e.g., a printed circuit board). The lead wires are secured to three different surfaces (e.g., top, side and bottom) of the first substrate, and include curved projection portions for being directly connected to the second substrate conductors.

摘要翻译： 一种电子封装组件，其中引线用于将具有半导体器件（例如，IC芯片）的第一衬底（例如，陶瓷）上的导体连接到导体并位于衬底上的第二衬底上的相应导体（例如， 印刷电路板）。 引线被固定到第一基板的三个不同的表面（例如，顶部，侧面和底部），并且包括用于直接连接到第二基板导体的弯曲突出部分。