公开(公告)号：US20050247949A1

公开(公告)日：2005-11-10

申请号：US10515655

申请日：2003-04-18

申请人： Masanobu Senda ,  Mitsuhiro Inoue ,  Jun Ito ,  Toshimasa Hayashi ,  Kazuki Nishijima ,  Naoki Shibata

发明人： Masanobu Senda ,  Mitsuhiro Inoue ,  Jun Ito ,  Toshimasa Hayashi ,  Kazuki Nishijima ,  Naoki Shibata

IPC分类号： H01L33/44 ,  H01L33/06 ,  H01L33/10 ,  H01L33/14 ,  H01L33/32 ,  H01L33/40 ,  H01L29/22

CPC分类号： H01L33/40 ,  H01L33/145 ,  H01L33/44

摘要： An insulation film 150 made of SiO2 is formed on a p-layer 106, and a multiple thick film positive electrode 120, which is a metal film formed through metal deposition, is formed on the insulation film 150 and on the p-type layer 106 at the central portion of which has a window and is exposed. The insulation film 150 has a thickness of one fourth multiple of emission wavelength. Thickness of the insulation film 150 is generally determined by multiplying one fourth of intramedium emission wavelength by an odd number. By interference effect, directivity of radiated light along the optical axis direction can be improved.

摘要翻译： 在p层106上形成由SiO 2构成的绝缘膜150，在绝缘膜150上形成作为通过金属沉积形成的金属膜的多层厚膜正极120 并且在其中心部分具有窗口并被暴露的p型层106上。 绝缘膜150具有发射波长的四分之一倍的厚度。 绝缘膜150的厚度通常通过将四分之一的内部发射波长乘以奇数来确定。 通过干涉效应，可以提高辐射光沿光轴方向的方向性。

公开(公告)号：US06918961B2

公开(公告)日：2005-07-19

申请号：US10421855

申请日：2003-04-24

申请人： Toshiaki Chiyo ,  Naoki Shibata ,  Masanobu Senda ,  Jun Ito ,  Shizuyo Asami ,  Shinya Asami ,  Hiroshi Watanabe

发明人： Toshiaki Chiyo ,  Naoki Shibata ,  Masanobu Senda ,  Jun Ito ,  Shizuyo Asami ,  Shinya Asami ,  Hiroshi Watanabe

IPC分类号： C30B25/02 ,  H01L21/20 ,  H01L21/203 ,  H01L21/205 ,  H01L33/00 ,  H01L33/32 ,  H01S5/323 ,  C30B25/12 ,  C30B25/14

CPC分类号： C30B29/406 ,  C30B25/02 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/007 ,  H01L33/32 ,  H01S5/32341 ,  Y10T428/265

摘要： A group III nitride compound semiconductor device has a substrate and an AlN single crystal layer formed on the substrate. The AlN single crystal layer has a thickness of from 0.5 to 3 μm and has a substantially flat surface. The half-value width of an X-ray rocking curve of the AlN single crystal layer is not longer than 50 sec. In another device, a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 μm is grown at a temperature of from 1000 to 1180° C. on a sapphire substrate having a surface nitride layer having a thickness of not larger than 300 Å.

摘要翻译： III族氮化物化合物半导体器件具有在衬底上形成的衬底和AlN单晶层。 AlN单晶层的厚度为0.5〜3μm，具有大致平坦的表面。 AlN单晶层的X射线摇摆曲线的半值宽度不大于50秒。 在另一种器件中，在具有厚度不大于300的表面氮化物层的蓝宝石衬底上，在1000至1180℃的温度下生长具有0.01至3.2μm厚度的III族氮化物化合物半导体层 一个。

公开(公告)号：US06875629B2

公开(公告)日：2005-04-05

申请号：US10479590

申请日：2002-06-03

申请人： Masanobu Senda ,  Naoki Shibata ,  Jun Ito ,  Toshiaki Chiyo

发明人： Masanobu Senda ,  Naoki Shibata ,  Jun Ito ,  Toshiaki Chiyo

IPC分类号： C23C4/02 ,  C23C4/18 ,  H01L21/20 ,  H01L29/20 ,  H01L33/32 ,  H01L21/00

CPC分类号： C30B25/18 ,  C23C4/02 ,  C23C4/18 ,  C30B29/403 ,  H01L21/0242 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/02472 ,  H01L21/02491 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02658 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/0079 ,  Y10S257/918

摘要： A separator layer of Ti is formed on an auxiliary substrate of sapphire or the like. An undercoat layer of TiN is formed on the separator layer. The undercoat layer is provided so that a Group III nitride compound semiconductor layer can be grown with good crystallinity on the undercoat layer. TiN is sprayed on the undercoat layer to form a thermal spray depositing layer. Then, the separator layer is chemically etched to reveal the undercoat layer. Then, a Group III nitride compound semiconductor layer is grown on a surface of the undercoat layer.

摘要翻译： 在蓝宝石等的辅助基板上形成有Ti的隔离层。 在隔离层上形成TiN的底涂层。 提供底涂层，使得能够在底涂层上生长具有良好结晶性的III族氮化物化合物半导体层。 将TiN喷涂在底涂层上以形成热喷涂沉积层。 然后，隔离层被化学蚀刻以露出底涂层。 然后，在底涂层的表面上生长III族氮化物化合物半导体层。

公开(公告)号：US06841808B2

公开(公告)日：2005-01-11

申请号：US09885046

申请日：2001-06-21

申请人： Naoki Shibata ,  Toshiaki Chiyo ,  Masanobu Senda ,  Jun Ito ,  Hiroshi Watanabe ,  Shinya Asami ,  Shizuyo Asami

发明人： Naoki Shibata ,  Toshiaki Chiyo ,  Masanobu Senda ,  Jun Ito ,  Hiroshi Watanabe ,  Shinya Asami ,  Shizuyo Asami

IPC分类号： H01L21/20 ,  H01L33/00 ,  H01L33/32 ,  H01L31/0328 ,  H01L27/15 ,  H01L31/0336 ,  H01L31/12

CPC分类号： H01L33/32 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/0254 ,  H01L21/02642 ,  H01L21/02647 ,  H01L33/007

摘要： An AlN layer having a surface of a texture structure is formed on a sapphire substrate. Then, a growth suppressing material layer is formed on the AlN layer so that the AlN layer is partially exposed to the outside. Then, group III nitride compound semiconductor layers are grown on the AlN layer and on the growth suppressing material layer by execution of an epitaxial lateral overgrowth method. Thus, a group III nitride compound semiconductor device is produced. An undercoat layer having convex portions each shaped like a truncated hexagonal pyramid is formed on a substrate. Group III nitride compound semiconductor layers having a device function are laminated successively on the undercoat layer.

摘要翻译： 在蓝宝石衬底上形成具有纹理结构表面的AlN层。 然后，在AlN层上形成生长抑制材料层，使得AlN层部分地暴露在外部。 然后，通过执行外延横向过度生长法，在AlN层和生长抑制材料层上生长III族氮化物化合物半导体层。 因此，制造了III族氮化物化合物半导体器件。 在基板上形成具有各自成形为截头六角锥的凸部的底涂层。 具有器件功能的III族氮化物化合物半导体层依次层压在底涂层上。

公开(公告)号：US06531719B2

公开(公告)日：2003-03-11

申请号：US09888519

申请日：2001-06-26

申请人： Naoki Shibata ,  Toshiaki Chiyo ,  Masanobu Senda ,  Jun Ito ,  Hiroshi Watanabe ,  Shinya Asami ,  Shizuyo Asami

发明人： Naoki Shibata ,  Toshiaki Chiyo ,  Masanobu Senda ,  Jun Ito ,  Hiroshi Watanabe ,  Shinya Asami ,  Shizuyo Asami

IPC分类号： H01L310336

CPC分类号： H01L33/32 ,  H01L31/03042 ,  H01L31/03046 ,  H01L31/184 ,  H01L31/1852 ,  H01L33/12 ,  H01L33/22 ,  H01L33/405 ,  H01S5/32341 ,  Y02E10/544 ,  Y10S438/978

摘要： A group III nitride compound semiconductor device has a substrate, a group III nitride compound semiconductor layer having a device function, and an undercoat layer formed between the substrate and the group III nitride semiconductor layer. The undercoat layer has a surface which has a texture structure, or which is trapezoid shaped in section or which is pit shaped. In addition, a reflection layer made of nitride of at least one metal selected from the group consisting of titanium, zirconium, hafnium and tantalum may be formed on a surface of the undercoat layer. Also the surface of the reflection layer is formed as a texture structure, a trapezoid shape in section or a pit shape.

摘要翻译： III族氮化物化合物半导体器件具有衬底，具有器件功能的III族氮化物化合物半导体层和形成在衬底和III族氮化物半导体层之间的底涂层。 底涂层具有具有纹理结构的表面，或者是截面呈梯形或凹坑形的表面。 此外，可以在底涂层的表面上形成由选自钛，锆，铪和钽中的至少一种金属的氮化物制成的反射层。 此外，反射层的表面也形成为纹理结构，截面为梯形或凹坑形状。

公开(公告)号：US20070278532A1

公开(公告)日：2007-12-06

申请号：US11578965

申请日：2005-06-09

申请人： Masayoshi Kosaki ,  Koji Hirata ,  Masanobu Senda ,  Naoki Shibata

发明人： Masayoshi Kosaki ,  Koji Hirata ,  Masanobu Senda ,  Naoki Shibata

IPC分类号： H01L29/778 ,  H01L21/335 ,  H01L21/338 ,  H01L29/812 ,  H01L21/36

CPC分类号： H01L29/66462 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/2003

摘要： A field-effect transistor which comprises a buffer layer and a barrier layer each of which is made of a Group III nitride compound semiconductor and has a channel at the interface inside of the buffer layer to the barrier layer, wherein the barrier layer has multiple-layer structure comprising an abruct interface providing layer which composes the lowest semiconductor layer in said barrier layer and whose composition varies rapidly at the interface of said buffer layer, and an electrode connection plane providing layer which constructs the uppermost semiconductor layer and whose upper surface is formed flat.

摘要翻译： 一种场效应晶体管，其包括缓冲层和阻挡层，每个所述阻挡层由III族氮化物化合物半导体制成，并且在所述缓冲层的内部与所述阻挡层的界面处具有通道，其中所述阻挡层具有多层结构， 层结构包括构成所述阻挡层中的最低半导体层并且其组成在所述缓冲层的界面处快速变化的抗蚀剂界面提供层和构成最上半导体层并且其上表面形成的电极连接平面提供层 平面。

公开(公告)号：US06925100B2

公开(公告)日：2005-08-02

申请号：US10620572

申请日：2003-07-17

申请人： Masanobu Senda ,  Naoki Shibata

发明人： Masanobu Senda ,  Naoki Shibata

IPC分类号： G02B6/42 ,  H01L21/60 ,  H01L33/06 ,  H01L33/14 ,  H01L33/32 ,  H01L33/38 ,  H01L33/62 ,  H01L33/64 ,  H01S3/04 ,  H01S5/00

CPC分类号： H01L33/38 ,  G02B6/4204 ,  H01L33/387 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/051 ,  H01L2224/05568 ,  H01L2224/056 ,  H01L2224/16225 ,  H01L2924/00014

摘要： In an LED, the area of contact between an ohmic electrode formed on a contact layer and the contact layer serves as an effective light-emitting area of a light-emitting layer. Therefore, while the area of contact between the ohmic electrode and the contact layer is kept small, a seat electrode is interposed so that the seat electrode is connected to a circuit wiring on a wiring board by a ball electrode being contact with the seat electrode at an area larger than the area. As a result, the size necessary for forming the ball electrode can be secured easily and the light-emitting area of the light-emitting layer in the LED can be reduced sufficiently. Accordingly, a capacitance component formed by clamping the light-emitting portion of the light-emitting layer can be reduced, so that a time constant at a leading edge of luminance and a time constant at a trailing edge of luminance can be reduced sufficiently to obtain a high speed.

摘要翻译： 在LED中，形成在接触层上的欧姆电极与接触层之间的接触面积成为发光层的有效发光面积。 因此，尽管欧姆电极和接触层之间的接触面积保持较小，但是插入座电极，使得座电极通过与座电极接触的球电极连接到布线板上的电路布线 面积大于面积。 结果，可以容易地确保形成球电极所需的尺寸，并且可以充分降低LED中的发光层的发光面积。 因此，可以减少通过夹持发光层的发光部分而形成的电容分量，从而可以充分降低辉度前沿的时间常数和亮度后沿的时间常数，以获得 高速。

公开(公告)号：US06830949B2

公开(公告)日：2004-12-14

申请号：US10258128

申请日：2002-10-21

申请人： Masanobu Senda ,  Jun Ito ,  Toshiaki Chiyo ,  Naoki Shibata ,  Shizuyo Asami

发明人： Masanobu Senda ,  Jun Ito ,  Toshiaki Chiyo ,  Naoki Shibata ,  Shizuyo Asami

IPC分类号： H01L2100

CPC分类号： C30B23/02 ,  C23C14/0036 ,  C23C14/0617 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02631 ,  H01L33/0062

摘要： A preferred condition for forming a Group III nitride compound semiconductor layer on a substrate by a sputtering method is proposed. When a first Group III nitride compound semiconductor layer is formed on a substrate by a sputtering method, an initial voltage of a sputtering apparatus is selected to be not higher than 110% of a sputtering voltage.

摘要翻译： 提出了通过溅射法在基板上形成III族氮化物化合物半导体层的优选条件。 当通过溅射法在基板上形成第一III族氮化物化合物半导体层时，溅射装置的初始电压被选择为不高于溅射电压的110％。

公开(公告)号：US06713789B1

公开(公告)日：2004-03-30

申请号：US09516177

申请日：2000-03-01

申请人： Naoki Shibata ,  Jun Ito ,  Toshiaki Chiyo ,  Shizuyo Asami ,  Hiroshi Watanabe ,  Masanobu Senda ,  Shinya Asami

发明人： Naoki Shibata ,  Jun Ito ,  Toshiaki Chiyo ,  Shizuyo Asami ,  Hiroshi Watanabe ,  Masanobu Senda ,  Shinya Asami

IPC分类号： H01L3300

CPC分类号： C30B25/02 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02631 ,  H01L33/007

摘要： A first group III nitride compound layer, which is formed on a substrate by a method not using metal organic compounds as raw materials, is heated in an atmosphere of a mixture gas containing a hydrogen or nitrogen gas and an ammonia gas, so that the crystallinity of a second group III nitride compound semiconductor layer formed on the first group III nitride compound layer is improved. When the first group III nitride compound layer is formed on a substrate by a sputtering method, the thickness of the first group III nitride compound layer is set to be in a range of from 50 Å to 3000 Å.

公开(公告)号：US06593016B1

公开(公告)日：2003-07-15

申请号：US09606081

申请日：2000-06-29

申请人： Toshiaki Chiyo ,  Naoki Shibata ,  Masanobu Senda ,  Jun Ito ,  Shizuyo Asami ,  Shinya Asami ,  Hiroshi Watanabe

发明人： Toshiaki Chiyo ,  Naoki Shibata ,  Masanobu Senda ,  Jun Ito ,  Shizuyo Asami ,  Shinya Asami ,  Hiroshi Watanabe

IPC分类号： H01L2900

CPC分类号： C30B29/406 ,  C30B25/02 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/007 ,  H01L33/32 ,  H01S5/32341 ,  Y10T428/265

摘要： A group III nitride compound semiconductor device has a substrate and an AlN single crystal layer formed on the substrate. The AlN single crystal layer has a thickness of from 0.5 to 3 &mgr;m and has a substantially flat surface. The half-value width of an X-ray rocking curve of the AlN single crystal layer is not longer than 50 sec. In another device, a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 &mgr;m is grown at a temperature of from 1000 to 1180° C. on a sapphire substrate having a surface nitride layer having a thickness of not larger than 300 Å.

摘要翻译： III族氮化物化合物半导体器件具有在衬底上形成的衬底和AlN单晶层。 AlN单晶层的厚度为0.5〜3μm，具有大致平坦的表面。 AlN单晶层的X射线摇摆曲线的半值宽度不大于50秒。 在另一种器件中，在具有厚度不大于300的表面氮化物层的蓝宝石衬底上，在1000至1180℃的温度下生长具有0.01至3.2μm厚度的III族氮化物化合物半导体层 一个。